CH 8 Stallings

William Stallings Computer
Organization and Architecture
Chapter 8
Computer Arithmetic
Arithmetic & Logic Unit
Does the calculations (arithmetic & logical)

Handles integers
May handle floating point (real) numbers
May be separate FPU (maths co-processor)
ALU Inputs and Outputs
Control unit provides signal

to control the followings:
• Operation of ALU
• Movement of data into and
out Of ALU
Flag (register) is used to check

Whether the result stored in Register
exceeds the length of the Register of
not. For example:
Stored inputs Stored output • Flag (overflow flag) is set into 1 if
results the result of computation exceeds
the length of the Register
Integer Representation
Only have 0 & 1 to represent everything

Positive numbers stored in binary
e.g. 41=00101001
No minus sign • If we are limited to non-negative
numbers then representation is
No period straightforward.
Sign-Magnitude
Two’s compliment However, in real life, we need
to handle minus numbers and
floating values.
Sign-Magnitude
Left most bit is sign bit • Remaining bits are magnitude
0 means positive
1 means negative
+18 = 00010010
-18 = 10010010
Problems 1. Need to consider both sign and
magnitude in arithmetic
Problem of Sign-Magnitude 2. Also two representation of
representation: zero (+0 and -0)
+0 = 00000000
-0= 10000000
Two’s Compliment Example
Two’s Compliment
+3 = 00000011
+2 = 00000010
+1 = 00000001
+0 = 00000000
-1 = 11111111
-2 = 11111110
-3 = 11111101
Benefits of 2’s Complement
One representation of zero

Arithmetic works easily (see later)
Negating is fairly easy
3 = 00000011 (HW implementation)
Boolean complement gives 11111100
Add 1 to LSB 11111101
Geometric Depiction of Twos
Complement Integers (4-bit number)
Range of Numbers
8 bit 2s compliment
+127 = 01111111 = 27 -1
-128 = 10000000 = -27
16 bit 2s compliment
+32767 = 011111111 11111111 = 215 - 1
-32768 = 100000000 00000000 = -215
Conversion Between Lengths
Positive number pack with leading zeros

+18 = 00010010
+18 = 00000000 00010010
Negative numbers pack with leading ones
-18 = 10010010
-18 = 11111111 10010010
i.e. pack with MSB (sign bit)
Addition and Subtraction
Normal binary addition

Monitor sign bit for overflow
Take twos compliment of substahend and add

to minuend
i.e. a - b = a + (-b)
So we only need addition and complement

circuits
Hardware for Addition and
Subtraction
Multiplication
Complex
Work out partial product for each digit
Take care with place value (column)
Add partial products
Multiplication Example (unsigned)
1011 Multiplicand (11 dec)

x 1101 Multiplier (13 dec)
1011 Partial products
0000 Note: if multiplier bit is 1 copy
1011 multiplicand (place value)
1011 otherwise zero
10001111 Product (143 dec)
Note: need double length result
Unsigned Binary Multiplication
Hardware Implementation
1011 = M (register)
x 1101 = Q (register)
1-bit reg
Third reg A: initially 0

1011 = M (register)
Execution of Example x 1101 = Q (register)
(Product in A, Q)
Flowchart for Unsigned Binary
Multiplication
Multiplying Negative Numbers
This does not work!

Solution 1
Convert to positive if required
Multiply as above
If signs were different, negate answer
Solution 2
Booth’s algorithm
Home Task
Booth’s Algorithm
Example of Booth’s Algorithm
Division
More complex than multiplication

Negative numbers are really bad!
Based on long division
Division of Unsigned Binary
Integers
00001101 Quotient
Divisor 1011 10010011 Dividend
1011
001110
Partial 1011
Remainders
001111
1011
100 Remainder
Integers
Integers
Real Numbers
Numbers with fractions

Could be done in pure binary
1001.1010 = 24 + 20 +2-1 + 2-3 =9.625
Where is the binary point?
Fixed?
Very limited
Moving?
How do you show where it is?
Floating Point
Sign bit
Biased Significand or Mantissa

Exponent
+/- .significand x 2exponent

Misnomer
Point is actually fixed between sign bit and body
of mantissa
Exponent indicates place value (point position)
Floating Point Examples
Signs for Floating Point
Mantissa is stored in 2s compliment

Exponent is in excess or biased notation
e.g. Excess (bias) 128 means
8 bit exponent field
Pure value range 0-255
Subtract 128 to get correct value
Range -128 to +127
Normalization
FP numbers are usually normalized

i.e. exponent is adjusted so that leading bit
(MSB) of mantissa is 1
Since it is always 1 there is no need to store it
(c.f. Scientific notation where numbers are
normalized to give a single digit before the
decimal point
e.g. 3.123 x 103)
FP Ranges
For a 32 bit number

8 bit exponent
+/- 2256  1.5 x 1077
Accuracy
The effect of changing lsb of mantissa
23 bit mantissa 2-23  1.2 x 10-7
About 6 decimal places
Expressible Numbers
IEEE 754
Standard for floating point storage

32 and 64 bit standards
8 and 11 bit exponent respectively
Extended formats (both mantissa and exponent)
for intermediate results
FP Arithmetic +/-
Check for zeros

Align significands (adjusting exponents)
Add or subtract significands
Normalize result
FP Arithmetic x/
Check for zero

Add/subtract exponents
Multiply/divide significands (watch sign)
Normalize
Round
All intermediate results should be in double
length storage
Floating
Point
Multiplication
Floating
Point
Division
Required Reading
Stallings Chapter 8
IEEE 754 on IEEE Web site

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William Stallings Computer

Organization and Architecture

Does the calculations (arithmetic & logical)

Control unit provides signal

Flag (register) is used to check

Only have 0 & 1 to represent everything

Left most bit is sign bit • Remaining bits are magnitude

One representation of zero

Positive number pack with leading zeros

Normal binary addition

Take twos compliment of substahend and add

So we only need addition and complement

1011 Multiplicand (11 dec)

Third reg A: initially 0

This does not work!

More complex than multiplication

Numbers with fractions

Biased Significand or Mantissa

+/- .significand x 2exponent

Mantissa is stored in 2s compliment

FP numbers are usually normalized

For a 32 bit number

Standard for floating point storage

Check for zeros

Check for zero

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