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Topic 6. Signed Number Format: Ce232 Digital System

The document discusses different methods for representing signed numbers and fractional numbers in binary format for digital systems. It covers signed number representation using signed magnitude and 1's and 2's complement, fixed point representation with separate integer and fractional bits, and floating point representation according to the IEEE 754 standard with sign, exponent and mantissa fields. Examples are provided for converting between decimal and binary formats for signed integers, fixed point and floating point numbers.

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0% found this document useful (0 votes)
25 views

Topic 6. Signed Number Format: Ce232 Digital System

The document discusses different methods for representing signed numbers and fractional numbers in binary format for digital systems. It covers signed number representation using signed magnitude and 1's and 2's complement, fixed point representation with separate integer and fractional bits, and floating point representation according to the IEEE 754 standard with sign, exponent and mantissa fields. Examples are provided for converting between decimal and binary formats for signed integers, fixed point and floating point numbers.

Uploaded by

Nep Nep
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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You are on page 1/ 55

CE232 DIGITAL SYSTEM

Topic 6. Signed Number


Format

Prepared by Nabila Husna Shabrina


Contact : nabila.husna@umn.ac.id
Subtopic

6.1 Signed 6.2 1’s and 2’s


Number Complement

6.3 Fixed Point 6.4 Floating Point


IEEE 754

2 CE232 Digital Systems



6.1 Signed Number
6.1 Signed Number

Signed number
• Signed number represents negative number
• Computers only know binary, therefore we use signed number to
understand how computers represents and computes negative number
• There are 2 method
• Signed magnitude
• Complements : one’s complement and two’s complement

4 CE232 Digital Systems


6.1 Signed Number

Signed magnitude

Sign bit Binary of number

+ represented by zero
- represented by 1

5 CE232 Digital Systems


6.1 Signed Number

Example of signed magnitude


Positive number Negative number

6 CE232 Digital Systems


6.1 Signed Number

Disadvantages
• Range only from -2(n-1) to +2(n-1)-1
Example : the representation for 4 bits signed number ( 1 for sign bit and 3
bits for magnitude bits) is

Whereas, in non signed number the range for 4 bit binary is from 0 tp 15

7 CE232 Digital Systems


6.1 Signed Number

Example.

8 CE232 Digital Systems



6.2 1’s and 2’s
Complement
6.2 1’s and 2’s Complement

• Signed number can also be represented using complements


• There are two complement form
• 1’s complement
• 2’s complement

10 CE232 Digital Systems


6.2 1’s and 2’s Complement

1’s Complement
• Complementing each digit in binary number
• Positive number remains the same
• Negative number is represented by complementing every bits
• Range -2(n-1) to +2(n-1)-1

11 CE232 Digital Systems


6.2 1’s and 2’s Complement

Example.
Positive number (9)10 = (1001)2,
Negative number (-9)10 = (0110)2,

12 CE232 Digital Systems


6.2 1’s and 2’s Complement

1’s complement addition and subtraction


• Subtraction can be implemented in addition form
𝐴 − 𝐵 = 𝐴 + (−𝐵) 𝑜𝑟 – (𝐵) + 𝐴

Steps
• Take 1’s complement for subtrahend, add it to the minuend
• If carry is not generated, the result is said to be negative & is in 1’s complement
form, take 1’s complement again to get the magnitude of the actual result
• If carry is generated, the result is positive, add 1 it to get the actual result
13 CE232 Digital Systems
6.2 1’s and 2’s Complement

Example.
Find 3 − 12 using 1’s complement

3 → 0011 ; -12 (using 1’s complement) → 0011


0011
0011+
0 1 1 0 → carry is not generated, take the 1’s complement form to get the
magnitude → 1001 so the result is -9

14 CE232 Digital Systems


6.2 1’s and 2’s Complement

Example.
Find 54 − 72 using 1’s complement

54 → 0110110 ; -72 (using 1’s complement) → 0110111


0110110
0110111+
1 1 0 1 1 0 1→ carry is not generated, take the 1’s complement form to get
the magnitude → 0010010, so the result is -18

15 CE232 Digital Systems


6.2 1’s and 2’s Complement

Example.
Find 12 − 3 using 1’s complement
-3 (using 1’s complement) → 1100 ; 12 → 1100
1100
1100+
1 1 0 0 0 → carry is generated
1+
1 0 0 1 → the result is 9

16 CE232 Digital Systems


6.2 1’s and 2’s Complement

Example.
Find 48 − 28 using 1’s complement
48 → 110000 ; -28 (using 1’s complement) → 100011
110000
100011+
1 0 1 0 0 1 1→ carry is generated, add it to the result
1+
0 1 0 1 0 0 → the answer is 20

17 CE232 Digital Systems


6.2 1’s and 2’s Complement

2’s Complement
• Complementing each digit in binary number and add by 1
• Positive number remains the same
• Negative number is represented by complementing every bits and adding 1
to the complemented bit
• Range -2(n-1) to +2(n-1)-1
• The main difference between 1′ s complement and 2′ s complement is that
1′ s complement has two representations of 0, while 2’s complement only
have 1 representation for 0
18 CE232 Digital Systems
6.2 1’s and 2’s Complement

Example.
Positive number (9)10 = (1001)2,
Negative number (-9)10 = (0111)2,

19 CE232 Digital Systems


6.2 1’s and 2’s Complement

2’s complement addition and subtraction


• Subtraction can be implemented in addition form
𝐴 − 𝐵 = 𝐴 + (−𝐵) 𝑜𝑟 – (𝐵) + 𝐴

Steps
• Take 2’s complement for subtrahend, add it to the minuend
• If carry is not generated, the result is said to be negative & is in 2’s complement
form. Take 2’s complement again to get the magnitude of the actual result
• If carry is generated, discard the carry
20 CE232 Digital Systems
6.2 1’s and 2’s Complement

Example.
Find 48 − 28 using 2’s complement
48 → 110000 ; -28 (using 2’s complement) → 100100
110000
100100+
1 0 1 0 1 0 0→ carry is generated, discard the carry, the answer is 010100
(20)

21 CE232 Digital Systems


6.2 1’s and 2’s Complement

Example.
Find (111000)2 −(101001)2
(111000)2 − 101001 2 = 56 − 41

2’s complement 0f 41 → 010111


111000
010111+
1 0 0 1 1 1 1→ carry is generated, discard the carry, the answer is 001111
(15)
22 CE232 Digital Systems
6.2 1’s and 2’s Complement

Example.
Find 54 − 72 using 2’s complement

54 → 0110110 ; -72 (using 2’s complement) → 0111000


0110110
0111000+
1 1 0 1 1 1 0→ carry is not generated, take the 2’s complement form to get
the magnitude → 0010010, so the result is -18

23 CE232 Digital Systems



6.3 Fixed Point
6.3 Fixed Point

• Digital system only have 0 and 1


• However, in real world we use fractional number such as 3.12, 3,5, 11,8 etc.
• There are two representation :
• Fixed point
• Floating point
• Fixed point representation has fixed number of bits for integer part and for
fractional part

25 CE232 Digital Systems


6.3 Fixed Point

• There are three parts of a fixed-point number representation: the sign field,
integer field, and fractional field

26 CE232 Digital Systems


6.3 Fixed Point

Example.
Represent fixed point of unsigned binary number 0110110 using 4 integer
bits and 3 fractional bits

0110. 110

6 0.75

27 CE232 Digital Systems


6.3 Fixed Point

Example.
Represent (-7.5) using 8 bit binary representation with 4 digits integer and 4
fraction bit (using 2’s complement)
(7,5)10 → (111.1)2 → (0111.1000)
2′ 𝑠 𝑐𝑜𝑚𝑝𝑙𝑒𝑚𝑒𝑛𝑡
1000.1000

28 CE232 Digital Systems


6.3 Fixed Point

Example.
Compute 0.75 +(-0.625) using 8 bits fixed point number
(0.75)10 → (0000.1100)2
(0.625)10 → (0000.1010)2
2′ 𝑠 𝑐𝑜𝑚𝑝𝑙𝑒𝑚𝑒𝑛𝑡
(1111.0110)2

0000.1100
1111.0110 +
0000.0010
29 CE232 Digital Systems

6.4 Floating Point IEEE
754
6.4 Floating Point IEEE 754

• IEEE Standard 754 floating point is the most common representation today
for real numbers on computers
• Makes particularly efficient use of the computer to represent extremely large
or small value
• Recall scientific notation format
• a value whose magnitude is in the range of 1≤n<10
• a power of 10
• 3498523 is written as 3.498523×106
• −0.0432 is written as −4.32×10−2

31 CE232 Digital Systems


6.4 Floating Point IEEE 754

• In Binary floating point the format will be written in


• a value whose magnitude is in the range of 1≤n<2
• a power of 2
• −6.84 is written as −1.71×22
• 0.05 is written as 1.6×2−5

32 CE232 Digital Systems


6.4 Floating Point IEEE 754

• It has 3 components
• The sign : 0 represents a positive number while 1 represents a negative number
• The exponent : to represent both positive and negative exponents.
• The mantissa : The mantissa is part of a number in scientific notation or a floating-point
number

33 CE232 Digital Systems


6.4 Floating Point IEEE 754

Example.

34 CE232 Digital Systems


6.4 Floating Point IEEE 754

Example.

35 CE232 Digital Systems


6.4 Floating Point IEEE 754

Example.

In 2’s complement (because


it’s negative)

36 CE232 Digital Systems


6.4 Floating Point IEEE 754

37 CE232 Digital Systems


6.4 Floating Point IEEE 754

IEEE 754 Standard → Standard format for floating point

Single precision

38 CE232 Digital Systems


6.4 Floating Point IEEE 754

Double precision

39 CE232 Digital Systems


6.4 Floating Point IEEE 754

The difference

40 CE232 Digital Systems


6.4 Floating Point IEEE 754

Decimal to IEEE 754 Conversion


• Determine the sign bit
• Convert to pure binary
• Normalize to determine the mantissa and the unbiased exponent by placing
the binary point after leftmost 1
• Determine the biased exponent by adding 127 then converting to an
unsigned binary integer
• Remove the leading 1 from the mantissa by removing the leftmost 1
• Write the actual result in 32- or 64-bit format
41 CE232 Digital Systems
6.4 Floating Point IEEE 754

Example.
Convert 19.25 into IEEE 754 standard 32-bit floating-point binary
Step 1. Determine the sign bit
Positive number → sign bit = 0
Step 2. Convert to pure binary

42 CE232 Digital Systems


6.4 Floating Point IEEE 754

Step 3. Normalize to determine the mantissa and the unbiased exponent

Step 4. Determined the biased component

Step 5. Remove the leading 1 from mantissa

43 CE232 Digital Systems


6.4 Floating Point IEEE 754

Step 6. Write the result in 32 format

44 CE232 Digital Systems


6.4 Floating Point IEEE 754

Example.
Convert -123.3 into IEEE
754 standard 32-bit
floating-point binary
Step 1. Determine the
sign bit
Sign bit = 1
Step 2. Convert to pure
binary

45 CE232 Digital Systems


6.4 Floating Point IEEE 754

Step 3. Normalize to determine the mantissa and the unbiased exponent

Step 4. Determined the biased component

Step 5. Remove the leading 1 from mantissa

46 CE232 Digital Systems


6.4 Floating Point IEEE 754

Round mantissa up if necessary

Step 6. Write the result in 32 format

47 CE232 Digital Systems


6.4 Floating Point IEEE 754

IEEE 754 to Decimal Conversion


• Determine the sign bit
• Determine the exponent in decimal
• Remove the exponent bias by subtracting 127
• Convert the mantissa to decimal
• Add 1 to the mantissa and include the sign
• Calculate the final result

48 CE232 Digital Systems


6.4 Floating Point IEEE 754

Example.
Convert 0 10000100 11010100000000000000000
Step 1. Determine the sign bit
0 → positive
Step 2. Determine the exponent in decimal
(100000100)2 = (132)10
Step 3. Remove the exponent bias
132 − 127 = 5

49 CE232 Digital Systems


6.4 Floating Point IEEE 754

Step 4. Convert the mantissa to decimal

0.5 + 0.25 + 0.0625 + 0.015625 = 0.828125


Step 5. Add 1 to the mantissa and include in the sign
0.828125 + 1 = 1.828125
Step 6. Calculate the final result
1.828125 x 25 = 58.5

50 CE232 Digital Systems


6.4 Floating Point IEEE 754

Example.
Convert 1 00001001 000110010000000000000
Step 1. Determine the sign bit
1 → negative
Step 2. Determine the exponent in decimal
(00001001)2 = (9)10
Step 3. Remove the exponent bias
9 − 127 = −118

51 CE232 Digital Systems


6.4 Floating Point IEEE 754

Step 4. Convert the mantissa to decimal

0.0625 + 0.03125 + 0.00390625 = 0.09765625


Step 5. Add 1 to the mantissa and include in the sign
0.09765625 + 1 = 1.09765625 → -1.09765625 (because the sign is −)
Step 6. Calculate the final result
−1.09765625x 2−118 = −3.30313912581062 … 𝑥2−36

52 CE232 Digital Systems


6.4 Floating Point IEEE 754

Reserved value

53 CE232 Digital Systems


References

M. Morris Mano, Digital Design, 5th ed, Prentice Hall, 2012, Chapter 1
Next Topic : Combinational Logic
Circuit

55 CE232 Digital Systems

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