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fully edited. Content may change prior to final publication. Citation information: DOI 10.1109/TEC.2017.2769114, IEEE
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Optimal Performance Design Guideline of Hybrid

Reference Frame-based Dual Loop Control
Strategy for Stand-Alone Single-Phase Inverters
Yang Han, Senior Member, IEEE, Ai-Ting Jiang, Ernane A. A. Coelho, and Josep M. Guerrero, Fellow, IEEE

SRF Synchronous reference frame.

Abstract—The dual-loop control strategy in hybrid reference DG Distributed generation.
frame (HRF) for single-phase voltage source inverters (VSIs) in PWM Pulse-width modulation.
islanded operation mode is studied, which applies a capacitor PR Proportional resonant.
voltage shaping loop in the synchronous reference frame (SRF) Synchronous reference frame proportional
and a capacitor current shaping loop in the stationary reference SRF-PI
integral.
frame (HRF-based v+ic control strategy). This strategy is able to
OSG Orthogonal signal generation.
achieve the purpose of active damping, fast dynamic response and
zero reference tracking error. However, due to the inherent PM Phase margin.
characteristics of SRF-based voltage loop and the digital control GM Gain margin.
delay, the performance of the system is degraded and the control MOSFET Metal-oxide field effect transistor.
parameter design of HRF-based v+ic control strategy shows great APF All-pass filter.
difficulties. To overcome these shortcomings, in this paper, a FFT Fast Fourier transformation.
systematic parameter design guideline for HRF-based v+ic control THD Total harmonic distortion.
strategy is proposed to ensure the system stability and optimize Variables
the performance of the system under control delay condition. The iL Inductor current.
mathematic model of the HRF-based v+ic control strategy is
ic Capacitor current.
established with the consideration of control delay in this paper.
Based on this model, a satisfactory region of the system stability i0 Output current.
indexes can be obtained by stability specifications of the system v Output voltage.
and the optimal control parameters can be calculated according to vc Capacitor voltage.
the stability indexes selected from the satisfactory region. By v α, v β Voltage components in αβ-axis.
using this method, the system stability and robustness can be v d, v q Voltage components in dq-axis.
guaranteed. Finally, the experimental results are presented to Vdc Voltage at dc-side of the VSI.
validate the effectiveness of the presented optimal control Vinv Voltage at ac-side of the VSI.
parameter design methodologies. Parameters
ωf Fundamental frequency.
Index Terms—Control delay, single-phase inverter, hybrid
L Output inductor of inverter.
reference frame, islanded mode, parameter design guideline.
rL Series resistance of the inductor
C Capacitor of the LC filter.
R Load resistance.
NOMENCLATURE
v*d , v*q Rated voltage in dq-axis.
i*c, d, i*c, q Rated capacitor current in dq-axis.
Abbreviations
fs Sampling frequency.
HRF Hybrid reference frame.
Vtri Amplitude of the triangular carrier signal.
VSI Voltage source inverter.
fg Crossover frequency at -180°.
fc Crossover frequency at 0 dB.
Manuscript received April 23, 2017; revised September 26, 2017; accepted K p, K i Parameters of the PI controller.
October 27, 2017. Date of publication *******; date of current version
*******. This work was supported by Sichuan Province Key Research and
K Proportional value of the current controller.
Development Project under grant No.2017GZ0347. Paper no.
TEC-00307-2017.
Y. Han and A. Jiang are with the Department of Power Electronics, School of I. INTRODUCTION
Mechatronics Engineering, University of Electronic Science and Technology of
China (UESTC), No.2006, Xiyuan Avenue, West Hi-Tech Zone, Chengdu
611731, China (e-mail: hanyang@uestc.edu.cn; 532470232@qq.com).
Ernane A.A. Coelho is with the Universidade Federal de Uberlandia,
D istributed generation (DG) systems, such as photovoltaic
and wind power systems, are attracting increasing interest
due to the high requirement of reliability and low loss of
Uberlandia 38400-902, Brazil (ernane@ufu.br).
J. M. Guerrero is with Department of Energy Technology, Aalborg transmission and distribution networks in recent years. With the
University, 9220 Aalborg, Denmark (e-mail: joz@et.aau.dk). rapid development of the application of DGs, the power
Color versions of one or more of the figures in this paper are available online
at http://ieeexplore.ieee.org. electronic inverters are being widely utilized to overcome the
Digital Object Identifier ******/TEC.****** difficulties such as controlling the voltage amplitude and

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frequency with a fast dynamic response and zero steady-state the stationary frame by an inverse Park’s transformation [30],
errors [1-4]. For the single-phase inverters, the full-bridge pulse [31].
width modulation (PWM) inverter, whose major requirement Employing a single-loop instantaneous voltage feedback
of its control system is to control the voltage to achieve the control is probably the simplest way to regulate the inverter
steady state with zero steady-state error and a fast dynamic output voltage with zero steady-state error. However, in the
response, is widely used either in grid-connected or islanded industrial applications, a typical LC filter, which is usually
mode voltage regulators in the distributed power systems [5]. incorporated into the PWM converter to suppress the harmonic
To regulate the system voltage of the single-phase inverters contents of the output voltage from the inverter, may introduce
in islanded mode, various control strategies have been proposed a resonance peak and reduce the stability margin of the PWM
in recent literatures [6]-[31]. In [6]-[9], the deadbeat control is inverters. To solve this problem, in renewable energy system
suggested to control the load voltage parameters such as the applications, dual-loop control strategies are introduced into
amplitude and frequency. For its simplicity in implementation the inverters [32]. For these strategies, the inner loops, which
and wide control bandwidth, deadbeat control is widely used in are usually the current loops, use the current of the filter
the PWM inverters. However, the parametric sensitivity, which inductor or capacitor current as the feedback signal to damp the
exists in the system due to the high-order plant controlled by the resonance peak of LC filter, and outer loops, which are
deadbeat controller, can reduce the system stability margin. In normally the voltage loops, use the filter capacitor voltage as
[10]-[16], the repetitive control is presented, which shows an the reference signal to regulate the output voltage [33].
excellent control performance for periodic signals. This feature In [34], a dual-loop control strategy based on the hybrid
makes it very effective for suppressing the harmonics and reference frame is proposed, which adopts a capacitor voltage
emulating various scenarios of power grids. However, the shaping loop with the SRF-PI controller and a capacitor current
low-accuracy tracking performance, slow transient response shaping loop in the stationary reference frame (here named
and poor rejection of the aperiodic disturbances are the main HRF-based v+ic control strategy). This control strategy is able
limitations of the typical repetitive controller. The discrete-time to achieve the steady-state with zero steady-state error and
sliding-mode is suggested as another control strategy to ensure actively damp the resonance peak of the LC filter. However, the
the output voltage quality in [17]-[21]. The interesting feature control parameter design method of the HRF-based v+ic control
of the discrete-time sliding-mode control is its robustness, fast strategy is not comprehensive in [34] since it neglects the
transient response and simple digital implementation. impact of control delay, which is mainly brought by the
Moreover, it is able to provide a direct control without any computation and pulse width modulated (PWM) delays [35]. It
modulation schemes. Despite the aforementioned advantages, has been reported that the control delay cannot be ignored
this technique suffers from some drawbacks, including the because it reduces the system phase margin and influences the
so-called chattering phenomenon resulted from the actuator system minimum phase properties [36], [37]. In [38], a
limitations or time discretization, which can deteriorate the systematic parameter design with control delay consideration
control accuracy and performance of the system. [20], [21]. for v+ic control strategy is proposed, but the voltage loop
The proportional-resonant (PR) control method is popular applies the PR controller in the stationary frame instead of
for the single-phase inverters thanks to the ability to eliminate SRF-PI controller. In [39], a parameter design guideline of the
the tracking error while regulating the AC signals [22], [23]. control strategy working on the SRF is suggested while taking
When tracking a sinusoidal reference, this control strategy does into account the control delay. Nevertheless, as for SRF-based
not require decoupling structures and it is able to ensure the voltage control and the parameter design of the HRF-based v+ic
system with zero steady-state error at a frequency even with the control strategy under the impact of the control delay has not
variations of the circuit parameters [24], [25]. However, the been fully addressed in the existing literatures.
poor dynamic performance and the requirement of the very This paper aims to provide a systematic parameter design
high switching frequency limit the application of this technique guideline for the single-phase inverters using HRF-based v+ic
[26], [27]. To overcome these drawbacks, the synchronous control strategy with consideration of control delay. The main
reference frame proportional-integral (SRF-PI) controller, contributions of this paper are summarized as follows:
which is a well-developed technique in three-phase PWM 1) This paper presents the dual-loop control strategy in the
converters, is taken into consideration for the single-phase hybrid reference frame for stand-alone single-phase inverters,
inverters. In [28], [29], incorporating the SRF-PI controller into which applies a capacitor voltage control loop in synchronous
the single-phase PWM inverters is proposed, which provides reference frame and a capacitor current shaping loop in the
the zero steady-state error through the conventional PI stationary reference frame. The mathematic model of the single
controller in synchronous reference frame. For this controller, -phase inverter with this strategy is established under control
two orthogonal signals are generated by the orthogonal signal delay scenario.
generation (OSG) techniques with respect to the fundamental 2) A systematic method for designing SRF-PI controller and
frequency of the single-phase signal and then transformed into current controller is proposed for the HRF-based v+ic control
the synchronous reference frame. A conventional PI regulator, strategy with consideration of the control delay. This method
which is followed by the coordinate transformation, regulates designs a satisfactory region, which is specified by the phase
the synchronous reference frame signals to ensure a zero margin (PM) from 30° to 60° and the gain margin (GM) greater
steady-state error and then, the signals are transformed back to than 3 dB with the consideration of control delay of 150 µs.

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With this predefined region, the control parameters of the capacitor voltage and its orthogonal signal are transformed into
SRF-PI controller and the current controller can be easily synchronous frame by using Park transformation, which is
obtained, and it is more convenient and explicit to optimize the followed by a PI controller. It should be mentioned that, the
system performance according to the satisfactory region. orthogonal signal is generated by an all-pass filter (APF),
3) Implementation of the HRF-based v+ic control strategy which causes a 90° phase delay at the fundamental frequency ωf
with the designed control parameters on a single-phase inverter and has unity-gain magnitude for all frequency ω with respect
system has been presented to validate the effectiveness of the to the capacitor voltage [40]. This technique is easy to achieve
proposed parameter design methodologies. and the structure of a first-order APF is illustrated in Fig. 2.
This paper is organized as follows. In Section II, the control ωf
v = vα + + vβ
structure of the single-phase inverters with HRF-based v+ic
− ∫ 2
−
control strategy and the equivalent model of the SRF-PI
controller in the stationary reference frame are presented. The
mathematic model of the HRF-based v+ic control strategy is Fig. 2. The structure of a first-order APF [34].
established as well. In Section III, a systematic parameter
design guideline for the standalone single-phase inverters using Since only α-axis quantities belong to the real system, the
HRF-based v+ic control strategy with consideration of control α-axis signal is fed forward to shape the voltage loop and at the
delay is proposed, which is conducted by specifying the same time, as the reference signal of the inner current loop
satisfactory region of the stability indexes according to the when the HRF-based v+ic control strategy is conducted. It
stability margin. In Section IV, the experimental results are should be noted that the capacitor current (ic) is selected as the
presented to validate the effectiveness of the proposed design feedback signal of the inner current loop. And the controller of
approach. Finally, Section V concludes this paper. the inner current loop is a proportional controller instead of a PI
controller, which is popular in current feedback control [41].
By applying a proportional controller, the phase delay problem
II. CONTROL STRUCTURE OF THE SINGLE-PHASE INVERTERS
can be easily solved compared to the PI controller and it is able
A. Control Structure of the Single-Phase Inverter with the to accelerate the dynamic response of the system.
HRF-based v+ic Control Strategy
B. Analysis of the SRF-PI Controller
Fig. 1 illustrates the control structure of the single-phase
Since the voltage loop works in the synchronous reference
inverter using the HRF-based v+ic control strategy operated in
frame, which blocks the analysis of the whole closed-loop
the islanded mode. As shown in Fig. 1, for the power circuit of
system and the appropriate design of the control parameters, it
the single-phase inverter, an insulated-gate bipolar transistor
is essential to establish an equivalent model of the SRF-PI
(IGBT) full-bridge configuration, followed by an LC filter, is
controller in the stationary frame. In [34], the stationary
set as a VSI to produce PWM sinusoidal voltage Vinv. A linear
reference frame equivalent of the SRF-PI controller is derived
load is in parallel with the capacitor. In the power circuit of the
by Monfared et al, which gives a better insight on the
single-phase inverter, rL denotes the series resistance of the
single-phase inverter using the HRF-based v+ic control strategy
inductor, il denotes the inductor current, ic denotes the capacitor
and has a significant effect on parameter design and stability
current, i0 denotes the load current and vc denotes the capacitor
analysis of the system.
voltage of the LC filter.
vα αβ vd i* iα*
S1 S2 Single-phase inverter ⎡GPI ( s) 0 ⎤ d* dq
vβ v i i*
il L rL i0 dq q ⎢⎣ 0 GPI ( s) ⎥⎦ q αβ β
Vdc Vinv +- vc v
S3 S4 ic C Load Fig. 3. The block diagram of the SRF-PI controller [34].
APF
The block diagram of the SRF-PI controller is shown in Fig.
Voltage loop in the vβ vα 3, where the GPI(s) denotes the transfer function of the PI
PWM modulator synchronous reference frame αβ controller, that is, GPI(s)=Kp+Ki/s. With two inputs and two
* dq
÷ ic*,d - vd v vq outputs, which are both in the stationary reference frame, the
αβ PI d
× - i* ic*,q
+ equivalent of the structure shown in Fig. 3 can be written in
K + c ,α dq +
PI
- vq* time-domain as [34]:
Current loop in the
stationary reference frame ⎡iα* (t ) ⎤ ⎡cos(ω f t ) − sin(ω f t ) ⎤
HRF-based v+ic control strategy
⎢ * ⎥=⎢ ⎥
Fig. 1. The control structure of the single-phase inverter using the HRF-based ⎣⎢iβ (t ) ⎦⎥ ⎣⎢sin(ω f t ) cos(ω f t ) ⎦⎥
v+ic control strategy [34]. (1)
⎧⎪ ⎡GPI (t ) 0 ⎤ ⎪⎧ ⎡cos(ω f t ) ⎫⎫
sin(ω f t ) ⎤ ⎡vα (t ) ⎤ ⎪⎪
⎨⎢ * ⎨⎢ ⎥⎢ ⎥ ⎬⎬
Meanwhile, the HRF-based v+ic control strategy for the
⎪⎩ ⎣ 0 GPI (t ) ⎥⎦ ⎩⎪ ⎣⎢ − sin(ω f t ) cos(ω f t ) ⎦⎥ ⎣vβ (t ) ⎦ ⎭⎪⎪
full-bridge single-phase inverter is presented in Fig. 1 as well, ⎭
which includes an SRF-PI voltage controller to regulate the where * denotes the convolution.
output voltage and a capacitor current loop in the stationary Taking the Laplace transform from both sides of (1) and
reference frame to provide active damping and fast dynamic substituting the transfer function of PI controller yield [34]:
response [34]. As shown in Fig. 1, it can be observed that the

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a3 s 3 + a2 s 2 + a1 s + a0 (2) K ⋅ GD ⋅ R
iα* ( s ) = vα ( s ) = H ( s )vα ( s ) Gopen (s) = H (s) ⋅ (7)
s 3 + ω f s 2 + ω 2f s + ω 3f LRCs 2 + KGD RCs + rL RCs + Ls + rL + R
where With the above analysis, it is evident that the design of the
⎪a3 = K P，a2 = K Pω f + Ki
⎧
(3)
control parameters is of vital significance to ensure the stability
⎨ and optimal performance of the standalone inverter system.
⎩a1 = K Pω f + 2ω f Ki，a0 = K Pω f − ω f Ki
2 3 2
⎪
Hence, the H(s) is the transfer function of the SRF-PI
III. PROPOSED PARAMETER DESIGN GUIDELINES
controller in the stationary reference frame, which has a
significant influence on facilitating the analysis of the whole Since no parameter design guideline has been proposed for
system and designing the control parameters of the inverter. the single-phase inverters with HRF-based v+ic control strategy
under control delay consideration, in this section, the design
C. Mathematic Model of the HRF-based v+ic Control Strategy method of the control parameters is presented in detail. The
Inner current loop presented approach is conducted by specifying the available
ic i0 region of the stability indexes, which is obtained according to
v* + ic* 1 il - 1 v
H(s) +
-
K 1/Vdc KPWM GD(s) +
- +
ic sC the constraint of stability margin. With the particular region, the
-
Ls + rL
v v satisfactory stability indexes can be determined and the control
parameters can be calculated with the selected stability indexes.
Fig. 4. Control scheme of the HRF-based v+ic control strategy in the stationary
reference frame. Fig. 6 illustrates the bode diagram of H(s) for different values
of Ki with Kp=1. It can be observed that the value of Ki has no
Fig. 4 illustrates the control scheme of the HRF-based v+ic influence on the magnitude and phase frequency properties of
control strategy in the stationary reference frame. Kpwm is the the H(s) at the high frequency range. Since the stability margins,
transfer function of PWM inverter, which is defined as Vdc/Vtri, corresponding to the phase margin (PM) and the gain margin
where Vdc is the amplitude of the input dc voltage and Vtri is the (GM), are both defined at the high frequencies, the Ki can be
amplitude of the triangular carrier signal [42]. GD(s) denotes the selected as zero to simplify the H(s), which yields:
transfer function of the control delay for this system, which can H (s) ≈ K p (8)
be expressed as e−Td ⋅s with Td=1.5/fs and fs=10 kHz [38]. Hence, the open loop transfer function of the HRF-based v+ic
Generally, the form of the GD(s) has three approximations, and control strategy can be simplified as:
to acquire a high bandwidth for the inverter in islanded mode, K p ⋅ K ⋅ GD ⋅ R
Gopen ( s) = (9)
the approximation shown as (4) is preferred [38]. LRCs + KGD RCs + rL RCs + Ls + rL + R
2
Bode Diagram
T 300
1− d s
300

2 Ki=50
Magnitude(dB)

250
GD ( s) = e−Td ⋅s = (4)
Td 200
Magnitude (dB)

200
1+ s 150
2
Assuming that the linear load resistance is R and the i0 in the 100
100

50 Ki=20
block diagram of Fig. 4 can be expressed as:
(5) 00
i0 = v / R 9090
In addition, according to [35], the amplitude of the triangular 00
Phase(deg)
Phase (deg)

carrier signal Vtri is set as 1 pu. Hence, combining with (5) and -90-90
Kpwm= Vdc/Vtri, the closed-loop transfer function of the inner -180
-180 Ki=0
current loop can be written as: -270
-270

ic K ⋅1/ Vdc ⋅ K pwm GD RCs -360

-360
10 0 10 1 10 2 10 3 10 4
10 10 10 10 10
0 1 2 3 4

= Gi ( s) =
LRCs + KGD RCs + rL RCs + Ls + rL + R Frequency(Hz)
* 2 Frequency (Hz)
ic
(6)
KGD RCs Fig.6. The bode diagram of the H(s) with different values of Ki.
=
LRCs 2 + KGD RCs + rL RCs + Ls + rL + R
When designing a stable system, the phase should be above
Hence, the block diagram of the HRF-based v+ic control -180° when the magnitude curve across 0 dB at the crossover
strategy can be simplified as Fig. 5. frequency fc on the bode diagram to ensure PM>0, and the
v* 1 v magnitude should be below 0 dB when the phase curve across
+ H(s) Gi ( s )
- sC -180° at the frequency fg on the bode diagram to ensure GM>0
v [35]. The expressions of the PM and GM can be written as [35]:
Fig.5. The block diagram of the HRF-based v+ic control strategy. PM = 180° + arctan ∠Gopen ( jω ) ω = 2π f c (10)

From Fig. 5, the open-loop transfer function of the block GM = −20lg | Gopen ( jω) |ω =2π f g (11)
diagram of the HRF-based v+ic control strategy can be Substituting s=jω into (9) yields:
expressed as: K p KR(1 − jA1 )
Gopen ( jω ) = (12)
A2 + jA3

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where the parameters A1, A2 and A3 are denoted as: D2 = rL + R − 2π 2Td Lf c2 − 4π 2CLRf c2 + 2π 2 ( K − rL )CRTd f c2
T (24)
A1 = d ω (13)
2 From (22), it can be concluded that the Kp is related to K and
T T T fc. Hence, once the appropriate K and fc are selected, the control
A2 = rL + R − LRCω 2 + KRC d ω 2 − rL RC d ω 2 − L d ω 2
2 2 2 parameter Kp can be determined.
(14) Substituting (17), (19) and (22) into (11), the relationship
T T T among the GM, fc and fg can be obtained, which is illustrated in
A3 = KRCω + rL RCω + Lω + rL d ω + R d ω − LRC d ω 3 (15) Fig. 8 to give a straightforward view. To ensure the stability of
2 2 2
Hence, the phase angle and the magnitude of the open-loop the system, the satisfactory region about GM is constrained by
transfer function can be expressed as: GM=3 dB.
In Fig. 8, the satisfactory region constrained by GM≥3 dB
A A + A3
∠Gopen ( jω ) = arctan 1 2 (16) with control delay consideration is shown by the shadowed area,
A1 A3 − A2 which is convenient to select the optimal fc and fg.
A12 + 1 PM(deg)
Gopen ( jω ) = K p KR (17) 140
140
A22 + A32
Since the phase curve cross -180° at fg, it can be obtained that 150
150 120
120

( A1 A2 + A3 ) =0 (18) 100
100

ω = 2π f g
60°
100 PM= 80
100 80

Therefore, according to (18) and combining with (13), (14) d b y

train e 60
60
and (15), the parameter K can be calculated as:
5050 Cons M≤ 60° 40
− L − Td (rL + R) − CRrL + B1 f g2 P 40

K= (19) 30°≤
CR + π 2CRTd2 f g2 20
20

00 3 0 °
PM= 0
0
where the variable B1 is denoted as:
B1 = π 2 rL CRTd2 + π 2Td2 L + 4π 2 CLRTd (20) -20
2500 -20

-50
-50 2000
2000
From (19), it can be inferred that the K is proportional to fg, 500
500 1000 1500
1500 -40
-40

which means that once the appropriate fg is selected, the control 1000 1500
1500 2000 1000
1000

f (Hz)
2000
fg(Hz)
fg(Hz)
parameter K can be easily determined. c fc(Hz)

TABLE I Fig. 7. The relationship of fc, fg and PM.

PARAMETERS OF THE INVERTER
GM(dB)
Symbol Values
DC Link Voltage (Vdc) 50V
Sampling and switching period(Ts) 100µs
5
5
Fundamental frequency (ω0) 100π rad/s
Filter Inductance (L) 4000µH Constrained by
Filter Capacitance (C) 2.2µF 1010
GM≥ 3dB
0
0
ESR of the Inductor (rL) 0.1Ω 55
Control delay (Td) 150µs
3dB
00 GM= -5
-5

Using the parameters listed in TABLE I, substituting (16)

-5-5
and (19) into (10), the relationship among the PM, fc and fg can -10
-10

be obtained, which is illustrated in Fig. 7. In industrial

-10
2500 -10
-15
-15

application, the PM is preferred to be 30°~60° to achieve a -20

-20 2000
2000
500
good tradeoff between the system dynamic response and the 500 -15
requirement of a strong robustness. According to this, when 1000
1000
1500 1500 -15

fc(Hz) 1500
1500

considering the control delay, which is 150 µs in this paper, the 2000
2000 1000
1000 fg(Hz)
fg(Hz)
fc(Hz)
available region constrained by PM=30° and PM=60° can be
Fig. 8. The relationship of fc, fg and GM.
specified as the shadowed area shown in Fig. 7.
Similarly, at the crossover frequency fc, the magnitude of the
Moreover, the K and Kp of the system should be positive.
system can be written as
And the relationship of the Kp, fc and fg is illustrated in Fig. 9.
| Gopen (s) |s = j 2π fc = 1 (21) From Fig. 9, it can be observed that when fg is equal to 1910 Hz,
Substituting (21) into (17), it can be obtained that: different Kp can be obtained from 3.32 to 7.14 with the
variations of fc. When fg>1910 Hz, the values of Kp are between
D12 + D22
Kp = (22) 0 and 2 and when fg<1910 Hz, the values of Kp are negative. For
KR π 2Td2ωc2 + 1 the control parameter K, since it is proportional to fg, when fg is
where the parameters D1 and D2 are denoted as: greater than 1907, the value of K is greater than 0.
According to the above analysis, the satisfactory region of fg
D1 = [2π L + (rL + R)π Td + 2π (rL + K )CR] f c − 4π 3CLRTd f c3
and fc can be determined, which is plotted in the shadow in Fig.
(23) 10. In Fig. 10, point A is selected in the satisfactory region with

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fc= 1110 Hz and fg=1916 Hz. Substituting the selected fc and fg For the control parameter Ki, as mentioned earlier, it mainly
into (19) and (22), respectively, yields: affects the magnitude at the fundamental frequency instead of
K=0.89, Kp=1.71 (25) the stability of the system. Hence, Ki is selected as 10 to ensure
Moreover, as shown in Fig. 10, point B, C and D are selected the zero steady-state error at the fundamental frequency.
Bode Diagram
on the edge of the satisfactory region. Point E and F are selected 300
300
20
Bode Diagram

Ki=10
20

Magnitude(dB)
out of the region, which are out of the constraint line about K 15 15

200 Ki=20

Magnitude (dB)
200
and Kp and the constraint line about PM and GM, respectively.

Magnitude (dB)
10 10

Kp 100 0
100 5 Ki=30 5

40 50
360
60
0
270
0

Phase (deg)
180

8 8 66 90

-100
-100
0

360
360 -90

66
40 50 60
Frequency (Hz)

4
4 270
270

Phase(deg)
44

Phase (deg)
180
180

22 22 9090
00
0 0
Kp>0 Kp<0 -90
-90

-2-2
00 10 0
10
0
10 1
10
1
10 2
10
2
10 3fc fg
10
3
10 4
10
4
10 5
10
5

Frequency(Hz)
Frequency (Hz)

-4-4 -2
-2 Fig. 11. The bode diagram of the open loop transfer function of the system with
-6-6 K=0.89, Kp=1.71 and different Ki.
2000 1000
2000 1500 1500
1500
-4
1500 1000 2000
2000
-4
Fig. 11 illustrates the bode diagram of the open loop transfer
1000
500 2500
500 2500
fc(Hz) fg(Hz)
fg(Hz) function of the system with K=0.89, Kp=1.71 and different Ki. It
fc(Hz)
Fig. 9. The relationship of fc, fg and Kp. can be observed that all the cases are able to guarantee the
stability of the system with zero steady-state error and Ki=10
2500
reg ion has the optimal filtering performance around the fundamental
t i s f a ctory f
a frequency. Moreover, when Ki=10, the crossover frequency fc
y C S of f g and
c
Constrained d bby of the system is 1110 Hz, fg is 1916 Hz, PM is 57.50° and GM is
in e
tra 3dB
PM=60°
n s 4.04 dB, which all satisfy the aforementioned specifications.
F
2000 Co GM≥ D A B
According to the above analysis, the step-by-step parameter
design method can be summarized as:
fg(Hz)

by Step 1: Specify the phase margin and the gain margin of the
n s t r ained Constrained by system, determine the satisfactory region of fc and fg according
Co 3 dB
E
GM= K & Kp>0 to (10), (11) and define K>0 and Kp>0;
1500 Step 2: Choose the optimal values of fc and fg from the
Constrained by satisfactory region;
PM=30° Step 3: Calculate the control parameter K and Kp with the
selected fc and fg according to (19) and (22);
Step 4: Choose a proper Ki and validate the selected Ki.
1000 120
120
HRF-based v+ic control
500 1000 1500 2000
strategy
fc(Hz) 100
100
Single-loop voltage
Fig. 10. The satisfactory region of fg and fc. control strategy
PM(deg)

80
80
PM (dB)

The corresponding system performance indexes of Point B, 60

60

C, D, E and F are shown in Table II. From the indexes of point 40

40
B, C and D, it can be obtained that the max range of fc is from
1070 Hz to 1310 Hz and with the increase of fg, the range of fc 20
20
00 0.2
0.2 0.4
0.4 0.6
0.6 0.8
0.8 1 1.2
1.2 1.4
1.4 1.6
1.6 1.8
1.8 22
Td（s）
Td(s) −4
×x10
-4
decreases. Point E satisfies the specifications of the stable 10

margin with PM=41.88° and GM=3.94 dB, but the values of K (a)
30
30
and Kp are negative. Point F results positive K and Kp, but the HRF-based v+ic control
PM and GM are smaller than 30° and 3 dB, respectively, which 25
25 strategy
Single-loop voltage
are consistent with the theoretical analysis. 20
GM(dB)

20
control strategy
GM (dB)

TABLE II 15
15
SYSTEM PERFORMANCE INDEXES
Point A Point B Point C Point D Point E Point F 10
10

fc(Hz) 1110 1310 1170 1070 1170 1650 55

fg(Hz) 1916 1910 2260 1910 1670 2120
K 0.89 0.34 30 0.33 -23 19 00 11
00
0.8
0.8 1.2
1.2 1.4
1.4 1.6
1.6 1.8
1.8 0.2
0.2 22 0.4
0.4 0.6
0.6
Kp 1.71 5.06 0.07 4.40 -0.06 0.12 Td(s)
Td（s） 10-4−4
x×10
PM(deg) 57.50 40.71 60.82 60.85 41.88 26.60 (b)
GM(dB) 4.04 3.04 3.00 4.25 3.94 1.54 Fig. 12. The variation tendencies of the PM and GM of the systems.

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Transactions on Energy Conversion
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Fig. 12 illustrates the variation tendencies of the PM and GM

of the systems using the HRF-based v+ic control strategy and
single-loop voltage control strategy, respectively, with respect
to the system delay Td variation. It can be observed that the PM Vdc:[25V/div] vc:[25V/div]
and GM of both systems decrease when Td increases. However, Step point
when Td increases to 180 µs, the PM and GM of the system
using single-loop voltage control strategy are smaller than 30°
and 3 dB, respectively, while the system using HRF-based v+ic
control strategy remains a good stability margin with a PM of
about 44° and a GM of about 4 dB.
i0:[2.5A/div] Overshoot
IV. EXPERIMENTAL EVALUATION
To evaluate the effectiveness of the HRF-based v+ic control
Time:[10ms/div]
strategy with the designed control parameters, a downscaled
(a)
single-phase inverter system is set up, which consists of a
power dc source of 50V, a full-bridge MOSFET power module,
an LC filter, gate drivers and sensors. The control algorithm is
implemented in TMS320F28335 controller and the reference Vdc:[50V/div]
signal of d-axis in synchronous reference frame is set to 40V. vc:[25V/div]

Vdc:[50V/div] vc:[25V/div]

Time:[20ms/div] i0:[2.5A/div]
THD=3.68% i0:[2.5A/div] Step point
1-st
3-rd 5-th 7-th 9-th Time:[10ms/div]
(b)
Fig. 14. Experimental waveforms of transient performance of the inverter
when K=0.89, Kp=1.71 and Ki=10 (a) transient waveforms in response to
turning on the inverter; (b) transient waveforms undergoes nominal load to 200%
FFT:[10dBV 50Hz/div] nominal load step change.
Fig. 13. Experimental waveforms of the steady-state performance of the
inverters when K=0.89, Kp=1.71 and Ki=10 under nominal load (R=20Ω). Then, the steady-state performance and transient response of
the inverter with K=19, Kp=0.12, Ki=10, which corresponding
In the first case, the steady-state performance and transient to the point F in Section III, are investigated in Fig. 15 (a) and
performance of the inverter with K=0.89, Kp=1.71 and Ki=10 (b), respectively. From Fig. 15, it can be observed that the THD
are investigated, which are shown in Fig. 13 and Fig. 14, of the system under the steady state is 4.42% and the transient
respectively. In these figures, the channel 1 shows the DC link response time is about 7 ms, which mean that compared to the
voltage Vdc, channel 2 shows the capacitor voltage vc and case when K=0.89, Kp=1.71 and Ki=10, the parameters
channel 3 shows the load current i0. corresponding to point F can also achieve the steady-state but
In Fig. 13, it can be observed that the system achieves an with a relatively poor performance on the stability and the
excellent steady-state performance and the reference voltage transient response.
can be tracked accurately by the output voltage of the system.
The harmonic spectrum is shown as well. From the fast Fourier Vdc:[50V/div] vc:[25V/div]
transformation (FFT) analysis, it can be obtained that the total
harmonic distortion (THD) under this situation is 3.68%, which
shows a satisfied performance under this scenario.
Fig. 14 illustrates the transient performance of the inverter Time:[20ms/div] i0:[2.5A/div]
with K=0.89, Kp=1.71 and Ki=10. Fig. 14 (a) shows the THD=4.42%
transient waveforms in response to turning on the inverter. As 1-st
shown in Fig. 14 (a), the system tracks the reference voltage in 3-rd 5-th
4 ms with slight overshoot of about 2V during the transient 7-th 9-th
process, which shows a fast dynamic response and a strong
robustness. Fig. 14 (b) shows the transient response of the
inverter from nominal load to 200% nominal load condition. It
can be observed that during the transient process, slight ripples FFT:[10dBV 50Hz/div]
occur and the system achieves the steady-state in 3 ms, which (a)
shows a fast transient performance as well.

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Transactions on Energy Conversion
8

17 and Fig. 18, respectively. As shown in Fig. 17, when K

decreases, the capacitor voltage can not track the reference
Vdc:[25V/div] voltage accurately and the corresponding THD is 4.15%. When
vc:[25V/div] K increases, which is shown in Fig. 18, the waveforms of vc and
Step point i0 is distorted with the voltage THD of 4.74%, which means that
the inverter is slightly oscillating.

Vdc:[50V/div] vc:[25V/div]

i0:[2.5A/div]
Time:[20ms/div] i0:[2.5A/div]
THD=4.74%
Time:[10ms/div] 1-st
(b) 3-rd
Fig. 15. Experimental waveforms of the inverter when K=19, Kp=0.12 and
5-th 7-th 9-th
Ki=10 (a) the steady-state performance; (b) transient performance in response
to turning on the inverter.

Vdc:[50V/div] vc:[25V/div]
FFT:[10dBV 50Hz/div]
Fig. 18. Experimental waveforms of the steady-state performance of the
inverter with K=1.2, Kp=1.71 and Ki=10.

Time:[20ms/div] i0:[2.5A/div] Vdc:[50V/div] vc:[25V/div]

THD=4.00%
1-st
3-rd 5-th 7-th 9-th Time:[20ms/div] i0:[5A/div]
THD=4.09%
1-st
FFT:[10dBV 50Hz/div] 3-rd 5-th 7-th
Fig. 16. Experimental waveforms of the steady-state performance of the 9-th
inverter when K=0.89, Kp=2 and Ki=10.

Fig. 16 illustrates the experimental waveforms of the

steady-state performance of the inverter when Kp increases. In FFT:[10dBV 50Hz/div]
Fig. 16, Kp is increased to 2 and it can be observed that slight Fig. 19. Experimental waveforms of the steady-state performance of the
oscillations appear in the capacitor voltage and the load current inverters with K=0.89, Kp=1.71 and Ki=10 under RL load (R=10Ω, L=3.8mH).
with the voltage THD of about 4.00% under this scenario.
Vdc:[50V/div] vc:[25V/div]
Vdc:[50V/div] vc:[25V/div]

i0:[2.5A/div] i0:[5A/div]
Time:[20ms/div]
Time:[20ms/div] THD=5.15%
THD=4.15% 1-st
3-rd
1-st 5-th
3-rd 7-th 9-th
5-th
7-th
9-th

FFT:[10dBV 50Hz/div]
FFT:[10dBV 50Hz/div] Fig. 20. Experimental waveforms of the steady-state performance of the
inverters with K=0.89, Kp=1.71 and Ki=10 under nonlinear load (L=3.8mH,
C=2000µF, R=50Ω).
Fig. 17. Experimental waveforms of the steady-state performance of the
inverter with K=0.7, Kp=1.71 and Ki=10.
Finally, the steady-state performance of the inverters with
The effectiveness of the selected K is evaluated as follows. K=0.89, Kp=1.71 and Ki=10 under RL load and nonlinear load
The experimental waveforms of the steady-state performance is studied. Fig. 19 shows that the single-phase inverter is able to
of the inverter when K decreases and increases are shown in Fig. achieve the steady state under RL load conditions and the THD

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This article has been accepted for publication in a future issue of this journal, but has not been fully edited. Content may change prior to final publication. Citation information: DOI 10.1109/TEC.2017.2769114, IEEE
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strategy of single-phase inverter with voltage and current dual Electronic Science and Technology of China (UESTC),
closed-loop feedback,” IEEE Trans. Ind. Electron., vol. 60, no. 4, pp. Chengdu, China, in 2016. She is currently working
1306-1313, Apr. 2013. towards the M.S. degree in Power Electronics and Electric
[34] M. Monfared, S. Golestan, and J. M. Guerrero, “Analysis, design, and Drives at UESTC, Chengdu, China. Her current research
experimental verification of a synchronous reference frame voltage interests include the optimization of stand-alone PWM
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design of improved weighted average current control strategy for Ernane Antônio Alves Coelho received the B.S.
LCL-type grid-connected inverters," IEEE Trans. Energy Convers., vol. degree in electrical engineering from the Federal
32, no. 3, pp. 941-952, Feb. 2017. University of Minas Gerais, Belo Horizonte, Brazil, the
[36] Zhang X, Spencer J W, Guerrero J M, “Small-signal modeling of digitally M.S. degree from the Federal University of Santa
controlled grid-connected inverters with LCL filters,” IEEE Trans. Ind. Catarina, Florianopolis, Brazil, and the Ph.D. degree
Electron, vol. 60, pp.3752−3765, September 2013. from the Federal University of Minas Gerais in 1987,
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inverter based on a general mathematical model,” IEEE Trans. Power Uberlandia, where he is currently a Full Professor. His
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[38] F. Bosio, L. A. S. Ribeiro, F. D. Freijedo, M. Pastorelli, and J. M. Microgrid Modelling and Digital Control by microcontrollers and DSP’s.
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frame current control for single-phase grid-connected voltage-source and the Ph.D. degree in power electronics from the
converters,” IEEE Trans. Ind. Electron., vol. 63, no. 9, pp. 5425-5436, Technical University of Catalonia, Barcelona, in 1997,
Sept. 2016. 2000 and 2003, respectively. Since 2011, he has been a
[40] S. Kim, J. Im, E. Song, and R. Kim, “A new rotor position estimation Full Professor with the Department of Energy
method of IPMSM using all-pass filter on high-frequency rotating voltage Technology, Aalborg University, Denmark, where he is
signal injection,” IEEE Trans. Ind. Electron., vol. 63, no. 10, pp. responsible for the Microgrid Research Program. From
6499-6509, Oct. 2016. 2012 he is a guest Professor at the Chinese Academy of Science and the
[41] B. Wang, Y. Xu, Z. Shen, J. Zou, C. Li, and H. Liu, “Current control of Nanjing University of Aeronautics and Astronautics; from 2014 he is chair
grid-connected inverter with LCL filter based on extended-state observer Professor in Shandong University; from 2015 he is a distinguished guest
estimations using single sensor and achieving improved robust Professor in Hunan University; and from 2016 he is a visiting professor fellow
observation dynamics,” IEEE Trans. Ind. Electron., vol. 64, no. 7, pp. at Aston University, UK.
5428-5439, Jul. 2017. His research interests are oriented to different microgrid aspects, including
[42] C. L. Bao, X. B. Ruan, X. H. Wang, W. W. Li, D. H. Pan, and K. L. Weng, power electronics, distributed energy-storage systems, hierarchical and
“Step-by-step controller design for LCL-type grid-connected inverter cooperative control, energy management systems, smart metering and the
with capacitor-current-feedback active-damping,” IEEE Trans. Power internet of things for AC/DC microgrid clusters and islanded minigrids;
Electron., vol. 29, no. 3, pp. 1239-1253, Mar 2014. recently specially focused on maritime microgrids for electrical ships, vessels,
ferries and seaports. Prof. Guerrero is an Associate Editor for the IEEE
TRANSACTIONS ON POWER ELECTRONICS, the IEEE
Yang Han (S’08-M’10-SM’17) received the Ph.D. in TRANSACTIONS ON INDUSTRIAL ELECTRONICS, and the IEEE
Electrical Engineering from Shanghai Jiaotong University Industrial Electronics Magazine, and an Editor for the IEEE TRANSACTIONS
(SJTU), Shanghai, China, in 2010. He joined the on SMART GRID and IEEE TRANSACTIONS on ENERGY CONVERSION.
Department of Power Electronics, School of Mechatronics He has been Guest Editor of the IEEE TRANSACTIONS ON POWER
Engineering, University of Electronic Science and ELECTRONICS Special Issues: Power Electronics for Wind Energy
Technology of China (UESTC) in 2010, and has been an Conversion and Power Electronics for Microgrids; the IEEE
Associate Professor since 2013. From March 2014 to TRANSACTIONS ON INDUSTRIAL ELECTRONICS Special Sections:
March 2015, he was a visiting scholar (guest postdoc) in the Uninterruptible Power Supplies systems, Renewable Energy Systems,
area of renewable energy and microgrids at the Department Distributed Generation and Microgrids, and Industrial Applications and
of Energy Technology, Aalborg University, Aalborg, Denmark. His research Implementation Issues of the Kalman Filter; the IEEE TRANSACTIONS on
interests include AC/DC microgrids, grid-connected converters for renewable SMART GRID Special Issues: Smart DC Distribution Systems and Power
energy systems and DGs, phase-locked loop (PLL), power quality, active Quality in Smart Grids; the IEEE TRANSACTIONS on ENERGY
power filters and static synchronous compensators (STATCOMs). CONVERSION Special Issue on Energy Conversion in Next-generation
He has authored more than 20 ISI-indexed international journal papers and Electric Ships. He was the chair of the Renewable Energy Systems Technical
one book chapter in the area of power electronics, power quality conditioners, Committee of the IEEE Industrial Electronics Society. He received the best
and smart grid. He has served as the Session Chair in “Microgrid Optimization paper award of the IEEE Transactions on Energy Conversion for the period
and Scheduling” Session in the 2nd International Conference on Power and 2014-2015. In 2014 and 2015 he was awarded by Thomson Reuters as Highly
Renewable Energy (ICPRE) in Chengdu in 2017, and in “Power Quality Cited Researcher, and in 2015 he was elevated as IEEE Fellow for his
Mitigation and Application” Session in the 5th National Conference on Power contributions on “distributed power systems and microgrids.”
Quality in Xi’an in 2017, and in “AC/DC, DC/AC Power Converter” Session in
the 2016 IPEMC ECCE-Asia in Hefei, China. He was awarded “Baekhyun
Award” by the Korean Institute of Power Electronics (KIPE) in 2016. He
received the Best Paper Awards from the 6th Asia International Symposium on
Mechatronics in 2017, the 5th National Conference on Power Quality in 2017,
the Annual Conference of HVDC and Power Electronics Committee of Chinese
Society of Electrical Engineers (CSEE) in 2013, and the 4th International
Conference on Power Quality in 2008. He has eighteen issued and ten pending

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