K.L.E.

Society’s
KLE College of Engg. & Technology, Chikodi FORM
ISO 9001: 2015 - KLECET
DEPT. OF ELECTRONICS & COMMUNICATION. ENGG
Since 1916

Document #:
FMTC0302 Title: COURSE PLAN Rev: 1.1

Semester: III Academic Year: 2019-20

Course Title: Computer Organization & Architecture IA Marks: 40

Course Code: 18EC35 Duration of IA:1 hr
Total No. of Contact Hours of Teaching: 40 SEE Exam Marks: 60
L-T-P-S: 3-0-0-0 Credits: 3 Duration of USE: 3 hrs
Course Plan Author: Sign: Date:
Checked By: Sign: Date:

COURSE PRE-REQUISITES
Basic knowledge about Computer and its working, Basics of digital logics and number systems

OVERVIEW OF THE COURSE

The course enables the student to understand basic structure of computers and their types with
functional details. It also creates understanding of various addressing modes and instructions. It
discusses concepts related to interrupts and interrupt service subroutines to serve the device
request. Fundamental types of memory and their related concepts are discussed in detail.
Finally it covers the basic processing unit used to cover varies control sections such as
Hardwired and Multi programmed control.

COURSE OUTCOMES (COs)

On complétion of this course, student will be able to:
1. Explain the basic organization of a computer system.
2. Explain different ways of accessing an input / output device including interrupts.
3. Illustrate the organization of different types of semiconductor and other secondary storage
memories.
4. Illustrate simple processor organization based on hardwired control and micro programmed
control.

Dept. of ECE Page 1 of 8

 K.L.E. Society’s
KLE College of Engg. & Technology, Chikodi FORM
ISO 9001: 2015 - KLECET
DEPT. OF ELECTRONICS & COMMUNICATION. ENGG
Since 1916

Document #:
FMTC0302 Title: COURSE PLAN Rev: 1.1

COURSE CONTENT
Module Title and Content of the Module
Hours
No.
Basic Structure of Computers: Computer Types, Functional Units, Basic
Operational Concepts, Bus Structures, Software, Performance – Processor Clock,
Basic Performance Equation
1 Machine Instructions and Programs: Numbers, Arithmetic Operations and 8
Characters, IEEE standard for Floating point Numbers, Memory Location and
Addresses, Memory Operations, Instructions and Instruction Sequencing (upto
2.4.6 of Chap 2 and 6.7.1 of Chap 6 of Text).
Addressing Modes, Assembly Language, Basic Input and Output Operations,
2 8
Stacks and Queues, Subroutines, Additional Instructions
Input/Output Organization: Accessing I/O Devices, Interrupts – Interrupt
3 Hardware, Enabling and Disabling Interrupts, Handling Multiple Devices, 8
Controlling Device Requests, Direct Memory Access
Memory System: Basic Concepts, Semiconductor RAM Memories-Internal
organization of memory chips, Static memories, Asynchronous DRAMS, Read
4 8
Only Memories, Cash Memories, Virtual Memories, Secondary Storage-Magnetic
Hard Disks
Basic Processing Unit: Some Fundamental Concepts, Execution of a Complete
5 Instruction, Multiple Bus Organization, Hardwired Control, Microprogrammed 8
Control

RECOMMENDED REFERENCE BOOKS

(Text Books)
1. Carl Hamacher, ZvonkoVranesic, SafwatZaky: Computer Organization, 5th Edition, Tata
McGraw Hill,2002.
(Reference books)
1. David A. Patterson, John L. Hennessy: Computer Organization and Design – The Hardware /
Software Interface ARM Edition, 4th Edition, Elsevier, 2009.
2. William Stallings: Computer Organization & Architecture, 7th Edition, PHI, 2006.
3. Vincent P. Heuring& Harry F. Jordan: Computer Systems Design and Architecture, 2nd Edition,
Pearson Education, 2004.
LEARNING ACTIVITIES PLANNED
1. Assignments
2. Discussions
3. Seminar

Dept. of ECE Page 2 of 8

 K.L.E. Society’s
KLE College of Engg. & Technology, Chikodi FORM
ISO 9001: 2015 - KLECET
DEPT. OF ELECTRONICS & COMMUNICATION. ENGG
Since 1916

Document #:
FMTC0302 Title: COURSE PLAN Rev: 1.1

MODULE WISEPLAN
MODULE NO. MODULE TITLE PLANNED HOURS
1 Basic Structure of Computers 8

MODULE OUTCOMES (MOs)

On completion of this module, student should be able to:
1. Know the different functional units of computer
2. Understand working bus structures in computer and its linkings
3. Understand the concept of Numbers and various operations on it
4. Know the concept memory and addressing memory locations
5. Understand instructions & instruction sequencing
LECTURE SCHEDULE
Lecture No. Topics to be covered per Lecture

1 Computer Types, Functional Units

2 Basic Operational Concepts, Bus Structures, Software

3 Performance – Processor Clock

4 Basic Performance Equation

5 Numbers, Arithmetic Operations and Characters

6 IEEE standard for Floating point Numbers

7 Memory Location and Addresses, Memory Operations

8 Instructions and Instruction Sequencing

REVIEW QUESTIONS
1. Explain the functional block diagram of computer.
2. Describe the performance equation.
3. Discuss IEEE standard for Floating point Numbers.
4. What is memory. Discuss Memory Location and Addresses.
5. Discuss various memory operations.
6. What is an instruction? Discuss Instruction Sequencing.
7. Discuss aspects related to performance of computer.
8. Explain briefly the memory hierarchy and mention its importance.
9. What is Instruction sequencing. Mention its impact on the working of computer.
10. Discuss the bus structure in the computer and emphasize on importance of MAR and MDR.

Dept. of ECE Page 3 of 8

 K.L.E. Society’s
KLE College of Engg. & Technology, Chikodi FORM
ISO 9001: 2015 - KLECET
DEPT. OF ELECTRONICS & COMMUNICATION. ENGG
Since 1916

Document #:
FMTC0302 Title: COURSE PLAN Rev: 1.1

MODULE NO. MODULE TITLE PLANNED HOURS

2 Addressing Modes 8

MODULE OUTCOMES (MOs)

On completion of this module, student should be able to:
1. Explain the concept of addressing modes.
2. Discuss basic input & output operations in computers
3. Understand concept of stack & queue
4. Understand concept of subroutines and ISR

LECTURE SCHEDULE
Lecture No. Topics to be covered per Lecture

1 Addressing Modes, Assembly Language,

2 Basic Input and Output Operations

3 Stacks and Queues

4 Stacks and Queues contd.
5 Subroutines
6 Subroutines contd.
7 Additional Instructions
8 Additional Instructions contd.

REVIEW QUESTIONS
1. What is an addressing mode? Discuss its types.
2. Discuss Basic Input and Output Operations related to computers.
3. What is stack? Explain the working of stacks in detail.
4. What is queue? Explain the working of queue in detail.
5. Compare stacks & queues.
6. What are subroutines? Discuss various types of subroutines.
7. What are Instructions. Discuss briefly the set of additional instructions and their importance.
8. What is an ISR. Discuss in detail.
9. What actions does the computer take during execution of ISR and how control and commands
works.
10. Explain briefly the broad working of input and output operations.

Dept. of ECE Page 4 of 8

 K.L.E. Society’s
KLE College of Engg. & Technology, Chikodi FORM
ISO 9001: 2015 - KLECET
DEPT. OF ELECTRONICS & COMMUNICATION. ENGG
Since 1916

Document #:
FMTC0302 Title: COURSE PLAN Rev: 1.1

MODULE NO. MODULE TITLE PLANNED HOURS

3 Input/Output Organization 8

MODULE OUTCOMES (MOs)

On completion of this module, student should be able to:
1. Understand the working of I/O devices and their accessing process
2. Understand the concept of Interrupt and its types
3. Analyze the process of interrupt handling
4. Analyze the process of controlling devices and device request
5. Know the basics of DMA

LECTURE SCHEDULE
Lecture No. Topics to be covered per Lecture
1 Accessing I/O Devices

2 Accessing I/O Devices contd.

3 Interrupts – Interrupt Hardware
4 Enabling and Disabling Interrupts
5 Handling Multiple Device
6 Controlling Device Requests
7 Direct Memory Access

8 Direct Memory Access contd.

REVIEW QUESTIONS
1. Explain the concept of I/O device access.
2. What are interrupts and explain them in detail.
3. Explain the process of Enabling Interrupts.
4. Explain the process of Disabling Interrupts.
5. Explain in detail the process of handling multiple device request.
6. What is DMA. Explain the working of DMA process.
7. Discuss the ARM interrupt structure.
8. Explain the 68000 interrupt structure.
9. Comapre ARM and 68000 interrupt structure.
10. Write a short note on DMA.

Dept. of ECE Page 5 of 8

 K.L.E. Society’s
KLE College of Engg. & Technology, Chikodi FORM
ISO 9001: 2015 - KLECET
DEPT. OF ELECTRONICS & COMMUNICATION. ENGG
Since 1916

Document #:
FMTC0302 Title: COURSE PLAN Rev: 1.1

MODULE NO. MODULE TITLE PLANNED HOURS

4 Memory System 8

MODULE OUTCOMES (MOs)

On completion of this module, student should be able to:
1. Understand the basic concepts of memory and its structure
2. Analyze internal organizations of memory chips
3. Understand various types of memories such as Static memories and DRAM
4. Understand concept of ROM, and Cache memories
5. Understand various secondary memories

LECTURE SCHEDULE
Lecture No. Topics to be covered per Lecture
1 Basic Concepts, Semiconductor RAM Memories

2 Internal organization of memory chips

3 Static memories
4 Asynchronous DRAMS
5 Read Only Memories
6 Cash Memories
7 Virtual Memories

8 Secondary Storage-Magnetic Hard Disks

REVIEW QUESTIONS
1. Explain the basic concept of semiconductor RAM.
2. Explain the internal organization of memory chips.
3. Discuss on static memories.
4. Explain ROM in detail.
5. What are cache memories? Explain in detail.
6. Discuss about various secondary storage elements.
7. What are virtual memories? Discuss in detail.
8. Compare various versions of ROM and comment on efficiency factor of each.
9. Discuss memory mapping functions in detail.
10. List and discuss various Replacement algorithms.

Dept. of ECE Page 6 of 8

 K.L.E. Society’s
KLE College of Engg. & Technology, Chikodi FORM
ISO 9001: 2015 - KLECET
DEPT. OF ELECTRONICS & COMMUNICATION. ENGG
Since 1916

Document #:
FMTC0302 Title: COURSE PLAN Rev: 1.1

MODULE NO. MODULE TITLE PLANNED HOURS

5 Basic Processing Unit 8

MODULE OUTCOMES (MOs)

On completion of this module, student should be able to:
1. Understand the fundamentals of processing information in computers.
2. Understand the execution of instruction
3. Understand the bus structure and analyze information flow
4. Discuss hard wired and multi programmed control units.

LECTURE SCHEDULE
Lecture No. Topics to be covered per Lecture
1 Some Fundamental Concepts

2 Some Fundamental Concepts contd.

3 Execution of a Complete Instruction
4 Execution of a Complete Instruction contd.
5 Multiple Bus Organization
6 Multiple Bus Organization contd.
7 Hardwired Control
8 Micro programmed Control

REVIEW QUESTIONS
1. Describe the concepts in information processing in computers.
2. With neat diagram explain various blocks of information processing.
3. Discuss Multiple Bus Organization.
4. Explain Hardwired Control.
5. Explain Micro programmed Control.
6. Write the detailed steps happen during performing an arithmetic or logic operations.
7. Discuss actions required during Fetching a word.
8. Discuss actions required during storing a word.
9. Demonstrate the complete actions during Execution of a complete instruction.
10. Discuss on tasks related to various branch instructions.

Dept. of ECE Page 7 of 8

 K.L.E. Society’s
KLE College of Engg. & Technology, Chikodi FORM
ISO 9001: 2015 - KLECET
DEPT. OF ELECTRONICS & COMMUNICATION. ENGG
Since 1916

Document #:
FMTC0302 Title: COURSE PLAN Rev: 1.1

ASSESSMENT & EVALUATION

Assessment Marks
Internal Assessment - I (IA-I) 10
Internal Assessment - II (IA-II) 10
Additional Internal Assessment (Addl. IA) 10
Total of all IAs 30
Assignment, Quiz, PPT, etc [B] 10
Final IA Marks [A+B] 40

COURSE MODULARISATION FOR IA AND USE EXAMINATION

No. of Questions in No. of
Module Teaching
Module Questions
No. Hours IA-I IA-II Addl. IA
in USE
Basic Structure of
1 8 2 -- -- 2
Computers

2 8 2 -- -- 2
Addressing Modes
3 Input/Output Organization 8 -- 2 -- 2

4 Memory System 8 -- 2 2 2

5 Basic Processing Unit 8 -- -- 2 2

Answer Answer Answer Answer any
any two any two any two 5 questions
questions questions questions choosing at
least one
from each
module.

FACULTY IN-CHARGE

Name: Prof. D.D.Billur

Location: ECE Staff Room
Building/Block Name: ECE Block
Staff Room No.: 02
T: 9449219585 (Ext.:231)
Email-Id: darshankumar999@gmail.com

Date: Head of Department

(Seal & Signature)

Dept. of ECE Page 8 of 8