+

Lec01 - Introduction
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Course Learning Outcome (CLO)

1. To organize the structures and functions of the primary

components of computer such as system buses, registers, ALU,
control unit, memory, input-output devices and also the
characteristics of instructions sets of typical microprocessors.

2. To construct the ability to write simple assembly language

programs and also programs for the programmable
peripheral interface device with different interfacing
techniques.

3. To formulate the best solution and organization of single

processor systems, symmetric multiprocessors clusters, non-
uniform memory access and chip-level multiprocessors in
response to problems associated with computer architectures.
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Assessment

◼ Lab Reports (25%)

◼ 5 lab reports
◼ Lab 5 – Lab 10

◼ Written Test (25%)

◼ 17 May 2023 (Wednesday), 8-9pm
◼ Coverage: Lec1 – Lec7
◼ Format: 10 MCQ + 2 Structured

◼ Group Project (50%)

◼ 4 members (same lab section)
◼ Report + presentation
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Textbook

◼ William Stallings,
(2019). Computer
Organization and
Architecture, 11th
Edition, Prentice Hall
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Contents

◼ A brief history of computers

◼ Designing for performance

◼ The evolution of the Intel x86 architecture

Gernerations of Computer |1ST -- 5TH Generation Computers | Deeply Explained

- https://www.youtube.com/watch?v=sTc4kIVUnoA
 https://www.youtube.com/watch?v=gjVX47dLlN8
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History of Computers
First Generation: Vacuum Tubes
◼ ENIAC
◼ Electronic Numerical Integrator And Computer

◼ Designed and constructed at the University of Pennsylvania

◼ Started in 1943 – completed in 1946
◼ By John Mauchly and John Eckert

◼ World’s first general purpose electronic digital computer

◼ Was a response to U.S. needs during World War II
◼ Was not finished in time to be used in the war effort

◼ Its first task was to perform a series of calculations that were used to help
determine the feasibility of the hydrogen bomb

◼ Continued to operate under BRL management until 1955 when it was

disassembled
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ENIAC

Four ENIAC panels and one Detail of the back of a

of its three function tables section of ENIAC, showing
vacuum tubes

Vacumm tube
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ENIAC

◼ Features:
◼ Heavy - weighed 30 tons
◼ Huge - occupied 1500 square feet of floor space
◼ Contained more than 18,000 vacuum tubes
◼ High power consumption - 140 kW
◼ Capable of 5000 additions per second
◼ Decimal rather than binary machine
◼ Memory consisted of 20 accumulators, each capable of holding a
10 digit number
◼ Major drawback - the need for manual programming by setting
switches and plugging/unplugging cables
+ 9

John von Neumann

EDVAC (Electronic Discrete Variable Computer)

◼ First publication of the idea was in 1945

◼ Stored program concept

◼ Attributed to ENIAC designers, most notably the mathematician
John von Neumann
◼ Program represented in a form suitable for storing in memory
alongside the data. Program and data are stored in the same
memory.

◼ IAS computer
◼ Began in 1946 at the Princeton Institute for Advanced Studies
◼ Prototype of all subsequent general-purpose computers
◼ Completed in 1952 (7 years)
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Structure of von Neumann Machine

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Structure of von Neumann Machine

(2)
◼ IAS computer consists of:
◼ Main memory: stores both data and instructions
◼ Arithmetic and logic unit (ALU): operating on
binary data
◼ Control unit: interprets the instructions in
memory and causes them to be executed
◼ Input/output (I/O): equipment operated by the
control unit
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IAS Memory Formats

◼ The memory of the IAS consists ◼ Both data and instructions are
of 4096 storage locations stored there
(called words) of 40 bits each
◼ Numbers are represented in
binary form and each instruction
is a binary code
+
Structure
of
IAS
Computer
+ Registers
14

• Contains a word to be stored in memory or sent to

Memory buffer the I/O unit
register (MBR) • Or is used to receive a word from memory or from
the I/O unit

Memory address • Specifies the address in memory of the word to be

register (MAR) written from or read into the MBR

Instruction register • Contains the 8-bit opcode instruction being

(IR) executed

Instruction buffer • Employed to temporarily hold the right-hand

register (IBR) instruction from a word in memory

• Contains the address of the next instruction pair to

Program counter (PC) be fetched from memory

Accumulator (AC)
• Employed to temporarily hold operands and
and multiplier results of ALU operations
quotient (MQ)
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IAS
Operations
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Table 2.1

The IAS
Instruction
Set

Table 2.1 The IAS Instruction Set

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Commercial Computers
UNIVAC
◼ 1947 – Eckert and Mauchly formed the Eckert-Mauchly
Computer Corporation (currently Unisys) to manufacture
computers commercially

◼ UNIVAC I (Universal Automatic Computer)

◼ First successful commercial computer
◼ Was intended for both scientific and commercial applications
◼ Commissioned by the US Bureau of Census for 1950 calculations

◼ The Eckert-Mauchly Computer Corporation became part of the

UNIVAC division of the Sperry-Rand Corporation

◼ UNIVAC II – delivered in the late 1950’s

◼ Had greater memory capacity and higher performance

◼ Backward compatible
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18

◼ Was the major manufacturer of

punched-card processing
equipment

◼ Delivered its first electronic IBM 701

stored-program computer (701)
in 1953
◼ Intended primarily for
scientific applications IBM
◼ Introduced 702 product in 1955
◼ Hardware features made it
suitable to business
applications

◼ Series of 700/7000 computers

established IBM as the
overwhelmingly dominant
computer manufacturer
 Table 2.3 19

Example Members of the

IBM 700/7000 Series

Table 2.3 Example Members of the IBM 700/7000 Series

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History of Computers
Second Generation: Transistors
◼ Smaller

◼ Cheaper

◼ Dissipates less heat than a vacuum tube

◼ Is a solid state device made from silicon

◼ Was invented at Bell Labs in 1947

◼ It was not until the late 1950’s that fully transistorized

computers were commercially available
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Second Generation Computers

◼ Introduced:
◼ Appearance of the Digital
◼ More complex arithmetic
Equipment Corporation (DEC)
and logic units and control
units in 1957
◼ The use of high-level
◼ PDP-1 was DEC’s first
programming languages
computer
◼ Provision of system software
which provided the ability ◼ This began the mini-computer
to:
phenomenon that would
◼ load programs become so prominent in the
◼ move data to peripherals third generation
and libraries
◼ perform common
computations
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History of Computers
Third Generation: Integrated Circuits

◼ 1958 – the invention of the integrated circuit (IC)

◼ Discrete component
◼ Single, self-contained transistor
◼ Manufactured separately, packaged in their own containers, and
soldered or wired together onto masonite-like circuit boards
◼ Manufacturing process was expensive and cumbersome

◼ The two most important members of the third generation

were the IBM System/360 and the DEC PDP-8
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Microelectronics
• A gate is a device that implements a simple Boolean or
logical function, such as IF A AND B ARE TRUE, THEN C IS TRUE
(AND gate).

• The memory cell is a device that can store one bit of data;
that is, the device can be in one of two stable states at any
time.
+ ◼ A computer consists of gates,
24

Integrated memory cells, and

interconnections among these
Circuits elements

◼ The gates and memory cells

◼ Data storage – provided by are constructed of simple
memory cells digital electronic components
◼ Data processing – provided by
gates ◼ Exploits the fact that such
components as transistors,
resistors, and conductors can be
◼ Data movement – the paths fabricated from a
among components are used semiconductor such as silicon
to move data from memory to
memory and from memory ◼ Many transistors can be
through gates to memory produced at the same time on a
single wafer of silicon
◼ Control – the paths among
components can carry control ◼ Transistors can be connected
signals with a processor metallization to
form circuits
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Wafer,
Chip,
and
Gate
Relationship
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Chip Growth
Moore’s Law 27

1965; Gordon Moore – co-founder of Intel

Observed number of transistors that could

be put on a single chip was doubling every
year
Consequences of Moore’s law:
The pace slowed to
a doubling every 18
months in the Computer
1970’s but has The cost of
The electrical becomes
computer
sustained that rate logic and
path length is smaller and is Reduction in
Fewer
ever since shortened, more power and
memory interchip
increasing convenient to cooling
circuitry has use in a variety connections
operating requirements
fallen at a of
speed
dramatic rate environments
+ LSI
Large
Scale
Later Integration

Generations
VLSI
Very Large
Scale
Integration

ULSI
Semiconductor Memory Ultra Large
Microprocessors Scale
Integration
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Microprocessors
◼ The density of elements on processor chips continued to rise
◼ More and more elements were placed on each chip so that fewer
and fewer chips were needed to construct a single computer
processor

◼ 1971 Intel developed 4004

◼ First chip to contain all of the components of a CPU on a single
chip
◼ Birth of microprocessor

◼ 1972 Intel developed 8008

◼ First 8-bit microprocessor

◼ 1974 Intel developed 8080

◼ First general purpose microprocessor
◼ Faster, has a richer instruction set, has a large addressing
capability
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Intel Microprocessors

4004 8008 8080 8086 8088

80286 386TM 486TM DX

Evolution of Intel Microprocessors 31

a. 1970s Processors

b. 1980s Processors
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Intel Microprocessors

Pentium Pentium Pro Pentium II Pentium III

Pentium 4 Core 2 Duo Core i7

Evolution of Intel Microprocessors 33

c. 1990s Processors

d. Recent Processors
 Table 2.2
Computer Generations

+
Computer Generations

34
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Microprocessor Speed
Techniques built into contemporary processors include:

• Processor moves data or

Pipelining instructions into a conceptual pipe
with all stages of the pipe
processing simultaneously

• Processor looks ahead in the

Branch instruction code fetched from
memory and predicts which

prediction branches, or groups of

instructions, are likely to be
processed next
• Processor analyzes which
Data flow instructions are dependent on
each other’s results, or data, to
analysis create an optimized schedule of
instructions

• Using branch prediction and data

Speculative flow analysis, some processors
speculatively execute instructions
execution ahead of their actual appearance
in the program execution
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Performance
Balance
◼ Adjust the organization and Increase the number
of bits that are
architecture to compensate retrieved at one time
by making DRAMs
for the mismatch among the “wider” rather than
“deeper” and by
capabilities of the various using wide bus data
paths
components
Reduce the
◼ Architectural examples frequency of memory
access by
include: incorporating
increasingly
complex and
efficient cache
structures between
the processor and
main memory

Increase the
Change the DRAM interconnect
interface to make it bandwidth between
more efficient by processors and
including a cache or memory by using
other buffering higher speed buses
scheme on the DRAM and a hierarchy of
chip buses to buffer and
structure data flow
Typical I/O Device Data Rates 37
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Improvements in Chip
Organization and Architecture
◼ Increase hardware speed of processor
◼ Fundamentally due to shrinking logic gate size
◼ More gates, packed more tightly, increasing clock rate
◼ Propagation time for signals reduced

◼ Increase size and speed of caches

◼ Dedicating part of processor chip
◼ Cache access times drop significantly

◼ Change processor organization and architecture

◼ Increase effective speed of instruction execution
◼ Parallelism
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Problems with Clock Speed and

Logic Density Increases
◼ Power
◼ Power density increases with density of logic and clock speed
◼ Dissipating heat

◼ RC (Resistive-Capacitive) delay
◼ Speed at which electrons flow limited by resistance and
capacitance of metal wires connecting them
◼ Delay increases as RC product increases
◼ Wire interconnects thinner, increasing resistance
◼ Wires closer together, increasing capacitance

◼ Memory latency
◼ Memory speeds lag processor speeds
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40

Processor
Trends
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41
Overview
ARM
◼ Results of decades of design effort on
complex instruction set computers Intel
(CISCs)

◼ Excellent example of CISC design

◼ Incorporates the sophisticated design

principles once found only on
mainframes and supercomputers

◼ An alternative approach to processor

design is the reduced instruction set
x86 Architecture
computer (RISC)

◼ The ARM architecture is used in a

wide variety of embedded systems
and is one of the most powerful and
best designed RISC based systems on
the market

◼ In terms of market share Intel is CISC

ranked as the number one maker of
microprocessors for non-embedded
systems RISC
 ◼ 8080 42
◼ First general purpose microprocessor
◼ 8-bit machine with an 8-bit data path to
memory
◼ Used in the first personal computer (Altair)

◼ 8086
◼ 16-bit machine
◼ Used an instruction cache, or queue
◼ First appearance of the x86 architecture

x86 Evolution ◼ 8088

◼ used in IBM’s first personal computer
+
◼ 80286
◼ Enabled addressing a 16-MByte memory
instead of just 1 MByte

◼ 80386
◼ Intel’s first 32-bit machine
◼ First Intel processor to support multitasking

◼ 80486
◼ More sophisticated cache technology and
instruction pipelining
◼ Built-in math coprocessor
x86 Evolution - Pentium

Pentium Pentium Pro Pentium II Pentium III Pentium 4

• Superscalar • Increased • MMX • Additional • Includes

superscalar technology floating-point
• Multiple
instructions
executed in
+ organization
• Aggressive
• Designed
specifically to
instructions to
support 3D
additional
floating-point
and other
parallel register process video, graphics enhancements
renaming audio, and software for multimedia
• Branch graphics data
prediction
• Data flow
analysis
• Speculative
execution

43
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x86 Evolution (continued)

◼ Core
◼ First Intel x86 microprocessor
Instruction set with a dual core, referring to
architecture is the implementation of two
backward
compatible with processors on a single chip
earlier versions
◼ Core 2
◼ Extends the architecture to 64
X86
architecture bits
continues to ◼ Recent Core offerings have
dominate the
processor up to 10 processors per chip
market outside
of embedded
systems
+ Summary
45

Introduction
Lec 01
◼ Performance designs
◼ First generation computers ◼ Microprocessor speed
◼ Vacuum tubes ◼ Performance balance
◼ Second generation computers ◼ Chip organization and
◼ Transistors architecture

◼ Third generation computers ◼ Evolution of the Intel x86

◼ Integrated circuits