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Slide CA Chapter 1 Lecture 1

The document discusses the history and evolution of computer architecture. It describes the four main generations of computers: (1) first generation used vacuum tubes, (2) second generation used transistors instead of tubes, (3) third generation used integrated circuits which packaged multiple transistors onto a single silicon chip, and (4) fourth generation includes modern computers with multiple cores on a single processor. It provides details on influential early computers like the IAS and IBM System/360 that demonstrated fundamental concepts and drove the industry forward.

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0% found this document useful (0 votes)
41 views

Slide CA Chapter 1 Lecture 1

The document discusses the history and evolution of computer architecture. It describes the four main generations of computers: (1) first generation used vacuum tubes, (2) second generation used transistors instead of tubes, (3) third generation used integrated circuits which packaged multiple transistors onto a single silicon chip, and (4) fourth generation includes modern computers with multiple cores on a single processor. It provides details on influential early computers like the IAS and IBM System/360 that demonstrated fundamental concepts and drove the industry forward.

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COMPUTER ARCHITECTURE

Chapter 1: Introduction
Lecture 1: Basic Concepts, Computer
Evolution and Performance Issues
Contents

1.1. Basic Concepts


1.2. A Brief History of Computers
1.3. Moore’s Law
1.4. The Intel x86 and ARM architecture
1.5. Performance Issues
Computer Architecture
Computer Organization

Computer Architecture Computer Organization


• Attributes of a system visible to • The operational units and their
the programmer interconnections that realize the
• Have a direct impact on the logical architectural specifications
execution of a program

Architectural attributes include: Organizational attributes


• Instruction set include:
• Number of bits used to represent various • Instruction set, number of bits used
data types to represent various data types,
• I/O mechanisms I/O mechanisms, techniques for
addressing memory
• Techniques for addressing memory
IBM System
370 Architecture
• IBM System/370 architecture
• Was introduced in 1970
• Included a number of models
• Could upgrade to a more expensive, faster model without having to abandon
original software
• New models are introduced with improved technology, but retain the same
architecture so that the customer’s software investment is protected
• Architecture has survived to this day as the architecture of IBM’s mainframe
product line
Structure and Function

• Hierarchical system • Structure


• Set of interrelated subsystems • The way in which components
relate to each other
• Hierarchical nature of complex
• Function
systems is essential to both their
• The operation of individual
design and their description components as part of the
• Designer need only deal with a structure
particular level of the system at a
time
• Concerned with structure and function
at each level
Function

• There are four basic functions that a computer can perform:


• Data processing
• Data may take a wide variety of forms and the range of processing requirements is
broad
• Data storage
• Short-term
• Long-term
• Data movement
• Input-output (I/O) - when data are received from or delivered to a device (peripheral)
that is directly connected to the computer
• Data communications – when data are moved over longer distances, to or from a
remote device
• Control
• A control unit manages the computer’s resources and orchestrates the performance of
its functional parts in response to instructions
Structure
Simple single-processor computer

• There are four main structural


components of the computer:
• CPU – controls the operation of the
computer and performs its data processing
functions
• Main Memory – stores data
• I/O – moves data between the computer
and its external environment
• System Interconnection – some mechanism
that provides for communication among
CPU, main memory, and I/O
• Control Unit
• Controls the operation of the CPU and
hence the computer
• Arithmetic and Logic Unit (ALU)
CPU • Performs the computer’s data processing
function
Major structural
components: • Registers
• Provide storage internal to the CPU
• CPU Interconnection
• Some mechanism that provides for
communication among the control unit,
ALU, and registers
Structure
Multicore Computer

• Central processing unit (CPU)


• Portion of the computer that fetches and executes instructions
• Consists of an ALU, a control unit, and registers
• Referred to as a processor in a system with a single processing unit
• Core
• An individual processing unit on a processor chip
• May be equivalent in functionality to a CPU on a single-CPU system
• Specialized processing units are also referred to as cores
• Processor
• A physical piece of silicon containing one or more cores
• Is the computer component that interprets and executes instructions
• Referred to as a multicore processor if it contains multiple cores
Contents

1.1. Basic Concepts


1.2. A Brief History of Computers
1.3. Moore’s Law
1.4. The Intel x86 and ARM architecture
1.5. Performance Issues
Computer Generations
a. First Generation: Vacuum Tubes

• Vacuum tubes were used for digital logic elements and memory
• IAS computer
• Fundamental design approach was the stored program concept
• Attributed to the mathematician John von Neumann
• First publication of the idea was in 1945 for the EDVAC
• Design began at the Princeton Institute for Advanced Studies
• Completed in 1952
• Prototype of all subsequent general-purpose computers
• The IAS computer consists of
• A main memory, which stores
both data and instructions
• An arithmetic and logic unit
(ALU) capable of operating on
binary data
• A control unit, which interprets
the instructions in memory and
causes them to be executed
• Input–output (I/O) equipment
operated by the control unit
IAS computer
IAS computer
Memory buffer register • Contains a word to be stored in memory or sent to the I/O unit
(MBR) • Or is used to receive a word from memory or from the I/O unit

Memory address register • Specifies the address in memory of the word to be written from or read
(MAR) into the MBR

Instruction register (IR) • Contains the 8-bit opcode instruction being executed

Instruction buffer register • Employed to temporarily hold the right-hand instruction from a word in
(IBR) memory

• Contains the address of the next instruction pair to be fetched from


Program counter (PC) memory

Accumulator (AC) and • Employed to temporarily hold operands and results of ALU operations
multiplier quotient (MQ)
IAS computer

• The IAS
computer had a
total of 21
instructions
b. Second Generation: Transistors

• Smaller
• Cheaper
• Dissipates less heat than a vacuum tube
• Is a solid state device made from silicon
• Was invented at Bell Labs in 1947
• It was not until the late 1950’s that fully transistorized computers were
commercially available
Second Generation Computers

• Introduced:
• More complex arithmetic and logic units and control units
• The use of high-level programming languages
• Provision of system software which provided the ability to:
• Load programs
• Move data to peripherals
• Libraries perform common computations
c. Third Generation: Integrated Circuits

• 1958 – the invention of the integrated circuit


• Discrete component
• Single, self-contained transistor
• Manufactured separately, packaged in their own containers, and
soldered or wired together onto masonite-like circuit boards
• Manufacturing process was expensive and cumbersome
• The two most important members of the third generation were
the IBM System/360 and the DEC PDP-8
Integrated Circuits
Integrated Circuits

• Data storage – provided by • A computer consists of gates, memory


memory cells cells, and interconnections among these
elements
• Data processing – provided by • The gates and memory cells are
gates constructed of simple digital electronic
components
• Data movement – the paths among • Exploits the fact that such components
components are used to move data as transistors, resistors, and conductors
from memory to memory and from can be fabricated from a semiconductor
memory through gates to memory such as silicon
• Many transistors can be produced at the
• Control – the paths among same time on a single wafer of silicon
components can carry control • Transistors can be connected with a
signals processor metallization to form circuits
Integrated Circuits

• A thin wafer of silicon is divided into


a matrix of small areas, each a few
millimeters square. The identical
circuit pattern is fabricated in each
area, and the wafer is broken up into
chips.
• Each chip consists of many gates
and/or memory cells plus a number
of input and output attachment
points.
• This chip is then packaged in housing
that protects it and provides pins for
attachment to devices beyond the
chip.
IBM System/360

• Announced in 1964
• Product line was incompatible with older IBM machines
• Was the success of the decade and cemented IBM as the
overwhelmingly dominant computer vendor
• The architecture remains to this day the architecture of IBM’s
mainframe computers
• Was the industry’s first planned family of computers
• Models were compatible in the sense that a program written for one
model should be capable of being executed by another model in the
series
Family Characteristics

Similar or Similar or
identical identical Increasing speed
instruction set operating system

Increasing
Increasing
number of I/O Increasing cost
memory size
ports
d. Later Generations

• There have been a number of later generations, based on advances in


integrated circuit technology.
• Large scale integration (LSI), more than 1,000 components can be placed
on a single inte grated circuit chip.
• Very-large-scale integration (VLSI) achieved more than 10,000 components
per chip
• Current ultra-large-scale integration (ULSI) chips can contain more than
one billion components.
• Two of the most important results:
• Semiconductor Memory
• Microprocessors
Contents

1.1. Basic Concepts


1.2. A Brief History of Computers
1.3. Moore’s Law
1.4. The Intel x86 and ARM architecture
1.5. Performance Issues
Moore’s Law

• 1965; Gordon Moore – co-founder of Intel

Observed number of transistors that could be put


on a single chip was doubling every year

Consequences of Moore’s law:


The pace slowed to a
doubling every 18
months in the 1970’s
but has sustained that The cost of
The electrical Computer becomes
computer logic Reduction in
rate ever since and memory
path length is smaller and is more
power and Fewer interchip
shortened, convenient to use in
circuitry has a variety of cooling connections
increasing
fallen at a environments requirements
operating speed
dramatic rate
Contents

1.1. Basic Concepts


1.2. A Brief History of Computers
1.3. Moore’s Law
1.4. The Intel x86 and ARM architecture
1.5. Performance Issues
The Intel x86 and the ARM architectures

• Two processor families are the Intel x86 and the ARM
architectures
• Current x86 offerings represent the results of decades of design
effort on complex instruction set computers (CISCs)
• An alternative approach to processor design is the reduced
instruction set computer (RISC)
• ARM architecture is used in a wide variety of embedded
systems and is one of the most powerful and best-designed
RISC-based systems on the market
Highlights of the Evolution of the
Intel Product Line:
8080 8086 80286 80386 80486
• World’s first • A more powerful • Extension of the • Intel’s first 32- • Introduced the
general-purpose 16-bit machine 8086 enabling bit machine use of much
microprocessor • Has an addressing a 16- • First Intel more
• 8-bit machine, 8- instruction MB memory processor to sophisticated
bit data path to cache, or queue, instead of just support and powerful
memory that prefetches a 1MB multitasking cache
• Was used in the few instructions technology and
first personal before they are sophisticated
computer executed instruction
(Altair) • The first pipelining
appearance of • Also offered a
the x86 built-in math
architecture coprocessor
• The 8088 was a
variant of this
processor and
used in IBM’s
first personal
computer
(securing the
success of Intel
Highlights of the Evolution of the
Intel Product Line:
Pentium

• Intel introduced the use of superscalar techniques, which allow multiple instructions to execute in parallel

Pentium Pro

• Continued the move into superscalar organization with aggressive use of register renaming, branch prediction, data flow
analysis, and speculative execution

Pentium II

• Incorporated Intel MMX technology, which is designed specifically to process video, audio, and graphics data efficiently

Pentium III

•The Pentium III incorporates additional floating-point instructions to support 3D graphics software

Pentium 4

• Includes additional floating-point and other enhancements for multimedia


Highlights of the Evolution of the
Intel Product Line:

Core

• First Intel x86 micro-core

Core 2

• Extends the Core architecture to 64 bits


• Core 2 Quad provides four cores on a single chip
• More recent Core offerings have up to 10 cores per chip
• An important addition to the architecture was the Advanced Vector Extensions instruction set
ARM architecture

• Family of RISC-based microprocessors and microcontrollers


designed by ARM Holdings, Cambridge, England
• Chips are high-speed processors that are known for their small
die size and low power requirements
• Probably the most widely used embedded processor architecture
and indeed the most widely used processor architecture of any
kind in the world
ARM Products

Cortex-M
• Cortex-M0
Cortex-R • Cortex-M0+
• Cortex-M3
Cortex- • Cortex-M4
A/Cortex-A50
Contents

1.1. Basic Concepts


1.2. A Brief History of Computers
1.3. Moore’s Law
1.4. The Intel x86 and ARM architecture
1.5. Performance Issues
Designing for Performance

• Microprocessor Speed
• Performance Balance
• Improvements in Chip Organization and Architecture
Microprocessor Speed

• Techniques built into contemporary processors include:


• Pipelining
• Processor moves data or instructions into a conceptual pipe with all stages of the pipe processing
simultaneously
• Branch prediction
• Processor looks ahead in the instruction code fetched from memory and predicts which branches,
or groups of instructions, are likely to be processed next
• Superscalar execution
• This is the ability to issue more than one instruction in every processor clock cycle. (In effect,
multiple parallel pipelines are used.)
• Data flow analysis
• Processor analyzes which instructions are dependent on each other’s results, or data, to create an
optimized schedule of instructions
• Speculative execution
• Using branch prediction and data flow analysis, some processors speculatively execute instructions
ahead of their actual appearance in the program execution, holding the results in temporary
locations, keeping execution engines as busy as possible
Performance Balance

• Adjust the organization and architecture to compensate for the


mismatch among the capabilities of the various components
• Architectural examples include:
• Increase the number of bits that are retrieved at one time by making
DRAMs “wider” rather than “deeper” and by using wide bus data paths
• Change the DRAM interface to make it more efficient by including a cache
or other buffering scheme on the DRAM chip
• Reduce the frequency of memory access by incorporating increasingly
complex and efficient cache structures between the processor and main
memory
• Increase the interconnect bandwidth between processors and memory by
using higher speed buses and a hierarchy of buses to buffer and structure
data flow
Improvements in Chip Organization
and Architecture
• Increase hardware speed of processor
• Fundamentally due to shrinking logic gate size
• More gates, packed more tightly, increasing clock rate
• Propagation time for signals reduced
• Increase size and speed of caches
• Dedicating part of processor chip
• Cache access times drop significantly
• Change processor organization and architecture
• Increase effective speed of instruction execution
• Parallelism
Multicore

• The use of multiple processors on the same chip provides the


potential to increase performance without increasing the clock
rate
• Strategy is to use two simpler processors on the chip rather than
one more complex processor
• With two processors larger caches are justified
• As caches became larger it made performance sense to create
two and then thre
Basic measures of computer performance

• Clock speed
• Instruction execution rate
Basic measures of computer performance

• Clock speed
• Instruction execution rate
Clock speed
Instruction Execution Rate

• A common measure of performance for a processor is the rate at which


instructions are executed, expressed as millions of instructions per second
(MIPS), referred to as the MIPS rate.
Summary

• Organization and architecture • Designing for performance


• Structure and function • Microprocessor speed
• Performance balance
• Brief history of computers • Improvements in chip
• The First Generation: Vacuum tubes organization and architecture
• The Second Generation: Transistors • Multicore
• The Third Generation: Integrated
Circuits • Basic measures of computer
• Later generations performance
• Clock speed
• Moore’s Law • Instruction execution rate
• The Intel x86 and ARM architecture
• Images and content in this lecture refer to The book and
Lecture slides “Computer Organization and Architecture”, 10th
Edition, by William Stallings.
THANK YOU

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