TOSHIBA TimPsoPM40 CMOS 8-BIT MICROCONTROLLERS TMP9OPMA4ON / TMP90PM40F 1, OUTLINE AND CHARACTERISTICS The TMP90PMA40 is a system evalution LSI having a built in One-Time PROM for TMP90CM40. A programming and verification for the internal PROM is achieved by using a general EPROM programmer with an adapter socket. ‘The function of this device is exactly same as the TMP90CM40 by programming to the internal PROM. The different points between TMP90PM40 and TMP90C840A are the memory size (ROM/RAM) ‘The following are the memory map of TMP90CM40 and TMP90C840A. ‘00000H o0000H internal ROM Cana internal ine (32K byte) 02000H 8000 re External Memory (31K byte) (56K byte) LT internal RAM a (ikbyte) Internal RAM oFFcoHi orFcou internal (0 internali/0 (48byte) (48byte) oFFFow osFow External Memory External Memory 6 Habe) 10000H asl 10000H ee External Memory External Memory (960K byte) (960K byte) a rerrey Lo TMPa0cM40 Memory Map “TP90CB40A Memory Map ae ‘The TMP90PM40N is in a Shrink Dual Inline Package (SDIP64-P-750). ‘The TMP90PM40F is in a Quad Flat Package (QFP64-P-1420A). oT PARTS NO ROM ram | Package —_| ADAPTERSOCK’ TuPaopaan | OTP | [sasor BMTTISA = sareaxcebit | 1024x obit z BM1116A TP90PM0F [sere —— Ter Mcus0-61TOSHIBA TMP90PM40 a cowtnoute vee P8O/ INTO —_ VSS (GND) waren 906 ae a 2 raornxo P3179 SERAL 1/0 ou parts sc “ x mmo arene ao Arp 00-107 vase convener rand 6077017190 stom reno noron Penson cont¥oL Pont pio-oi7 pears or | tata? morros/i0 Trews rnin moron 73/13. 1 rao-rar earns cranny Ten sit eam ron 7 ra6/R cru) |= parva reaver evenreoviren Lb, rsonres rsirosivor ‘tar ic F> rasewae ‘ren Figure 1 TMPS90PMA0 Block Diagram Mcus0-62TOSHIBA TMP9OPM40 2. PIN ASSIGNMENT AND FUNCTIONS 2.1 Pin Assignment Figure 2.1 (1) shows pin assignment of the TMP90PM40N. Bi vec [P37 (WAT) p36 (WA) [P35 (RD) fp34 (CTS) FaP33 (TxD) Fip32 (1xD/ATS/SCLK) (ANS) p31 (RxD) «ro /1m00) [P30 (RxD) (won Fra (oz) pas (19) (103) Eipaz (ai8) (03/0) P70 413 par (a7) (vin) P7114 P40 (16) (m2) P7215 P27 (A15) (wa) 73] 16 49Fp26 (a14) (wnT0) P80. 17 43 D0p25 (A13) (NTt/TI4) P8tC]18 47 Fip2a (a2) (INT2/715) P82 419 46 Fip23 (att) (703/To4) P83 C20 45 Eip22 (a10) Nati C21 44 Fip21 (a9) RESET C22 43 Fip20 (a8) clk 23 42PI7 (a7) (00) P00 C]24 41 pe (a6) (or) Por C25 40 p15 (As) (02) Po2 26 3914 (Aa) (03) P03 C27 38 P13 (a3) (04) P04 C28 37 Fp (a2) (05) Pos C23 36 P11 (ad) (08) Pos C30 355 p10 (a0) (07) po7 31 34 x2 (GND) Vss 5] 32 3x1 cooe%0 Figure 2.1 (1) Pin Assignment (64-SDIP) MCU90-63TOSHIBA TMP90PM40 Figure 2.1 (2) shows pin assignment of the TMP90PM40F. no sees Pista (oxo) 708 rates) Gane prea) (735 Pr0100 (m6 x eomra x ve Vigto we 710 fait #006) (100750 sos) tas o8(09) tannyes2 03 (03) oayest 2002) Figure 2.1 (2) Pin Assignment (64-F?) Mcus0-64TOSHIBA 2.2 Pin Names and Functions ‘TMP9OPM40 ‘The TMP90PM40 has MCU mode and PROM mode. (1) MCU Mode (The TMP90CM40 and the TMP90PM40 are pin compatiple) Pin Name Pin Names and Functions (1/2) No. of pins | /0 3states Function P00~PO7 @ VO [Perea BVO por thet allows selection of npivoutut on bye oo~D7 Fatates [Data bus: Also functions as &-bit bidirectional data bus for external memory P10~PI7 3 TO [Port 1: 8 biLVO port that allows selection on byte basis a0~A7 ‘Output [Address bus: The lower 8 bits address bus for external memory P20~P27 3 TO [Port 2: &-bIt/O port that ellows selection on bit basis, iae~A1s Output | Address bus: The upper 8 bits address bus for external memory P30 7 Tnpat |[Por30: bit input port RxD Receiver Serial Data Pat 7 input [Port3i: }-bitinput port x0 Receiver Serial Data P32 1 Output | Port 32: 1-bit output port iro Transmitter serial Data ars Request to send serial data /SCLK Serial clock output P33 7 Output [Port33: Toit output port xD ransmitter Serial Data P34 7 input [Pore 34: t-bitinput port crs Clear to send Se P35 7 Output |Pora5: j-bitoutputpor Ro Read: Generates strobe signal or reading external memory P36 7 Output [Porta6: -bitoutputpert WR Write: Generates strobe signal for writing into external memory P37 7 | input [Porta7: bitinput port WATT Wait: Input pin for connecting slow speed memory or peripheral isi Pao~Pa3 @ | output |porté; abit output port that allows selection of PorvAaddress Bus jon bit basis iar6~Ai9 [Address bus: Also functions as address bus for external memory (4 bits of bank address) P50~P55 6 input [Ports: G-bitinputpot /ANO~ANS ‘Analog input: 6 analog inputs to A/D converter 261190 MCU90-65TOSHIBA ‘TMP90PM40 Pin Names and Functions (2/2) Pin Name | No. of pins | 0 3 states Function Input of reference voltage to A/D converter Ground pin for A/D converter Port 6: 4-bit /0 port that allows /O selection on bit basis Timer output 3: Output of Timer 2 or 3 Port 80: 1-bit input port Interrupt request pin 0: interrupt request pin (Leyellising edge is programmable) SS Port 81: 1-bitinput port Interrupt request pin 1: interrupt request pin (Risingfalling edge is programmable) Timerinput 4: Counter/capture trigger signal for Timer 4 Porta2: 1-bit input port Interrupt request pin 2: rising edge interrupt request pin Timer input 5: capture trigger signal for Timer 4 Output [Port 83: 1-bit output port Timer output 3/4: Output of Timer 2, 3 or 4 Input _ [Non-maskable interrupt request pin Falling edgeinterruptrequest pin. Output [Clock output: Generates clock pulse at 1/4 frequency of clock oscillation. itis Pulled up internally during resetting. Input [extemal access: Connects with Vec pin in the TMP3OPMA0, Input __[Reset : Initializes the TMP90PN40, (Built in pull-up resister) Input’ [Pin for quartz crystal or ceramic resonator Output Power supply (+5V) (Ground (OV) MCU90-66TOSHIBA (2) PROM Mode Pin Function Table 2.1 Function Address Input ‘TMP90PM40 Pin Name (MCU mode) PI7~P10, P26~P20 Befixed to “L" level. P27 Data InpuvOutput Po7~Poo Output Enable input P35, Chip Enable input P36 32.5V/5V (Programming Power Supply) Ex 5V ov Pin Setting Be fixed to “L" level. Open. Be fixed to “L” level. Pas~P40 Open P55~Ps0 P63~P60 P73~P70 P82~P80 Be fixed to “L” level. Open Be fixed to “L” level. Input Be fixed to “L” level. Be fixed to “L” level. Input Input Be fixed to "L" level. Be fixed to “H" level, Input ‘Output Resonator connection pin Mcus0-67TOSHIBA ‘TMP9OPM40 3. MEMORY MAP ‘The memory map is same as that of TMP90CM40. Figure 3 shows the memory map of TMP90PM40, and the accessing area by the respective addressing mode. ‘000004 08000H oFBCOH OFFOOH OFFCOH OFFFOH 10000 FFFFFH Internal PROM (32K byte) External Memory (31K byte) Li ntetnal RANT (ikbyte) QW es External Memory (18byte) Program & Data Area (Bo) (De) (HL) (sP) (GP +d) (HL+A) (nn) ~— Direct Area (n) | External Memory (960K byte) Data ‘Area wo wy (Xd) (y+) Figure 3 TMP90PM40 Memory Map McU30-68TOSHIBA ‘TMP90PM40 4, ELECTRICAL CHARACTERISTICS, TMP90PM40N/TMP90PM40F 4.1. Absolute Maximum Ratings symbol Parameter Rating Unit Vec_| Supply voltage ~O5~ +7 Vv Vin | Input voltage =o5~Vee+05| Vv F500 c wer dissipation (Ta = 85% mi 2 | Power disipation (Ta=85°C) | —h-Go9 W Tsounen_| Soldering temperature (10Sec) 260 c Tst¢__| Storage temperature = 65 ~150 o Torr | Operating temperature =40~ 85 c 42 DC Characteristics Vee =5V # 10% = 40~85°C (1~10MHz) = 20~70°C (1~12.5MHz) ‘Typical Values are for TA = 25°C and Vee = 5V. symbol Parameter Min ‘Max | Unit | TestConditions Vi. Taput Low Voltage (PO) =03_[02vec-o1] Vv Vir |P1. P2, P3, PA, P5, PO, P7, PB | -03 oave | Vv Viz PRESET, INTO (PSO), NMI =03 o2svec | Vv Vus___ [EA =03 03 v Vue |x 03 ave |v Vu Taput High-Voltage (PO) O2vecsta | veros | Vv Visi [P1, P2, P3, Pa, P5, 6, P7,PB_| O.7Va | veroa | Vv [Viae (RESET, INTO (P80), TUMtT o7svec | veros | V Vues [ER Vee-03 | Veevos | V Visa [Xt O.avec Vecros | Vv. Vor [Output tow Voltage 045 V__fior= ema Vou [Output High Voltage 2a Vv 200aA Vor 0.75Vvec v 10048 Vor Ovec v 20d ton [een ee =35_ | ma ike rm Taput Leakage Current oz typ) | Es R_[oosvinsve | ho Output Leakage Current 0.05 (Typ)_| 210 vA. [0.2SVin SVee~02 Tee Operating Current RUN) 7 tw | 7A |sosc<0mne idle_2 9” typ) | 15 ma ‘STOP (TA=~40~85%) | 0.2 (Typ) | 50 uA [o2=Vin SVec-02 STOP (TA =0~50°C) 10 eA Veior [PowerDown Vohage(@sTor) [2 OT 6 Vv Wyasgavee Rast [RESET Pull Up Registor 50 750 a al iO [Pin Capacitance 70 pF _[testfreq= iz Vin Schmitt width RESET, NMI INTO] 0.4 voCyp)[ Vv Note :Ipar is guaranteed for a total of up to 8 optional ports. Mcu90-69TOSHIBA ‘TMP90PM40 4.3 ACCharacteristics = 40~85°0 (1~10MH2) TAs ~20~706 (1~12.5MHz2) Variable | 10M Clock [}2.SMHz Clock symbo| Parameter units { Min Max Min | Max | Min | Max tose [OSC Petiod=x 3 | 1000 | 100 @ 7 texe [Ck Period ax | % | 400 320 0 ‘wa. [LK tow width mao 160 120 1 twn__ [CLK High width 2x—40 760 120 ns tac [Address setup to FD, WE x85 5 35 1s ter [RD Low width asx a0} 210 160 7 ‘ca [Address Hold Time After RO, WR [o.5x—30) 20 10 18 tap [Address to Valid Data In Tasn—95 255 185 [ns ‘wo [to Valid Data in 2x20} 170 120 | ns ‘wa [Input Data Hold After RO 0 0 0 a tww [WR Low width }2.5x~ 40 210 160, ns ‘tow [Data setup to WR 2x-50 150 170 ns | two {Data Hold After WR 30 | 90 | 30] 90] 30] 90] as ‘own _[ RD, WR to Valid WATT fsx 10 50 20 | ns tawa [Address to Vaild WAIT. 5x ~ 130] 120 70 | ns ‘was _ [WATT Setup to CLK 70 70 70 18 twan_ [WAIT Hold After CLK o of [e ns tav __[RD, WR Recovery Time 15x35) 115 | a] | ns | ‘cow [ELK to Por Data Output 14200 300 700 | ne Teac [Port Data setup to LK 200 200 200 1s ten [Port Data Hold After CLC 700 100 | 700 1s ‘cucr_[RO/WR Hold after CLK x60 0 20 re teie |RD/WR Setup to CLK }1.5x~ 50] 100 | 70 ns Tews [Address Hold After cLK 15480 70 | 20 05 tact [Address Setup to ciK .5x-80 70 720 ns Tuo [Data Setup to ciK n=30 50 30 1 © ACOutputlevelHigh 2.2v/Low0.8v ‘© ACinput level High 2.4ViLow 0:45V (00-07) High 0.8Vec/Low 0.2Vcc (excluding D0 - D7) Mcug0-70TOSHIBA TMP90PM40 4.4 A/D Conversion Characteristics Veco 5VE10% TAs ~40~85% (1~ 10M) TA= ~20~70% (1~12.5MH2) symbol Parameter Min Typ Max Unit VaEE [Analog reference voltage ve=15 | vec vec ‘Agno ‘Analog reference voltage Vss Ves Vss v Vain Allowable analoginput voltage | __Vss Vee i Supply cent for analog reference = _ a Total error 1S Error (TA=250, Vec= VREF=5.0V) LB Total error 3.0) 008 45 Zero- Cross Characteristics Vec=5V£10% TA= -40~85°0 (1~10MH2) TAS =20~700 (1~12.5MH2) symbol Parameter Condition min | Max | Unit vex [Zero-crossdetection input [ACcouplingC=O.4uF | 1 18 [VACp-p| Ax Zero- cross accuracy 50/60He sine wave 135 | mv = |Zero- cross detection input An 1 a frequency 46 Serial Channel Timing ~ 1/0 Interface Mode = 40~85°0 (1~10MHz) =20~706 (1~12.5MHz) Variable _ | 10MH2 Clock [12.5MHz lock symbol | Parameter Unit | win | Max | Min | Max | Min [ Max ‘or _|Seval Port Clock Cyele Time ax 300 a0 me Toss [Output Data Setup SCLK Rising Edge =150 450 330 75 Tous _|Output Data Hold After SCLK Rising Edge px~ 121 80 20 ns tusk [input Data Hold After SCLK Rising Edge | 0 ° ° Bs tsno | SCLK Rising Edge to Input DATA Valid = 150) 250 330 | Mcu90-71TOSHIBA ‘TMP90PM40 47 16-bit Event Counter Vec=5V#10% TA’ 49~85'C (1~10MHz) TA= ~20~70% (1~12.5MH2) Variable | 10MHz Clock [12.5MHz Clock] Isymbol Parameter Units} Min [ Max | Min | Max | Min | Max tvex [Tid clock cycle Bus 109 ‘900 740 ns. ‘tvext_ [TM Low clock pulse width fax+40 440 360 ns tvex [TIé High clock pulse width jax 40 440 360 ns 48 Interrupt Operation cy 40~85%0 (1~10MH2) 20~70 (1~12.5MHz) Variable | 10MHz Clock 2.5MHz Clock] Symbol Parameter Units min | max | min [ max | Min | Max tuvvan [RII INTO Lowlevel pulsewidth (LT) | ax 400 320 ns tintan [NM INTO High level pulse width (JL) | 4 400 320 ns tunrpt [INTI, INT2 Low level puise width ( LP) Bx +101 900 740 ns ‘unre [INT2, INT2 High level pulse width ( JL) Bx+ 10 300 740_| ns (Refevence) Definition of par Rexr Vext hy ee Mcug0-72TOSHIBA TMP9OPM40 4.9 Read Operation (PROM Mode) DC Characteristic, AC Characteri: Tax -40~85°C Vec= SV 10% symbol Parameter Condition | min Max | unit Ver __|Ver Read Voltage = a5 comaev Vin [Input High Voltage (A0~A15,CE, 08) . o7xVvec | vec#o3 | v Vir___|input Low Voitage (A0~A15, CE, OB) 2 -03_| 03xvec| _v tace [Address to Output Delay Ci=50rr _f2zstevc+el - ns TCYC= 32005 (12.5MMHz Clock) seas «= 200n5 4.10 Programming Operation (PROM Mode) DC Characteristic, AC Characteristic Ta=2525%C Vec=6V+0.25V symbol Parameter Condition | min | Typ | Max | Unit Ver | Programing Voltage Ee 72.25 | 1250) 1275 | V Vin |Input High Voltage (D0~D7) = foavee 1.1 vec#0.3 | Vv Vit input Low Voltage (00~D7) - 03 02Vec0.1} Vv Vint input High Voltage (AO~At5, CE, 02) : 0.7Vcc Vec#o.3 |v Vit input Low Voltage (AO~A15, CE, OF) = “03 03ve | Vv tcc | Voc Supply Current fos - 50 | mA lop ___| Ver Supply Current Vpp = 13.00 50 | ma tow _ [CE Programming Pulse Width c=s0r | 095 [100 | 105 | ms Tere McU30-73‘TMP9OPM40 TOSHIBA ‘anwa cus oxy viv LnaNt ax viva Lndino ms 4.11 /O Interface Mode Timing Chart L. »D Mcus0-74TOSHIBA ‘TMP90PM40 4.12. Timing Chart cK — twe 80-19 RO Read Data Write Data Wart <— tcpw —>| Port Output Portinput McUs0-75TOSHIBA TMP90PM40 4.13. Read Operation Timing Chart (PROM Mode) AO-AIA |__ face HIGH Z Read Data DATA OUTPUTS 4.14 Programming Operation Timing Chart (PROM Mode) wiveons ar ——————— 2er90 MCU90-76