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Programming in AVR assembler language

Tables
Commands sorted by function
Commands sorted by alphabet
Ports
Abbreviations

Commands sorted by function

For the abbreviations used see the list of abbreviations.
Function Subfunction Command Flags Clk
0 CLR r1 ZNV 1
Register
255 SER rh 1
set
Constant LDI rh,c255 1
Register => Register MOV r1,r2 1
SRAM => Register, direct LDS r1,c65535 2
SRAM => Register LD r1,rp 2
SRAM => Register and INC LD r1,rp+ 2
DEC, SRAM => Register LD r1,-rp 2
SRAM, displaced => Register LDD r1,ry+k63 2
Port => Register IN r1,p1 1
Stack => Register POP r1 2
Copy
Program storage Z => R0 LPM 3
Register => SRAM, direct STS c65535,r1 2
Register => SRAM ST rp,r1 2
Register => SRAM and INC ST rp+,r1 2
DEC, Register => SRAM ST -rp,r1 2
Register => SRAM, displaced STD ry+k63,r1 2
Register => Port OUT p1,r1 1
Register => Stack PUSH r1 2
8 Bit, +1 INC r1 ZNV 1
8 Bit ADD r1,r2 ZCNVH 1
Add
8 Bit + Carry ADC r1,r2 Z1 C N V H 1
16 Bit, constant ADIW rd,k63 ZCNVS 2
8 Bit, -1 DEC r1 ZNV 1
8 Bit SUB r1,r2 ZCNVH 1
8 Bit, constant SUBI rh,c255 ZCNVH 1
Subtract
8 Bit - Carry SBC r1,r2 Z1 C N V H 1
8 Bit - Carry, constant SBCI rh,c255 Z1 C N V H 1
16 Bit SBIW rd,k63 ZCNVS 2
logic, left LSL r1 ZCNV 1
logic, right LSR r1 ZCNV 1
Rotate, left over Carry ROL r1 ZCNV 1
Shift
Rotate, right over Carry ROR r1 ZCNV 1
Arithmetic, right ASR r1 ZCNV 1
Nibble exchange SWAP r1 1
And AND r1,r2 ZNV 1
And, constant ANDI rh,c255 ZNV 1
Or OR r1,r2 ZNV 1
Binary Or, constant ORI rh,c255 ZNV 1
Exclusive-Or EOR r1,r2 ZNV 1
Ones-complement COM r1 ZCNV 1
Twos-complement NEG r1 ZCNVH 1
Register, set SBR rh,c255 ZNV 1
Register, clear CBR rh,255 ZNV 1
Bits Register, copy to T-Flag BST r1,b7 T 1
change Register, copy from T-Flag BLD r1,b7 1
Port, set SBI pl,b7 2
Port, clear CBI pl,b7 2
Zero-Flag SEZ Z 1
Carry Flag SEC C 1
Negative Flag SEN N 1
Statusbit Twos complement carry Flag SEV V 1
set Half carry Flag SEH H 1
Signed Flag SES S 1
Transfer Flag SET T 1
Interrupt Enable Flag SEI I 1
Zero-Flag CLZ Z 1
Carry Flag CLC C 1
Negative Flag CLN N 1
Statusbit Twos complement carry Flag CLV V 1
clear Half carry Flag CLH H 1
Signed Flag CLS S 1
Transfer Flag CLT T 1
Interrupt Enable Flag CLI I 1
Register, Register CP r1,r2 ZCNVH 1
Register, Register + Carry CPC r1,r2 Z1 C N V H 1
Compare
Register, constant CPI rh,c255 ZCNVH 1
Register, ≤0 TST r1 ZNV 1
Relative RJMP c4096 2
Indirect, Address in Z IJMP 2
Immediate Subroutine, relative RCALL c4096 3
Jump Subroutine, Address in Z ICALL 3
Return from Subroutine RET 4
Return from Interrupt RETI I 4
Statusbit set BRBS b7,c127 1/2
Statusbit clear BRBC b7,c127 1/2
Jump if equal BREQ c127 1/2
Jump if equal BRNE c127 1/2
Jump if carry BRCS c127 1/2
Jump if carry clear BRCC c127 1/2
Jump if equal or greater BRSH c127 1/2
Jump if lower BRLO c127 1/2
Jump if negative BRMI c127 1/2
Conditioned Jump if positive BRPL c127 1/2
Jump Jump if greater or equal (Signed) BRGE c127 1/2
Jump if lower than zero (Signed) BRLT c127 1/2
Jump on half carry set BRHS c127 1/2
Jump if half carry clear BRHC c127 1/2
Jump if T-Flag set BRTS c127 1/2
Jump if T-Flag clear BRTC c127 1/2
Jump if Twos complement carry set BRVS c127 1/2
Jump if Twos complement carry clear BRVC c127 1/2
Jump if Interrupts enabled BRIE c127 1/2
Jump if Interrupts disabled BRID c127 1/2
Registerbit=0 SBRC r1,b7 1/2/3
Registerbit=1 SBRS r1,b7 1/2/3
Conditioned
Portbit=0 SBIC pl,b7 1/2/3
Jumps
Portbit=1 SBIS pl,b7 1/2/3
Compare, jump if equal CPSE r1,r2 1/2/3
No Operation NOP 1
Others Sleep SLEEP 1
Watchdog Reset WDR 1
1: The Z flag is set only if it was previously set AND if the operation yielded zero. This allows 16-bit compares etc.

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Command list in alphabetic order

Assembler directives

.CSEG
.DB
.DEF
.DW
.ENDMACRO
.ESEG
.EQU
.INCLUDE
.MACRO
.ORG

Commands

ADC r1,r2
ADD r1,r2
ADIW rd,k63
AND r1,r2
ANDI rh,c255, Register
ASR r1
BLD r1,b7
BRCC c127
BRCS c127
BREQ c127
BRGE c127
BRHC c127
BRHS c127
BRID c127
BRIE c127
BRLO c127
BRLT c127
BRMI c127
BRNE c127
BRPL c127
BRSH c127
BRTC c127
BRTS c127
BRVC c127
BRVS c127
BST r1,b7
CBI pl,b7
CBR rh,255, Register
CLC
CLH
CLI
CLN
CLR r1
CLS
CLT, (command example)
CLV
CLZ
COM r1
CP r1,r2
CPC r1,r2
CPI rh,c255, Register
CPSE r1,r2
DEC r1
EOR r1,r2
ICALL
IJMP IN r1,p1
INC r1
LD rp,(rp,rp+,-rp) (Register), (SRAM access), Ports
LDD r1,ry+k63
LDI rh,c255 (Register), Pointer
LDS r1,c65535
LPM
LSL r1
LSR r1
MOV r1,r2
NEG r1
NOP
OR r1,r2 ORI rh,c255 OUT p1,r1
POP r1, (in Int-routine)
PUSH r1, (in Int-routine)
RCALL c4096
RET, (in Int-routine)
RETI
RJMP c4096
ROL r1
ROR r1
SBC r1,r2
SBCI rh,c255
SBI pl,b7
SBIC pl,b7
SBIS pl,b7
SBIW rd,k63
SBR rh,255, Register
SBRC r1,b7
SBRS r1,b7
SEC
SEH
SEI, (in Int-routine)
SEN
SER rh
SES
SET, (example)
SEV
SEZ
SLEEP
ST (rp/rp+/-rp),r1 (Register), SRAM access, Ports
STD ry+k63,r1
STS c65535,r1
SUB r1,r2
SUBI rh,c255
SWAP r1
TST r1
WDR

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Ports, alphabetic order

ACSR, Analog Comparator Control and Status Register
DDRx, Port x Data Direction Register
EEAR, EEPROM Adress Register
EECR, EEPROM Control Register
EEDR, EEPROM Data Register
GIFR, General Interrupt Flag Register
GIMSK, General Interrupt Mask Register
ICR1L/H, Input Capture Register 1
MCUCR, MCU General Control Register
OCR1A, Output Compare Register 1 A
OCR1B, Output Compare Register 1 B
PINx, Port Input Access
PORTx, Port x Output Register
SPL/SPH, Stackpointer
SPCR, Serial Peripheral Control Register
SPDR, Serial Peripheral Data Register
SPSR, Serial Peripheral Status Register
SREG, Status Register
TCCR0, Timer/Counter Control Register, Timer 0
TCCR1A, Timer/Counter Control Register 1 A
TCCR1B, Timer/Counter Control Register 1 B
TCNT0, Timer/Counter Register, Counter 0
TCNT1, Timer/Counter Register, Counter 1
TIFR, Timer Interrupt Flag Register
TIMSK, Timer Interrupt Mask Register
UBRR, UART Baud Rate Register
UCR, UART Control Register
UDR, UART Data Register
WDTCR, Watchdog Timer Control Register

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List of abbreviations
The abbreviations used are chosen to include the value range. Register pairs are named by the lower of the two registers. Constants in jump commands are automatically calculated from the respective labels during assembly.
Category Abbrev. Means ... Value range
r1 Ordinary Source and Target register
R0..R31
r2 Ordinary Source register
rh Upper page register R16..R31
Register
rd Twin register R24(R25), R26(R27), R28(R29), R30(R31)
rp Pointer register X=R26(R27), Y=R28(R29), Z=R30(R31)
ry Pointer register with displacement Y=R28(R29), Z=R30(R31)
k63 Pointer-constant 0..63
c127 Conditioned jump distance -64..+63
Constant c255 8-Bit-Constant 0..255
c4096 Relative jump distance -2048..+2047
c65535 16-Bit-Address 0..65535
Bit b7 Bit position 0..7
p1 Ordinary Port 0..63
Port
pl Lower page port 0..31

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