Part 1: Systems Architecture

Objectives:
• Describe the general capabilities of a computer

• Describe computer hardware components and their functions

ICT114 Computer Architecture

Seminar 2: Part 1: Systems Architecture
Part 2: Processor Technology
Ms Wong Yoke Moon
January 2022

Systems Architecture and Data Representation

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Computer Capabilities Computer Processors

• Processing – done by a processor • A processor is a device that can perform the following functions:
- Performs computations - Computation (+, ‒, ×, ÷)
- Performs “logic” functions such as comparison and branching - Comparison (<, =, >, ≠, ≤, ≥)
- Data movement among memory, mass storage, and I/O devices
• Storage – able to store instructions and data
• An instruction is a command to a processor to perform a specific
• Communication – within itself and with other devices function (e.g., addition) on specific data input(s)

• Each instruction is relatively simple

• When a computer “follows an instruction” it is said to be executing the

instruction

• Complex tasks are accomplished by combining many instructions into

a program and executing the program

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General- and Special-Purpose Processors Storage Capacity

• A general-purpose processor: • Computers needs to store:

- Reads its program instructions from a storage device - Intermediate processing results (for example, when solving a
- The content of the storage device can be changed, thus changing the complex formula)
program and the function performed by the processor - Data (output of past program executions and input to future
program executions)
• A special-purpose processor either: - Programs
- Uses program storage that can’t be altered (e.g. read-only memory)
- Has a single program “wired” into the processor • Storage devices vary widely according to characteristics such as:
- Speed
- Volatility
- Cost per bit

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 Input/Output Capability Computer Hardware

Four Major Functions of Computer Hardware

• I/O devices must encompass many communication modes

- Sound, text, and graphics (for humans)

- Electronic or optical communication (with other computers)

Figure 2.6 The major functions of computer hardware

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Hardware Components Central Processing Unit

4 Main Components of a Computer System

• A central processing unit (CPU) is a general-purpose processor that
• CPU – a processor that
executes instructions
performs computation,
comparison and data
• CPUs are implemented on microprocessor “chips”
movement
• Main memory – stores
• Modern chips can have multiple CPUs in a single chip (e.g., Intel Core i7)
both data and
instructions
• The CPU is the computer’s “brain”
• I/O unit – performs
external communication
• Like a human brain, a CPU is internally divided into regions that perform
functions
specialized functions
• System Bus – a
communication channel
that connects all devices
in the computer system

Figure 2.7 The hardware components of a computer system

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CPU Components Secondary Storage

• Arithmetic-logic unit (ALU) • Secondary storage is one or more storage areas that:
– Performs computation and – Hold large quantities of data and programs
logic instructions – Is non-volatile (holds content indefinitely)
• Registers – Is much cheaper per bit than primary storage
– Internal storage locations – – Is much slower than primary storage
each holds one data item
– Hold inputs to and outputs • Secondary storage devices include:
from the ALU – Magnetic disk
• Control unit – Optical disk
– Moves data among registers – Flash RAM (and solid-state drives)
and other computer system – Magnetic tape
storage locations
– Accesses program instructions
and either executes them
(data movement) or directs the Figure 2.8 Components of the CPU
ALU to execute them Courtesy of Course Technology/Cengage Learning
(computation and logic
instructions)

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 Storage Comparison Summary System Bus

Type Implementation Content Typical quantity

• The system bus is the communication channel that connects all
CPU High-speed electrical Currently executing Several dozen to a devices in the computer system
Registers devices implemented instruction(s) and few hundred per CPU
within the CPU associated data inputs and
• Bus speed is a critical factor in determining the overall speed of the
outputs computer system
Primary High-speed electrical Current programs and 1-8 billion data items
storage devices (RAM) immediately needed data to per CPU • Modern computers use additional buses improve performance – for
implemented outside the extent it will fit example,
but close to the CPU – Storage bus – to connect multiple magnetic disk drives to a single
connection point on the system bus
Secondary Low-speed Programs not currently Billions (gigabytes), – CPU-memory bus – for direct transfer of data between the CPU
Storage electromagnetic and being executed and data trillions (terabytes), and primary storage
optical devices not currently being or quadrillions – Video bus – for direct transfer of data between memory and the
accessed by programs (exabytes) of data video/graphics controller
items

Table 2.1 Comparison of storage types

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Input/Output Devices Summary on Systems Architecture

• For example: • Computer system consist of a CPU, primary storage, secondary

– Video display units storage, and I/O devices
– Touch screen
– Keyboard and mouse
– Joystick
– Microphone
– Speaker
– Webcam
– Printer
– Bar code scanner
– Network interface card
– USB or Firewire port

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Part 2: Processor Technology Processing

Objectives:

• Describe CPU instruction and execution cycles

• Describe key CPU design features including instruction format,

word size, and clock rate

• Describe the function of general-purpose and special-purpose

registers

• Describe the techniques to improve CPU performance

FIGURE 4.1 Topics covered in this chapter

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 CPU Components & Functions CPU and Other Computer System Components

• The central processing unit (CPU) is the computer system “brain”:

– Executes program instructions including computation, comparison,
and branching
– Directs all computer system actions including processing, storage,
input/output, and data movement

• CPU components include:

– Control unit – directs flow of data to/from memory, registers, and
the arithmetic logic unit
– Arithmetic logic unit (ALU) – executes computation and comparison
instructions
– Registers – storage locations within the CPU that hold ALU inputs,
ALU outputs, and other data for fast access

Figure 4.2 CPU components

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Instruction Cycle Fetch and Execution Cycles (1)

• The CPU constantly alternates between two stages (or cycles):

• Two steps: – Fetch cycle:
– Fetch • The control unit reads an instruction from primary storage
– Execute • The control unit increments the program counter (PC), also called
instruction pointer (address of the next instruction to be read)
• The control unit stores the instruction in the instruction register (IR)
• If there are data inputs embedded in the instruction they’re loaded
into registers as inputs for the ALU
• If the instruction includes memory addresses of data inputs they’re
copied from memory and loaded into registers as inputs for the ALU

– Execution cycle:
• Data movement instructions are executed by the control unit itself
• Computation and comparison instructions are executed by the ALU in
response to a signal from the control unit. Data inputs flow from
registers through processing circuitry and the output(s) flows to one
or more registers

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Fetch and Execution Cycles (2) Instruction Format (1)

• An instruction is a command to the CPU to perform a single processing

function on specific data inputs

program
counter
• As stored in memory or a register, an instruction is a sequence of bits that
must be decoded to extract the processing function and data inputs (or the
location of the data inputs

• Instruction components:
Increment
program – Op code - a unique binary number representing the processing function
counter
and a template for extracting the operands
– Operands – one or more groups of bits after the op code that contain
data to be processed or identify the location of that data (a register or
memory address)

Figure 4.3 Control and data flow during the fetch and execution cycles
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 Instruction Format (2) Clock Rate

• The system clock is a digital circuit that generates timing pulses, and
• Different kinds of operands have different lengths depending on the type of transmits the pulses to other devices in the computer
data or address stored therein
• It is generally a separate device with a dedicated communication line
monitored by all devices in the computer system
• The same processing function may correspond to many different op-codes • All actions, especially the CPU’s fetch and execute cycles, are timed according
with different operand formats (e.g., an ADD instruction for integers stored to this clock.
as operands, another for integers stored in registers, and another for integers
• Storage and I/O devices are timed by the clock signal
stored in memory)
• All devices in a computer system coordinate their activities with the system
clock
• The system clock generates “ticks” at regular intervals:
– Each tick of the clock begins a new clock cycle
– The CPU clock rate is the frequency of those ticks
– Typically stated in gigahertz (GHz) – billions of cycles (ticks) per second
– The inverse of the clock rate is the CPU cycle time
– Cycle time is the time required to fetch and execute the simplest
instruction in the instruction set (e.g., NOT)
FIGURE 4.4 An instruction containing one op code and two operands 1
Courtesy of Course Technology/Cengage Learning 𝑐𝑐𝑐𝑐𝑐𝑐𝑐𝑐𝑐𝑐 𝑡𝑡𝑡𝑡𝑡𝑡𝑡𝑡 =
𝑐𝑐𝑐𝑐𝑐𝑐𝑐𝑐𝑐𝑐 𝑟𝑟𝑟𝑟𝑟𝑟𝑟𝑟
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Registers (1) Registers (2)

• Another class of registers:

• Registers can be roughly divided into two classes: – Special-purpose registers
• Accumulator (AC) – CPU uses this register as the default location to
– General-purpose store any calculations performed by the ALU
• Used to store transient data required by the program • The following registers are used primarily by the control unit in CPU
• More are better up to a point (law of diminishing returns) management tasks:
• Modern CPUs typically provide a few dozen per ALU – Program counter (PC) – memory address for next instruction
fetch, a.k.a. instruction pointer
– Instruction register (IR) – copy of most recently fetched
instruction
– Program status word (PSW) – Goes by many different names -
Set of bit flags containing error and other codes related to
processing results, for example:
» Result of comparison operations
» Divide by zero
» Overflow and underflow

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Word Size Performance Enhancement Techniques

• A word is: • As fabrication technology has improved, CPU designers have been able
– A fixed number of bits/bytes to employ ever more complex performance improvement techniques
– The basic “unit” of data transformation in a CPU individually and in combination, including:
– The size of a data item that the CPU manipulates when executing a
“normal” instruction – Memory caching (Seminar 5)
– The size of a memory address? – Pipelining
– Multiprocessing
• The term has fallen into disuse as ever more complex CPU designs employ – Branch prediction and speculative execution
multiple word sizes
– For example, a 64-bit Intel Core CPU has word sizes ranging from 16 to
128 bits

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 Pipelining – Technique to Speed Up Computer (1) Pipelining – Technique to Speed Up Computer (2)

Without pipelining: 1 instruction takes 6 CPU cycles => 10 instructions take 60 CPU cycles
• Pipelining is a Henry Ford era technique (i.e., the sequential assembly line) With pipelining: 1 instruction takes 6 CPU cycles => 10 instructions take 15 CPU cycles
applied to executing program instructions
• Execution stages:
1. Fetch from memory
2. Increment and store program counter (PC)
3. Decode instruction and store operands and instruction pointer
4. Access ALU inputs
5. Execute instruction within the ALU
6. Store ALU output
• Pipelining attempts to overlap instruction execution by performing each stage
on a different instruction at the same time

FIGURE 4.10 Overlapped instruction execution via pipelining

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Pipelining (3) Multiprocessing

• Pipelining goes hand-in-hand with at least some duplication of processor

• Sounds great in theory, but there are some complexities with which to deal: circuitry
– Is one program counter enough?
– Is one instruction register enough? • Multiprocessing carries the duplication to higher levels, such as:
– Is one set of general purpose registers enough? – Multiple ALUs (with parallel execution of instructions) per CPU
– Is one ALU enough? (common by late 1990s)
– What happens if a branch is encountered? – Multiple CPUs on a single motherboard (common by early 2000s)
• Pipelining can be “finer-grained” than we’ve shown thus far – Multiple CPUs on a single chip (common by late 2000s)
– For example, execution (usually the longest stage) could be (and often is)
further subdivided into additional stages) • Operating systems are more complex because they now manage more
processing resources and more complex application software

• Application software that takes advantage of multiprocessing is more

complex because it must be designed for parallel execution (a.k.a.
multithreading)

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Branch Prediction and Speculative Execution Branch Prediction and Speculative Execution

• Preventive Measures:
• Branches cause problems with pipelining because they invalidate the partially – Look-ahead – “watch” incoming instructions for branches and alter
executed instructions that follow them: standard behavior accordingly
– The wrong instructions (after the branch) were fetched and partially – Branch prediction – the CPU guesses whether a branch condition will be
executed true or false based on past experience
– Special- and general-purpose register contents are incorrect • If the guesses are right most of the time, the processor can prefetch the
correct instructions and buffer them so that the processor is kept busy
• The pipeline must be flushed and filling it with the proper set of instructions – Speculative execution
(the branch target) must being anew • As the CPU executes conditional BRANCH instructions, it keeps score how
often the condition for each branch instruction has been true or false
• Real programs have lots of branches • Based on the scores, the CPU speculatively execute instructions ahead of
– Thus, pipelining will often “fail” unless preventive measures are employed their actual appearance in the execution, holding the results in
temporary locations
• This enables the processor to keep its execution engines as busy as
possible by executing instructions that are likely to be needed
– Speculatively execute both paths beyond a conditional branch
• Requires multiple execution units
• Half the results will be thrown away (half the effort is wasted)
• Modern CPUs employ all three techniques to improve pipelining performance
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 Summary on Processor Technology

• CPU operation

• Instruction set and format

• Clock rate

• Registers Thank You.

• Word size

• Performance enhancement techniques

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