COMPUTER ORGANIZATION

AND ARCHITECTURE
Introduction
 Introduction
• Architecture and Organization
• Structure and Function
• Evolution of computer
• Basic Principles
 Architecture & Organization
• Architecture
– Attributes visible to the programmer
– Logical design of computer

• Organization
– Physical design of a computer
– How features are implemented
 Architecture & Organization 2

• Architecture
– Have direct impact on logical execution
– E.g. Is there a multiply instruction?
– Instruction set, no. of bits used for data
representation,addressing techniques.
• Organization
– Operational unit and their interconnection that realize the
architectural specification
– E.g. Hardware multiply unit or multiplication by repeated
addition.
– Control signals, interface, memory technology
 Architecture & Organization 3

• All intel x86 family share the same basic

architecture
• The IBM System 370 family share the same
basic architecture
• This gives code compatibility
• Organization differs between different
versions.
 Structure and Function
• Structure
– The way in which components relate to each
other.
• Function
– The operation of individual component as part
of the structure
 Functions of Computer
– Data processing
• With in CPU
– Data storage
• Short term and Long term storage
– Data movement (I/O)
• Peripheral device – directly connected to computer
• Communication line – to or from remote device
– Control
• Instructions for data movement, storage & processing
 Functional view

• Functional view of a computer

Data
Storage
Facility

Data
Control
Movement
Mechanism
Apparatus

Data
Processing
Facility
 Data Movement
• Data movement
– e.g. keyboard to screen
Data
Storage
Facility

Data
Control
Movement
Mechanism
Apparatus

Data
Processing
Facility
 Data storage
• Storage
– e.g. Internet download to disk
Data
Storage
Facility

Data
Control
Movement
Mechanism
Apparatus

Data
Processing
Facility
 Data processing - 1
• Processing from/to storage
– e.g. updating bank statement
Data
Storage
Facility

Data
Control
Movement
Mechanism
Apparatus

Data
Processing
Facility
 Data Processing - 2
• Processing from storage to I/O
– e.g. printing a bank statement
Data
Storage
Facility

Data
Control
Movement
Mechanism
Apparatus

Data
Processing
Facility
 Structure - Top Level

Peripherals Computer

Central Main
Processing Memory
Unit

Computer
Systems
Interconnection

Input
Output
Communication
lines
 STRUCTURE
• CPU
– Controls operation of the computer.
– Performs data processing functions.
• Main memory
– Stores data.
• Input - Output
– Moves data between computer and external
environment.
• Interconnection
– Mechanism to provide communication.
 Structure - The CPU

CPU

Computer Arithmetic
Registers and
I/O Login Unit
System CPU
Bus
Internal CPU
Memory Interconnection

Control
Unit
 CPU

• Control unit
– Controls operation of CPU
• Arithmetic and Logic Unit
– Data processing
• Registers
– Storage internal to CPU
• Interconnections
– Provide communication
 Structure - The Control Unit

Control Unit

CPU
Sequencing
ALU Logic
Control
Internal
Unit
Bus
Control Unit
Registers Registers and
Decoders

Control
Memory
 Evolution of Computer
Generation Year Technology Examples

First1946-1957 Vacuum Tubes ENIVAC

40,000 operations/sec VonNeumann machine
IAS, UNIVAC

Second 1958-1964 Transistors IBM 7000, PDP-1

200,000 operations/sec
 
Third 1965-1971 Integrated Circuits (IC) SSI, MSI, Core Memory
1,000,000 oper/sec IBM 360, PDP-8
Mainframe, Minicomputer
Microcomputer

Later 1972 ---- LSI (10,000,000 oper/sec) Semiconductor memory

Microprocessors
VLSI 4004,8008,8080
100,000,000 oper/sec
 Von Neumann/Turning
• Stored Program concept Structure of IAS
– Main memory store
programs and data computer
• ALU operate on binary
data Arithmetic
Logic
• Control unit interpret Unit
instructions from memory
Memory
and execute I/O
• Input and output Program
equipment operated by Control
unit
control unit
 Advance Structure of IAS Computer
Central Processing Unit
Arithmetic and Logic Unit

Accumulator MQ

Arithmetic & Logic Circuits

Input MBR
Output Instructions
& Data Main
Equipment
Memory

IBR PC
MAR
IR Control
Circuits
Address
Program Control Unit
 DRAM and Processor Characteristics

Performance Mismatch
• Processor speed
increased
• Memory capacity
increased
• Memory speed lags
behind processor
speed
 Solutions
• Increase number of bits retrieved at one
time
– Make DRAM “wider” rather than “deeper”
– Increase interconnection bandwidth
• High speed buses
• Hierarchy of buses
• Reduce frequency of memory access
– More complex cache and cache on chip
 Speeding Methods
• Pipelining
• On board cache
• On board L1 & L2 cache
• Branch prediction
 Basic concepts
• Principles of Von Neumann machine
• Program concept
– Define
– Execution
• Instruction cycle
• Interrupts
– Interrupt cycle
– Multiple interrupts
 Principle of Von-Neumann
• Data and instructions in single R/W
memory
• Memory addressable by location not
contents
• Sequential execution unless specified
 What is a program?
• A sequence of steps
• For each step, an arithmetic or logical
operation is done
• For each operation, a different set of control
signals is needed
– e.g. ADD, MOVE
• A hardware segment accepts the code and
issues the control signals
 Program Concept
• Hardwired program
– Inflexible
– Logical components designed for particular
computation
• Programming in software
– General purpose H/W
– Perform various computation using control
signals
 Sequence Instruction code
Data Result
Of ALU
functions
Instruction
interpreter
Hardwired programming Control
signal
Arithmetic
Data And logic Results
functions

Programming in software
 Function of computer
• Program execution

• Executing instruction

• Read and Execute instruction

• Instruction cycle
– Processing required for single instruction
 Instruction Cycle
– Fetch cycle
– Execute cycle
 Fetch Cycle
• Program Counter (PC) holds address of next
instruction to fetch
• Processor fetches instruction from memory
location pointed to by PC
• Increment PC
– Unless told otherwise
• Instruction loaded into Instruction Register (IR)
• Processor interprets instruction and performs
required actions
 Execute Cycle
• Processor - memory
– data transfer between CPU and main memory
• Processor - I/O
– Data transfer between CPU and I/O module
• Data processing
– Some arithmetic or logical operation on data
• Control
– Alteration of sequence of operations
– e.g. jump
• Combination of above
Example of Program
Execution
Instruction Cycle -
State Diagram
 Interrupts
• Mechanism by which other modules (e.g. I/O) may interrupt
normal sequence of processing
• Class of Interrupt
– Program
• e.g. overflow, division by zero
– Timer
• Generated by internal processor timer
• Used in pre-emptive multi-tasking
– I/O
• from I/O controller
– Hardware failure
• No special code in user program
• Handled by O/S and processor
 Interrupt Cycle
• Added to instruction cycle Interrupt cycle
• Processor checks for interrupt
• If no interrupt, fetch next Fetch
instruction
• If interrupt pending: Disable Halt
– Suspend execution of current interrupt Execute
program
– Save context
– Set PC to start address of Enable interrupt
interrupt service routine
– Process interrupt
– Restore context and continue Check for
interrupted program Interrupt
And
process
Program Flow Control
 Instruction Cycle (with
Interrupts) - State Diagram
 Multiple Interrupts
• Disable interrupts
– Sequential interrupt processing
– Processor will ignore further interrupts whilst processing one interrupt
– Interrupts remain pending and are checked after first interrupt has
been processed
– Interrupts handled in sequence as they occur
• Define priorities
– Nested interrupt processing
– Low priority interrupts can be interrupted by higher priority interrupts
– When higher priority interrupt has been processed, processor returns
to previous interrupt
 Multiple Interrupts

Sequential Nested