NADAR SARASWATHI COLLEGE OF ENGINEERING AND

TECHNOLOGY
VADAPUTHUPATTI, THENI

DEPARTMENT OF ELEECTRONICS AND COMMUNICATION ENGINEERING

MASTER RECORD

EC3361
ELECTRONIC DEVICES AND CIRCUITS LABORATORY
(Regulation 2021)
 NADAR SARASWATHI COLLEGE OF ENGINEERING AND TECHNOLOGY
VADAPUTHUPATTI, THENI

DEPARTMENT OF ELEECTRONICS AND COMMUNICATION ENGINEERING

LAB MANUAL
SUBJECT CODE : EC3361
SUBJECT NAME : ELECTRONIC DEVICES AND CIRCUITS LABORATORY
YEAR : II
DEPARTMENT : ECE
SEMESTER : III
REGULATION : 2021
PREPARED BY : Mrs. T.TAMILSELVI
ASSISTANT PROFESSOR/ECE
VERIFIED AND : Mr. N. MATHAVAN
APPROVED BY HOD/ECE

STUDENT NAME:

REGISTER NUMBER:

YEAR / DEPT/SEMESTER:
 NADAR SARASWATHI COLLEGE OF ENGINEERING AND TECHNOLOGY
VADAPUTHUPATTI, THENI
VISION

To establish ourselves as a leading technological institution.

MISSION

1. To provide professional, constructive and learner centered education.

2. To make learners contribute to the development of the nation through academic and industrial
excellence.
3. To encourage learners involve in innovative researches with ethics.
4. To produce competitive and confident graduates to face the ever growing challenges of the labour
market.

DEPARTMENT OF ELECTRONICS AND COMMUNICATIN ENGINEERING

VISION

To become pioneer in creating engineers well –versed in communication engineering and

electronic market.

MISSION

1. To provide quality education as per the requirement of the communication field using the state -of -
art infrastructure.
2. To promote excellence, creativity, nurture the spirit of innovation in the field of digital technology.
3. To enhance relationship with electronics and communication industries, professional society,
government bodies and alumni.
4. To promote soft skills, leadership qualities and innovative research skills with ethical values.
 NADAR SARASWATHI COLLEGE OF ENGINEERING AND TECHNOLOGY
DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING

PROGRAMME EDUCATIONAL OBJECTIVES (PEOs)

1. To enable graduates to pursue research, or have a successful career in academia or industries

associated with Electronics and Communication Engineering, or as entrepreneurs
2. To provide students with strong foundational concepts and also advanced techniques and tools in
order to enable them to build solutions or systems of varying complexity.
3. To prepare students to critically analyze existing literature in an area of specialization and ethically
develop innovative and research oriented methodologies to solve the problems identified

PROGRAMME OUTCOMES (POs):

PO Graduate Attribute Programme Outcome

1. Engineering knowledge Apply the knowledge of mathematics, science,
engineering fundamentals, and an engineering
specialization to the solution of complex engineering
problems.
2. Problem analysis Identify, formulate, review research literature, and
analyze complex engineering problems reaching
substantiated conclusions using first principles of
mathematics, natural sciences, and engineering
sciences.
3. Design/development of Design solutions for complex engineering problems
solutions and design system components or processes that
meet the specified needs with appropriate
consideration for the public health and safety, and the
cultural, societal, and environmental considerations.
4. Conduct investigations of Use research-based knowledge and research
complex problems methods including design of experiments, analysis
and interpretation of data, and synthesis of the
information to provide valid conclusions.
5. Modern tool usage Create, select, and apply appropriate techniques,
resources, and modern engineering and IT tools
including prediction and modeling to complex
engineering activities with an understanding of the
limitations.
6. The Engineer and society Apply reasoning informed by the contextual
knowledge to assess societal, health, safety, legal and
cultural issues and the consequent responsibilities
relevant to the professional engineering practice.
7. Environment and Understand the impact of the professional engineering
sustainability solutions in societal and environmental contexts, and
demonstrate the knowledge of, and need for
sustainable development.
8. Ethics Apply ethical principles and commit to professional
ethics and responsibilities and norms of the
engineering practice.
 9. Individual and team work Function effectively as an individual, and as a member
or leader in diverse teams, and in multidisciplinary
settings.
10. Communication Communicate effectively on complex engineering
activities with the engineering community and with
society at large, such as, being able to comprehend
and write effective reports and design documentation,
make effective presentations, and give and receive
clear instructions.
11. Project management and Demonstrate knowledge and understanding of the
finance engineering and management principles and apply
these to one’s own work, as a member and leader in a
team, to manage projects and in multidisciplinary
environments.
12. Life-long learning Recognize the need for, and have the preparation and
ability to engage in independent and life-long learning
in the broadest context of technological change.

PROGRAM SPECIFIC OUTCOMES (PSOs)

On completion of Electronics Communication Engineering program, the student will have the
following Program Specific Outcomes.

1. To analyze, design and develop solutions by applying foundational concepts of electronics and
communication engineering.
2. To apply design principles and best practices for developing quality products for scientific and
business applications.
3. To adapt to emerging information and communication technologies (ICT) to innovate ideas and
solutions to existing/novel problems.
 NADAR SARASWATHI COLLEGE OF ENGINEERING AND TECHNOLOGY
DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING

EC3361 ELECTRONIC DEVICES AND CIRCUITS LABORATORY L P T C 0 0 3 1.5

SYLLABUS
1. Characteristics of PN Junction Diode and Zener diode.
2. Full Wave Rectifier with Filters.
3. Design of Zener diode Regulator.
4. Common Emitter input-output Characteristics.
5. MOSFET Drain current and Transfer Characteristics.
6. Frequency response of CE and CS amplifiers.
7. Frequency response of CB and CC amplifiers.
8. Frequency response of Cascode Amplifier
9. CMRR measurement of Differential Amplifier
10. Class A Transformer Coupled Power Amplifier.

TOTAL: 45 PERIODS

CONTENT BEYOND SYLLABUS:

1. Active and passive Filters
 NADAR SARASWATHI COLLEGE OF ENGINEERING AND TECHNOLOGY
DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING

INTRODUCTION TO ELECTRONICS DEVICES AND CIRCUITS

Electronics: The branch of engineering in which the flow and control of electrons in vacuum or

semiconductor are studied is called electronics. Electronics can also be defined as the branch of

engineering in which the electronic devices and their utilization are studied. The motion of electrons

through a conductor gives us electric current. This electric current can be produced with the help of

batteries and generators.

Electronic Device: The device which controls the flow of electrons is called electronic device. These

devices are the main building blocks of electronic circuits. Electronics have various branches include,

digital electronics, analog electronics, micro electronics, nanoelectronics, optoelectronics, integrated circuit

and semiconductor device.

Electronic Circuit: Similar to a brick that constructs a wall, a component is the basic brick of a circuit.

A Component is a basic element that contributes for the development of an idea into a circuit for execution.

Each component has a few basic properties and the component behaves accordingly. It depends on the motto

of the developer to use them for the construction of the intended circuit. The following image shows a few

examples of electronic components that are used in different electronic circuits.

 NADAR SARASWATHI COLLEGE OF ENGINEERING AND TECHNOLOGY
DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING

EC3361 ELECTRONIC DEVICES AND CIRCUITS LABORATORY

COURSE OBJECTIVES

1. To learn the characteristics of PN Junction diode and Zener diode.

2. To understand the operation of rectifiers and filters.
3. To study the characteristics of amplifier.

COURSE OUTCOME

COs Outcomes Bloom’s BTS

Taxonomy
CO1 Characteristics of PN Junction Diode Understand 2
CO2 Characteristics of Zener diode. Understand 2
CO3 Design and Testing of BJT amplifiers. Create 6
CO4 Design and Testing of MOSFET amplifiers. Create 6
CO5 Operation of power amplifiers. Analyze 4

PO - CO Correlation Matrix

CO- PO1 PO2 PO3 PO4 PO5 PO6 PO7 PO8 PO9 PO10 PO11 PO12 PSO1 PSO2 PSO3
PO,PSO
CO1 2 2 3 3 2 1 - - - - - 1 2 1 1
CO2 2 2 3 3 2 1 - - - - - 1 2 1 1
CO3 2 - 2 - 1 1 - - - - - 1 2 1 1
CO4 - - - - 3 1 - - - - - 1 2 1 1
CO5 - - - - 2 1 - - - - - 1 2 1 1
Avg 2 2 2.6 3 2 1 - - - - - 1 2 1 1
 NADAR SARASWATHI COLLEGE OF ENGINEERING AND TECHNOLOGY
DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING

EC3361 ELECTRONIC DEVICES AND CIRCUITS LABORATORY

CO – PO MAPPING WITH EXPERIMENTS
S.NO TITLE OF EXPERIMENT CO PO
1. Characteristics of PN Junction Diode and Zener diode. 1 1,2,3,4,5,6,12

2. Full Wave Rectifier with Filters. 1 1,2,3,4,5,6,12

3. Design of Zener diode Regulator. 2 1,2,3,4,5,6,12

4. Common Emitter input-output Characteristics. 3 1,3,5,6,12

5. MOSFET Drain current and Transfer Characteristics. 4 5,6,12

6. Frequency response of CE and CS amplifiers. 3 1,3,5,6,12

7. Frequency response of CB and CC amplifiers. 3 1,3,5,6,12

8. Frequency response of Cascode Amplifier 3 1,3,5,6,12

9. CMRR measurement of Differential Amplifier 5 5,6,12

10. Class A Transformer Coupled Power Amplifier. 5 5,6,12

 NADAR SARASWATHI COLLEGE OF ENGINEERING AND TECHNOLOGY
DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING
EC3361 - ELECTRONIC DEVICES AND CIRCUITS LABORATORY
LIST OF HARDWARE/ COMPONENTS

HARDWARE:
1. CRO/ DSO(30MHz)
2. Signal Generators / Function Generators /(3 MHz)
3. Dual Regulated Power Supplies (0-30v)
4. Bread Boards
5. BC 107, BC547, BF 195C , BFW10, IN 4001, IN 4007

SOFTWARE:

1. SPICE Simulator
 NADAR SARASWATHI COLLEGE OF ENGINEERING AND TECHNOLOGY
DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING
EC3361 ELECTRONIC DEVICES AND CIRCUITS LABORATORY

INDEX
S.NO EXPERIMENT MARKS SIGN
1. Characteristics of PN Junction Diode and Zener diode.

2. Full Wave Rectifier with Filters.

3. Design of Zener diode Regulator.

4. Common Emitter input-output Characteristics.

5. MOSFET Drain current and Transfer Characteristics.

6. Frequency response of CE and CS amplifiers.

7. Frequency response of CB and CC amplifiers.

8. Frequency response of Cascode Amplifier

9. CMRR measurement of Differential Amplifier

10. Class A Transformer Coupled Power Amplifier.

 EXPT. NO:
DATE :
CHARACTERISTICS OF PN JUNCTION DIODE

Aim:
To determine the forward and reverse characteristics of the given PN junction diode and to determine cut-
in voltage
Apparatus required:

Sl. No. Description Range Quantity

1 Regulated Power Supply (0-15)V 2

0-20m A ,
2 Ammeter 0-200uA Each 1
3 Voltmeter (0-20)V 2
4 Diode IN 4007 2
5 Resistor 1kΩ 2
6 Bread board --- 2
7 Connecting Wires --- As per required

Theory:
Donor impurities (pentavalent) are introduced into one-side and acceptor
impurities(trivalent) into the other side of a single crystal of an intrinsic semiconductor to form a PN
junction diode with a junction called depletion region (this region is depleted off the charge carriers). This
region gives rise to a potential barrier called cut-in Voltage. This is the voltage across the diode at which
it starts conducting. The PN junction can conduct beyond this potential. The PN junction supports
unidirectional current flow. If positive terminal of the input supply is connected to anode (P-side) and
negative terminal of the input supply is connected the cathode Then diode is said to be forward biased.
If negative terminal of the input supply is connected to anode (p-side) and positive
terminal of the input supply is connected to cathode (n-side) then the diode is said to be reverse biased.
On forward biasing, initially no current flows due to barrier potential. As the applied potential
exceeds the barrier potential the charge carriers gain sufficient energy to cross the potential barrier
and hence enter the other region. On reverse biasing, the majority charge carriers are attracted
towards the terminals due to the applied potential resulting in the widening of the depletion region.
Since the charge carriers are pushed towards .

1
 Terminals no current flows through the device due to majority charge carriers. There will be
some current in the device due to minority carriers. The generation of such carriers is independent of the
applied potential and hence the current is constant for all increasing reverse potential. This current is
referred to as reverse saturation current (IO) and it increases with temperature.

PN Junction Diode Symbol :

Circuit Diagram:Forward Bias

Reverse Bias:

2
Procedure:

1. Connect the circuit as per the circuit diagram.

2. Switch on the power supply.
3. Vary the power supply voltage step by step from zero volt.
4. Take the voltmeter and ammeter readings for every variation of power supply.
5. Re-Connect the circuit for reverse bias condition as shown in figure.
6. Repeat the step 3 and 4 for reverse bias.
7. Draw the graph for forward bias and reverse bias for PN junction diode.
8. Note down cut-in voltage for PN junction diode.
9. Switch of the power supply.

Tabulation :
Reverse Bias:

SL.NO Voltmeter(v) Current (m A)

3
Forward bias:

SL.NO Voltage(v) Current (m A)

Model Graph:

4
Result:

Thus the forward and reverse characteristics of the given PN junction diode is determined.

5
 EXPT. NO:
DATE :

CHARACTERISTICS OF ZENER DIODE

Aim:
To determine the breakdown voltage of a given zener diode.

Apparatus Required:

S.No Description Range Quality

1 RPS (0-15) V 2

2 ammeter (0-200) mA 2
3 voltmeter (0-15)V 2
4 Zener Diode 4148 2
5 Connecting wires - As per Required
6 Resister 1KΩ 2
7 Bread Board - 2

Theory:

A properly doped crystal diode, which has a sharp breakdown voltage, is known as zener diode.

1. Forward Bias:

On forward biasing, initially no current flows due to barrier potential. As the applied
potential increases, it exceeds the barrier potential at one value and the charge carriers gain sufficient
energy to cross the potential barrier and enter the other region. the holes ,which are majority carriers in
p-region, become minority carriers on entering the N-regions and electrons, which are the majority
carriers in the N-regions become minority carriers on entering the P- region. This injection of minority
carriers results current, opposite to the direction of electron movement.

6
 2. Reverse Bias:
When the reverse bias is applied due to majority carriers small amount of current (ie) reverse
saturation current flows across the junction. As the reverse bias is increased to breakdown voltage,
sudden rise in current takes place due to zener effect.

Zener Effect :

Normally, PN junction of Zener Diode is heavily doped. Due to heavy doping the depletion
layer will be narrow. When the reverse bias is increased the potential across the depletion layer is
more. This exerts a force on the electrons in the outermost shell. Because of this force the electrons
are pulled away from the parent nuclei and become free electrons.

This ionization, which occurs due to electrostatic force of attraction, is known as Zener effect. It
results in large number of free carriers, which in turn increases the reverse saturation current

Procedure:
Forward Bias:
1. Connect the circuit as per the circuit diagram.
2. Vary the power supply in such a way that the readings are taken in steps of 0.1V in the voltmeter
till the needle of power supply shows 30V.
3. Note down the corresponding ammeter readings.
4. Plot the graph :V (vs) I.
5. Find the dynamic resistance r = ΔV / ΔI
Reverse Bias:
1. Connect the circuit as per the diagram
2. Vary the power supply in such a way that the readings are taken in steps of 0.1V in the
voltmeter till the needle of power supply shows 30V.
3. Note down the corresponding Ammeter readings I.
4. Plot a graph between V & I
5. Find the dynamic resistance r = ΔV / ΔI
6. Find the reverse voltage Vr at Iz=20 mA

7
Circuit Diagram:
Forward Bias:

Reverse Bias

Model Graph

8
Tabular Column
Forward Bias

S..No. VOLTAGE CURRENT

(In Volts) (In mA)

Reverse Bias

S..No. VOLTAGE CURRENT

(In Volts) (In mA)

9
RESULT:

Forward and Reverse bias characteristics of the zener diode was studied and
i. Forward bias dynamic resistance =400Ω
ii. Reverse bias dynamic resistance = 20kΩ

10
 EXPT. NO:
DATE :

FULL WAVE RECTIFIER

Aim:
To study the operation of Full- Wave Rectifier with and without filter and to find its:

a. Percentage Regulation
b. Ripple Factor
c. Efficiency

Apparatus Required :

S.no Description Range Quantity

1 Diodes 1N4007 2
1kΩ
2 Resistor 1

3 Capacitor 100µf 1
Transformer with
4 Center TappedSecondary ( 9- 0-9)V 1
5
CRO 30MHz 1
6
Digital Multimeter/Digital
Voltmeter (0-20V) 1

7 Bread Board - 1
8 Connecting Wires Single strand As per required

Operation:

The conversion of AC into pulsating DC is called Rectification. Electronic Devices

can convert ACpower into DC power with high efficiency. The full-wave rectifier consists of a
center-tapped transformer, which results in equal voltages above and below the center-tap. During
the positive half cycle, a positive voltage appears at the anode of D1 while a negative voltage
appears at the anode of D2. Due to this diode D1 is forward biased. It results a current Id1 through
the load R.

11
 During the negative half cycle, a positive voltage appears at the anode of D2 and hence it is
forward biased, resulting a current Id2 through the load. At the same instant a negative voltage
appears at the anode of D1, reverse biasing it and hence it doesn’t conduct.

Ripple Factor :

Ripple factor is defined as the ratio of the effective value of AC components to the average
DC value.It is denoted by the symbol ' '.

VNL = Voltage across load resistance, when minimum current flows through it. VFL = Voltage

across load resistance, when maximum current flows through. For an ideal Full-wave rectifier, the

percentage regulation is 0 percent. The percentage of regulation isvery small for a practical full

wave rectifier.

Peak- Inverse - Voltage (PIV):

It is the maximum voltage that the diode has to withstand when it is reverse biased.
PIV = 2Vm

12
 Full Wave Rectifier Circuit Diagram

Without Filter

With Filter

Procedure:

1. Connect the circuit as shown in the circuit diagram.

2. Connect the primary side of the transformer to AC mains and the secondary side to
rectifierinput.
3. Using a CRO, measure the maximum voltage V m of the AC input voltage of the
rectifier andAC voltage at the output of the rectifier.
4. Using a DC voltmeter, measure the DC voltage at the load resistance.
5. Observe the Waveforms at the secondary windings of transformer and across load
resistance for a load of 1K .
6. Calculate the ripple factor ( ), percentage of regulation and efficiency ( ) as per
the below given formulae.

13
Model Graph:

Tabulation
Without Filter:

Vm Vrms Vds Ripple factor Efficiency

With Filter

Vrms Vds Ripple factor Efficiency

14
Result :
Thus the characteristics of full wave rectifier were studied.

15
EXPT. NO:
DATE :
DESIGN OF ZENER DIODE REGULATOR
(ZENER DIODE AS VOLTAGE REGULATOR.)

Aim:
Measurement of percentage regulation by varying load resistor.

Apparatus Required:

S.No Description Range Quality

1 Resistor 1KΩ 1

2 Voltmeter 0-20V 2

3 Power Supply 0-15 V 1

4 Zener Diode 4148 1

5 Resister Load - -

Theory:
Zener diode is a P-N junction diode specially designed to operate in the reverse biased
mode. It is acting as normal diode while forward biasing. It has a particular voltage known as
break down voltage, at which the diode break downs while reverse biased. In the case of normal
diodes the diode damages at the break down voltage. But Zener diode is specially designed to operate
in the reverse breakdown region. The basic principle of Zener diode is the Zener breakdown.
When a diode is heavily doped, it’s depletion region will be narrow.
When a high reverse voltage is applied across the junction, there will be very strong electric
field at the junction. And the electron hole pair generation takes place. Thus heavy current flows.
This is known as Zener break down. So a Zener diode, in a forward biased condition acts as a
normal diode. In reverse biased mode, after the break down of junction current through diode
increases sharply. But the voltage across it remains constant. This principle is used in voltage
regulator using Zener diodes.

16
CIRCUIT DIAGRAM:

Graph:

Procedure:
Input Characteristics:
1. Varying the input voltage keeping load constant: Connect the circuit as showin in fig.1. Keep supply
control at minimum.
2. Keep the load RL at 750Ωs for Q-pont. Increase the input voltage VS in step of 1Volt and note V1 and
V2. Where V1 is the input and V2 is the output voltage across zener.

17
3. Plot the curves between input –output at load constant. Find out the δV1 and δV2 from the plot and
calculate the line regulation.

Output characteristics:

1. Varying the load keeping input voltage constant: Connect the circuit as showin in fig.1. Keep supply
control at minimum.
2. Keep load RL at 3000Ωs. Increase the input voltage V1 to 12 Vdc.
3. Decrease the load and note the voltage V2 with load value.
4. Plot the curves between load and output voltage at input constant. Find out the δV2 and VZ at Q point at
set load value from the input plot and calculate load regulation.

Tabulation:
Shunt regulation (Load regulation), Input voltage constant at 2.5 V

S.No Output Voltage Load (Ω)

(V)

Shunt regulation (Line regulation), load constant at 2Ω

S.No Input Voltage Output Voltage

(V) (V)

18
RESULT:

Realization of zener diode by voltage regulator is verified

19
EXPT. NO:
DATE :
COMMON EMITTER INPUT-OUTPUT CHARACTERISTICS.
Aim:
To obtain the input and output characteristics of the given transistor in common emitter configuration.

Apparatus required:

Sl. No. Description Range Quantity

1 Regulated Power Supply (0-30)V 1
2 Ammeter (0-30)mA,(0-250)A Each 1
4 Voltmeter (0-1)V,(0-30)V Each 1
5 NPN Transistor 50V,1A,3W 1
6 Resistor 1kΩ 1
7 Connecting Wires - As per required

Theory:

A NPN function transistor consist of a silicon (or germanium) crystal in which a layer of
p – type silicon is sandwiched between two layers of N – type silicon. The arrow on emitter lead specifies
the direction of the current flow when the emitter – base function is forward biased. As the conductivity
of the BJT depends on both the majority and minority carriers it is called bipolar device. In CE
configuration, Emitter is common to both the Emitter and Base.

A transistor can be in any of the three configurations viz, Common base, Common
emitter and Common Collector .The transistor consists of three terminal emitter, collector and base.
The emitter layer is the source of the charge carriers and it is heavily doped with a moderate cross
sectional area. The collector collects the charge carries and hence has moderate doping and large
cross sectional area. The base region acts a path for the movement of the charge carriers. In order
to reduce the recombination of holes and electrons the base region is lightly doped and is of hollow
cross sectional area. Normally the transistor operates with the emitter base junction forward biased.
In transistor, the current is same in both junctions, which indicates that there is a transfer of
resistance between the two junctions which is known as transfer resistance of transistor.

20
Circuit Diagram: 100 KΩ

Precautions:

1. While performing the experiment do not exceed the ratings of the transistor. This
may lead to the transistor damage.
2. Connect voltmeter and ammeter in correct polarities as shown in the circuit diagram.

3. Do not switch ON the power supply unless you have checked the circuit
connections as per the circuit diagram.
4. Make sure while selecting the emitter, base and collector terminals of the transistor.

Procedure:

Input Characteristics:
1. Connect the circuit as per the circuit diagram.
2. Set VCE, vary VBE in regular interval of steps and note down the corresponding IB reading.

3. Repeat the above procedure for different values of VCE.

4. Plot the graph: VBE vs. IB for a constant VCE.

Output Characteristics:
1. Connect the circuit as per the circuit diagram.
2. Set IB, Vary VCE in regular interval of steps and note down the corresponding IC reading.

3. Repeat the above procedure for different values of IB.

4. Plot the graph: VCE vs. IC for a constant IB.
5. Switch of the power supply.
6. Disconnect the components.

21
Model graph:

Input Characteristics:

Vce= 1V Vce= 2V

Vbe(v) Is(m A) Vbe(v) Is(m A)

22
Output characteristics:

Ib= 5V Ib= 10V

Vce(v) Ic(mA) Vce(v) Ic(m A)

23
Result:
The transistor characteristics of a Common Emitter (CE) configuration were plotted.

24
 EXPT. NO:
DATE :

MOSFET DRAIN AND TRANSFER CHARACTERISTICS

Aim:
To plot the Transfer and Drain characteristics of MOSFET and determine Transconductance and
output Resistance.

Apparatus Required:

S.No Description Range Quantity

1 MOSFET IRF 740 1
2 Resistor 560Ω 1
3 Voltmeter 0-15V,0-60V 1
4 RPS 0-15V, 0-30V 1
5 Ammeter 0-60mA 1

Theory:

A MOSFET (Metal oxide semiconductor field effect transistor) has three terminals called Drain,
Source and Gate. MOSFET is a voltage controlled device. It has very high input impedance and
works at high switching frequency. MOSFET’s are of two types 1) Enhancement type 2)
Depletion type.

Circuit Diagram:

25
Tabular Column:

A) Transfer Characteristics:

VDS1= 1 V VDS2= 2V
VGS (V) ID(mA) VGS (V) ID(mA)

B) Drain Characteristics :

VGS (V) ID(mA)

Calculation:

26
Procedure:

Transfer Characteristics:
1. Make the connections as per the circuit diagram.
2. Initially keep V1 and V2 at 0 V.
3. Switch ON the regulated power supplies. By varying V1, set VDS to some constant voltage
say 5V.
4.Vary V2 in steps of 0.5V, and at each step note down the corresponding values of VGS
and ID. (Note: note down the value of VGS at which ID starts increasing as the
threshold voltage).
5. Reduce V1 and V2 to zero.
6. By varying V1, set VDS to some other value say 10V.
7. Repeat step 4.
8. Plot a graph of VGS versus ID for different values of VDS.

Drain or Output Characteristics:

1. Make the connections as per the circuit diagram.

2. Initially keep V1 and V2 at zero volts.
3. By varying V2, set VGS to some constant voltage (must be more than Threshold voltage).
4. By gradually increasing V1, note down the corresponding value of VDS and ID.
(Note: Till the MOSFET jumps to conducting state, the voltmeter which is connected across
device as VDS reads approximately zero voltage. Further increase in voltage by V1 source
cannot be read by VDS, so connect multi meter to measure the voltage and tabulate the
readings in the tabular column).
5. Set VGS to some other value (more than threshold voltage) and repeat step 4.
6. Plot a graph of VDS versus ID for different values of VGS.

27
Result:

Thus the Transfer and Drain characteristics of MOSFET are plotted

28
EXPT. NO:
DATE :

FREQUENCY RESPONSE OF COMMON EMITTER AMPLIFIER

Aim:

To design and construct a Common Emitter Amplifier using voltage divider

bias andto determine the Frequency and bandwidth

Apparatus Required :

S.no Description Range Quantity

1 Transistor BC 107 1
61kΩ, 10kΩ, 1kΩ,
2 Resistor 1,1,1,2
4.7kΩ
3 Capacitor 10µf, 100µf 2,1

4 Signal Generator (0-3)MHz 1

5 CRO 30MHz 1
Regulated powersupply (0-30)V 1
6
7 Bread Board - 1
8 Connecting Wires - As per required

Theory:
A common emitter amplifier is type of BJT amplifier which increases the voltage level of the
applied input signal Vin at output of collector. The CE amplifier typically has a relatively high
input resistance (1 - 10 KΩ) and a fairly high output resistance. Therefore it is generally used to
drive medium to high resistance loads. It is typically used in applications where a small voltage
signal needs to be amplified to a large voltage signal like radio receivers. The input signal Vin
is applied to base emitter junction of the transistor and amplifier output Vo is taken across
collector terminal. Transistor is maintained at the active region by using the resistors R1,R2 and
Rc. A very small change in base current produces a much larger change in collector current.
The output Vo of the common emitter amplifier is 180 degrees out of phase with the applied
the input signal Vin.

29
Procedure:

1. Connect the circuit as per the circuit diagram

2. Determine the Q-point of the CE amplifier using DC analysis.

3. Determine Maximum input voltage that can be applied to CE amplifier using AC analysis.

4. Set the input voltage V in=V MSH /2 and vary the input signal frequency from 0Hz to
1MHz in incremental steps and note down the corresponding output voltage Vo for at
least 20 different values for the considered range.
5. The voltage gain is calculated as Av = 20log (V0/Vi) dB
6. Find the Bandwidth and Gain-Bandwidth Product from Semi-log graph taking

Frequency on x-axis and gain in dBon y-axis., Bandwidth,

BW = f2-f1

Where, f1 lower cut-off frequency and f2 upper cut-off frequency

i) Set Vin = 0 by reducing the amplitude of the input signal
from signal generator
ii) Open circuit the capacitors since it blocks DC voltage
iii) Set VCC= +10v and measure the voltage drop across the Resistor V RC,
voltage across Collector- Emitter Junction VCE and Voltage drop across
base emitter junction. VBE
iv) Find the Q-point of the transistor and draw the DC load line.

Maximum signal handling capacity :

It is the process to find the maximum input voltage that can be handled by
the amplifier, so that it amplifies the input signal without anydistortion.

Procedure:

Apply input signal Vin = 20 mV of 1Khz frequency to the amplifier using the signal

generator between base emitter junction of the transistor. Find the sinusoidal output using

CRO across RL.

By increasing the amplitude of the input signal find maximum inputvoltage V MSH
across VBE at which the sinusoidal signal gets distorted during the process which can

be seen in the CRO. The amplitude obtained at this point is maximum voltage that
can be applied to the transistor for efficient operating of transistor.

30
Tabulation [Without Feedback ] :

OUTPUT GAIN = Vo/ Vi GAIN=

20 log Vo/Vi dB
S. NO FREQUENCY VOLTAGE
[Hz]
[VO] in Volts

31
Model Graph:

32
RESULT:

Thus the voltage and frequency response of a common emitter amplifier was
constructed and measured.

33
EXPT. NO:
DATE :

FREQUENCY RESPONSE OF COMMON SOURCE AMPLIFIER

Aim:
To determine frequency response and bandwidth using common source amplifier

Apparatus Required:

S.No. Description Range Quantity

1 Transistor BFW10 1
2kΩ,10kΩ,1kΩ Each 1
2 Resistor
0.1 µf,10 µf,1 µf Each 1
3 Capacitor

4 signal Generator (0-3) MHz 1

5 CRO 30MHz 1

6 Regulated power supply (0-30) V 1

7 Bread Board - 1

8 Connecting Wires Single strand As per required

Theory :

There are three basic types of FET amplifier or FET transistor namely common source
amplifier, common gate amplifier and source follower amplifier. The common-source (CS)
amplifier may be viewed as a transconductance amplifier or as a voltage amplifier.
i) As a transconductance amplifier, the input voltage is seen as modulating the current going
to the load.
ii) As a voltage amplifier, input voltage modulates the amount of current flowing through
the FET, changing the voltage across the output resistance according to Ω's law.
However, the FET device's output resistance typically is not high enough for a reasonable
transconductance amplifier (ideally infinite), nor low enough for a decent voltage amplifier (ideally
zero). Another major drawback is the amplifier's limited high-frequency response.

34
 Therefore, in practice the output often is routed through either a voltage follower
(common-drain or CD stage), or a current follower (common-gate or CG stage), to obtain more
favorable output and frequency characteristics

Procedure:
1. Connect the circuit as per the circuit diagram
2. Determine the Q-point of the CS amplifier using DC analysis.
3. Determine Maximum input voltage that can be applied to CE amplifier using AC analysis.
4. Set the input voltage Vin=V MSH /2 and vary the input signal frequency from 0Hz to 1MHz
in incremental steps and note down the corresponding output voltage Vo for atleast 20
different values for the considered range.
5. The voltage gain is calculated as Av = 20log (V0/Vi)
6. Find the Bandwidth and Gain-Bandwidth Product from Semi-log graph taking frequency on
x-axis and gain in dB on y-axis., Bandwidth, BW = f2-f1
where f1 - lower cut-off frequency and f2 - upper cut-off frequency

a. Dc Analysis:
It is the procedure to find the operating region of transistor
Steps:

i) Set Vin = 0 by reducing the amplitude of the input signal from signal generator

ii) Open circuit the capacitors since it blocks DC voltage

iii) Set VCC= +10v and measure the voltage drop across the Resistor VRC, voltage across Collector-
Emitter Junction VCE and Voltage drop across base emitter junction. VBE
iv) Find the Q-point of the transistor and draw the DC load line.

Maximum signal handling capacity:

It is the process to find the maximum input voltage that can be handled by the amplifier,
so that it amplifies the input signal without any distortion.

Procedure:
i. Apply input signal Vin = 1 V of 1Khz frequency to the CS amplifier using the signal
generator between base emitter junction of the transistor. Find the sinusoidal output using
CRO across RL.

35
 ii. By increasing the amplitude of the input signal find maximum input voltage V MSH
across VBE at which the sinusoidal signal gets distorted during the process which can be
seen in the CRO. The amplitude obtained at this point is maximum voltage that can be
applied to the transistor for efficient operating of transistor.

Model graph :

36
TABULATION

Input voltage (Vin) = 50mV

Output Voltage [ VO] Gain= 20 log Vo/Vi

dB
S. NO Frequency [Hz] in Volts

37
`RESULT:

The common Source amplifier was constructed and input resistance and gain were determined.

38
 EXPT. NO:
DATE :

FREQUENCY RESPONSE OF COMMON BASE AMPLIFIER

Aim:

To determine the frequency response and bandwidth using Common Base amplifier

Apparatus Required:

S.No. Description Range Quantity

1 Transistor BC 107 1
2 Resistor 47KΩ,68KΩ,4.7KΩ, Each 1
2.2KΩ,10KΩ
10µF 3
3 Capacitor

4 signal Generator (0-3) MHz 1

5 CRO 30 MHz 1

6 Regulated power supply (0-30) V 1

7 Bread Board - 1

8 Connecting Wires Single strand as per required

Theory:

A common base amplifier is type of BJT amplifier which increases the voltage levelof
the applied input signal Vin at output of collector. The Common base amplifier typically has
good voltage gain and relatively high output impedance. But the Common base amplifier unlike
CE amplifier has very low input impedance which makes it unsuitable for most voltage
amplifier. It is typically used used as an active load for a cascode amplifier and also as a current
follower circuit.

Circuit Operation:

A Positive-Going Signal Voltage At The Input Of A CB Pushes The Transistor

Emitter InA Positive Direction While The Base Voltage Remains Fixed, Hence Vbe
Reduces. The Reduction In VBE Results In Reduction In VRC, Consequently VCE
Increases. The Rise In CollectorVoltage Effectively Rises The Output Voltage.

39
 The Positive Going Pulse At The Input Produces A Positive-Going Output, Hence
The There Is No Phase Shift From Input To Output In CB Circuit. InThe Same Way The
Negative-Going Input Produces A Negative-Going Output.

Procedure:
1. Connect the circuit as per the circuit diagram

2. Determine the Q-point of the CB amplifier using DC analysis.

3. Determine Maximum input voltage that can be applied to CEamplifier using AC

analysis.

4. Set the input voltage Vin=V MSH /2 and vary the input signal frequency from 0Hz

to1MHz in incremental steps and note down the corresponding output voltage V o

for at least 20 different values for the considered range.

5. The voltage gain is calculated as Av = 20log (V0/Vi)

6. Find the Bandwidth and Gain-Bandwidth Product from Semi-log graph taking
frequency on x-axis and gain in dB on y-axis., Bandwidth,
BW = f2-f1
Where , f1 lower cut-off frequencyand f2 upper cut-off frequency

DC Analysis:

It is the procedure to find the operating region of transistor

Steps:
i) Set Vin = 0 by reducing the amplitude of the input
signalfrom signal generator
ii) Open circuit the capacitors since it blocks DC voltage
iii) Set VCC= +10v and measure the voltage drop across the
Resistor VRC, voltage across Collector- Emitter Junction
VCE and Voltagedrop across base emitter junction. VBE
iv) Find the Q-point of the transistor and draw the DC load line.

Maximum signal handling capacity:

It is the process to find the maximum input voltage that can be handled
by theamplifier, so that it amplifies the input signal without any distortion

40
Procedure:
i. Apply input signal Vin = 20 mV of 1Khz frequency to the amplifier using the signal
generator between base emitter junction of the transistor. Find the sinusoidal output
using CRO across RL.
ii. By increasing the amplitude of the input signal find maximum input voltage V MSH
across VBE at which the sinusoidal signal gets distorted during the process which can be
seen in the CRO. The amplitude obtained at this point is maximum voltage that can be
applied to the transistor for efficient operating of transistor.

41
Model Graph:

Tabulation:

OUTPUT VOLTAGE [VO]

GAIN= 20 log
S. NO FREQUENCY in Volts Vo/Vi dB
[Hz]

42
RESULT:

The Common base amplifier was constructed and input resistance and gain were determined.

43
EXPT.NO:
DATE:

FREQUENCY RESPONSE OF COMMON COLLECTOR AMPLIFIER

Aim:

To Design and Construct a Common collector Amplifier and to determine its Frequency
response and bandwidth

Apparatus Required:

S.No Description Range Quantity

1
Transistor BC 107 1
2 10k Ω,1k Ω 2,1
Resistor
3 10µF 2
Capacitor
4
Signal Generator 0-3MHz 1

5 CRO 0-30MHz 1
6
Regulated power supply 0-30 V 1
7
Bread Board - 1
8
Connecting Wires Single strand as required

Theory:
A common collector amplifier is a unity gain BJT amplifier used for impedance matching
and as a buffer amplifier.

Circuit Operation:
When a positive half-cycle of the input signal is applied to Base emitter junction of
transistorthe forward bias voltage Vbe is increased, which in turn increases the base current Ib
of transistor. Since emitter current Ie is directly proportional to I b the voltage drop across the
Emitter Ve= IeRe is increased, hence, output voltage Vo is increased, thus, we get positive
half-cycle of the output. It means that a positive-going input signal results in a positive going
output signal and, consequently, the input and output signals are in phase with each other.
Similarly the negative half cycle of input signal produces negative going output signal.

44
 Characteristics of a CC Amplifier
1. high input impedance (20-500 K Ω)

2. low output impedance (50-1000 Ω)

3. high current gain of (1 + β) i.e. 50 – 500

4. voltage gain of less than 1 (unity)

5. power gain of 10 to 20 dB

6. no phase reversal of the input signal

Procedure:
1. Connect the circuit as per the circuit diagram
2. Determine the Q-point of the CE amplifier using DC analysis.
3. Determine Maximum input voltage that can be applied to CE amplifier using AC analysis.
4. Set the input voltage Vin=V MSH /2 and vary the input signal frequency from 0Hz to 1MHz in
incremental steps and note down the corresponding output voltage Vo for at least 15 different values for
the considered range.
5. The voltage gain is calculated as Av = 20log (V0/Vin)
7. Find the Bandwidth and Gain-Bandwidth Product from Semi-log graph taking
frequency on x-axis and gain in dB
on y-axis., Bandwidth,
BW = f2-f1
Where f1 - lower cut-off frequency f2 - upper cut-off frequency

a. DC Analysis:
It is the procedure to find the operating region of transistor
Steps:
i) Set Vin = 0 by reducing the amplitude of the input signal
from signal generator
ii) Open circuit the capacitors since it blocks DC voltage
iii) Set VCC= +10v and measure the voltage drop across the Resistor
VRC, voltage across Collector- Emitter Junction VCE and Voltage
drop across base emitter junction. VBE
iv) Find the Q-point of the transistor and draw the DC load line.

Q point analysis:
It is the procedure to choose the operating point of transistor

45
 b. Maximum signal handling capacity :
It is the process to find the maximum input voltage that can be handled by the
amplifier, so that it amplifies the input signal without anydistortion.

Procedure:
i. Apply input signal Vin = 1 V of 1Khz frequency to the CC amplifier using the signal generator
between base emitter junction of the transistor. Find the sinusoidal output using CRO across RL.
ii. By increasing the amplitude of the input signal find maximum input voltage V MSH across VBE at
which the sinusoidal signal gets distorted during the process which can be seen in the CRO. The
amplitude obtained at this point is maximum voltage that can
be applied to the transistor for efficient operating of transistor.

Circuit Diagram:

46
TABULATION

OUTPUT
S. NO FREQUENCY [Hz] VOLTAGE [VO] GAIN= 20 log Vo/Vi dB
in Volts

47
RESULT:

The common collector amplifier was constructed and input resistance and
gain were determined.

48
EXPT.NO:
DATE:

FREQUENCY RESPONSE OF CASCODE AMPLIFIER

Aim:

To Design and Construct a Cascode Amplifier and to determine its:

a. DC Characteristics
b. Maximum Signal Handling Capacity
c. Gain of the amplifier
d. Bandwidth of the amplifier
e. Gain -Bandwidth Product

Apparatus Required:

S.no Description Range Quantity

1 Transistor BC 107 1
120 KΩ,270KΩ,25KΩ,
2 Resistor 1KΩ, 1,1,1,3
3 Capacitor 10mf,0.01µf 1,2

4 Signal Generator (0-3) MHz 1

5
CRO 30MHz 1
6 Regulated powersupply (0-30) V 1

7 Bread Board - 1

8
Connecting Wires Single strand As per required

Theory:

The cascode configuration has one of two configurations of multistage amplifier. In each
case the collector of the leading transistor is connected to the emitter of the following
transistor. The arrangement of the two transistors is shown in the circuit diagram. The
cascode amplifier consists of CE stage connected in series with CB stage. The
arrangement provides a relatively high input impedance with low voltage gain for the
first stage to ensure the input miller capacitance is at a minimum, whereas the following
CB stage provides an excellent high frequency response.
49
 Features:

1. It provides high voltage gain and has high input impedance.

2. It provides high stability and has high output impedance

Procedure:

1. Connect the circuit as per the circuit diagram

2. Determine the Q-point of the CE amplifier using DC analysis.
3. Determine Maximum input voltage that can be applied to CE amplifier using AC analysis.
4. Set the input voltage Vin=V MSH /2 and vary the input signal frequency from 0Hz to
1MHz in incremental steps and note down the corresponding output voltage V o for at
least 20 different valuesfor the considered range.

5. The voltage gain is calculated as Av = 20log (V0/Vi)

6. Find the Bandwidth and Gain-Bandwidth Product from Semi-log graph taking frequency
on x-axisand gain in dB on y-axis., Bandwidth, BW = f2-f1
Where f1 - lower cut-off frequencyf2 - upper cut-off frequency

Dc Analysis:
It is the procedure to find the operating region of transistor
Steps:
i) Set Vin = 0 by reducing the amplitude of the input signal from signal generator
ii) Open circuit the capacitors since it blocks DC voltage
iii) Set VCC= +10v and measure the voltage drop across the Resistor V RC,
voltage acrossCollector- Emitter Junction VCE and Voltage drop across base
emitter junction. VBE
iv) Find the Q-point of the transistor and draw the DC load line.

Q point analysis:
It is the procedure to choose the operating point of transistor

a. Maximum signal handling capacity:

It is the process to find the maximum input voltage that can be handled by the
amplifier, so thatit amplifies the input signal without any distortion.

Procedure:
i) Apply input signal Vin = 20 mV of 1Khz frequency to the amplifier using the signal
generator between base emitter junction of the transistor. Find the sinusoidal output
using CRO across RL.

50
 ii) By increasing the amplitude of the input signal find maximum input voltage V MSH
across VBE at which the sinusoidal signal gets distorted during the process which can be
seen in the CRO. The amplitude obtained at this point is maximum voltage that can be
applied to the transistorfor efficient operating of transistor.

Circuit Diagram:

Model Graph:

51
Tabulation

OUTPUT
GAIN= 20 log Vo/Vi dB
S. NO FREQUENCY VOLTAGE [VO]
[Hz]
in Volts

52
RESULT:

The Cascode amplifier was constructed and input resistance and gain were determined.

53
EXPT.NO:
DATE:

CMRR measurement of Differential Amplifier

Aim:

To Design and Construct a Differential Amplifier using BJT and to determine its:
a. Transfer Characteristics
b. Gain of the amplifier in common mode
c. Gain of the amplifier in differential mode
d. CMRR (Common Mode Rejection Ratio)

Apparatus Required:

S.no Description Range Quantity

1 Transistor BC 107 2

2 Resistor 1kΩ,470Ω 2,1

3 Signal Generator (0-3)MHz 1

4 CRO 30MHz 1

5
Regulated (0-30)V 1
Power supply
6 Bread Board - 1

7 Connecting Wires Single strand as required

Theory:

A differential amplifier is a type of electronic amplifier that amplifies the

differencebetween two voltages but does not amplify the particular voltages. The need
for differential amplifier arises in many physical measurements where response from D.C
to many MHZ isrequired. It is also used in input stage of integrated amplifier. The output
signal in differential amplifier is proportional to the difference between the twoinput
signals. Vo = Ad (V1 – V2).
Where V1, V2 are the input voltages and Ad is the differential gain. If V1 = V2, then output
voltage is zero. A non zero output voltage is obtained if V1 and V2are not equal.

54
 i) The difference mode input voltage is defined as Vd = (V1-V2)

ii) The common mode input voltage is defined as the Vcm= (V1+V2)/2

iii) The CMRR is defined as the ratio of the differential gain Ad to common mode gain
Ac andis generally expressed in dB. CMRR= 20 log10 ( Ad / Ac)

Procedure:

1. Connect the circuit as per the circuit diagram

2. Determine the Q-point of the Differential amplifier using DC analysis.
3. Determine Maximum input voltage that can be applied to amplifier using AC analysis.
4. Determine the Transfer characteristics of Differential amplifier by plotting the graph for
normalized differential input voltage [ (Vb1 – Vb2) / VT ] vs. Normalized collector current
[ Ic / Io].
5. Calculate the voltage gain of differential amplifier for differential modeas
Ad = 20log (V0/Vi) , Where Vi = V1 – V2
6. Calculate the voltage gain of differential amplifier for Common mode as
AC = 20log (V0/Vi), Where Vi = (V1+ V2 / 2 )
7. Find the Common mode rejection ratio of differential amplifier using the formula
given below. CMRR= 20 log10 ( Ad/Ac)
Where Ad- Differential mode gain in dB ,Ac – Common Mode gain in dB

DC Analysis:

It is the procedure to find the operating region of transistor

Steps
i) Set Vin = 0 by reducing the amplitude of the input signal from signal
generator
ii) Open circuit the capacitors since it blocks DC voltage
iii) Set VCC= +10v and measure the voltage drop across the Resistor VRC,
voltage across Collector- Emitter Junction VCE and Voltage drop across base
emitter junction. VBE
iv) Find the Q-point of the transistor and draw the DC load line.

Q point analysis:

It is the procedure to choose the operating point of transistor

a. Maximum signal handling capacity:

It is the process to find the maximum input voltage that can be handled by the
amplifier, so that itamplifies the input signal without any distortion.

55
Procedure:

Apply input signal Vin = 20 mV of 1Khz frequency to the amplifier using the signal
generator between base emitter junction of the transistor. Find the sinusoidal output using
CRO across RL. By increasing the amplitude of the input signal find maximum input voltage
VMSH across VBE at which the sinusoidal signal gets distorted during the process
which can be seen in the CRO. The amplitude obtained at this point is maximum voltage
that can be applied to the transistor for efficient operating of transistor.

56
Tabulation

Differential mode voltage = 0.5 V

Common mode voltage = 5V

S.No Frequency Output Voltage Gain dB CMRR

D.M C.M D.M C.M

57
DC Transfer Characteristics:

S.No Input Voltage Output Current

Vin = (V1-V2) (V) I1 (mA) I2(mA)

Model Graph:

58
RESULT:

The Differential amplifier was constructed and input resistance and gain were determined.

59
EXPT.NO:
DATE:
CLASS A TRANSFORMER COUPLED POWER AMPLIFIER

Aim:
To construct a class A power amplifier and to determine the efficiency from its
output waveform.

Apparatus Required:

S.No Description Range Quantity

1 Transistor SL100 1
2 Resistor 100 Ω , 10 Ω, 560 Ω 2,1,1

3 Capacitor 2.2 µf, 5 µf 1,1

Transformer withCenter
4 Tapped Secondary ( 9- 0-9)V 1
5
CRO 30MHz 1
6 -
Function Generator 1
7 Regulated PowerSupply 0-30V 1
8 Digital Multimeter/Digital
Voltmeter (0-20V) 1
9 Bread Board - 1
10 Connecting Wires Single strand As per required

Theory:
Transistor power amplifiers handle large signals. If the current flows at all times duringthe
full cycle of the signal, the power amplifier is known as class A amplifier.
Obviously, for this to happen the power amplifier must be biased in such a way that no part
of the signal is cut off. The efficiency of class A amplifier is only 50%. But it provides less
power dissipation. Also there is no distortion in class A power amplifier.

Procedure:
1. Connect the circuit as per the circuit diagram.
2. Set the input and apply the input signal from the FG and observe the output.
3. Note down the collector current using ammeter.
4. Draw the input and output waveform.

60
 5. By using specified formula, AC output power, DC input power and efficiency are
calculated.

Circuit Diagram Class A Power Amplifier

Model Graph

Tabulation:

Voltage(V) Time(ms) Current(mA)

Input waveform 2 2ms 2

Output waveform 2 2ms 3

61
RESULT:
Thus the class A amplifier was designed and constructed also its efficiency was calculated.

62