Sem 1 Electronics
Sem 1 Electronics
Sem 1 Electronics
Further, electrons move with its mobility μn and holes move with
mobility μp.
Mathematically it is represented as
np = ni2 = constant
where ni is the intrinsic carrier concentration
n is number of electrons in conduction band
p is number of holes in valence band
where Dn and Dp are diffusion constants for electrons and holes respectively.
Under forward bias, the positive potential repels the holes in P-type
towards the junction and negative potential repels the electrons in
N-type towards the junction.
When the applied voltage is more than internal barrier potential, the
depletion region and potential barrier disappears. Then the
conduction takes place.
When the forward voltage (Vf) is increased, the forward current (If)
is almost zero until Vf < V0 because of existence of potential barrier.
For Vf > V0, the potential barrier disappears and the holes from
P-type and electrons from N-type crosses the junction, resulting in
large current flow in the external circuit.
The voltage at which the diode starts conducting is called cut in or
threshold voltage. It is 0.3V for Ge and 0.7V for Si.
Under reverse bias, the holes from P-type are attracted towards the
negative terminal of the battery and the electrons from N-type are
attracted towards the positive terminal.
where
I0 is the diode reverse saturation current at room temperature
V is the external voltage applied
η is a constant; 1 for Ge and 2 for Si
VT is the volt-equivalent of temperature = kT/q = T/11600
k is Boltzmann constant (1.38 x 10-23 J/K)
q is the charge of the electron(1.602 x 10-19 C)
T is the junction temperature
Hint:
Demodulator circuits
During the positive half cycle of the input, the diode D becomes forward
biased and it conducts. Assuming ideal diode, the whole input appears
across the load.
During the negative half cycle of the input, the diode D becomes reverse
biased and it does not conduct. For an ideal diode, the voltage drop across
the load is zero.
where
Dr.G.Veera Senthil Kumar, Assistant
Professor, IMU 4
Contd...
The average current Idc is given by
where
Form Factor: The ratio of rms value to the average value. For a
HWR, Vrms = Vm/2 and Vdc = Vm/π. The value of form factor is
1.57.
Peak Factor: The ratio of peak value to the rms value. Peak value is
Vm. The value of peak factor is 2.
Dr.G.Veera Senthil Kumar, Assistant
Professor, IMU 8
HWR(Contd…)
Peak Inverse Voltage(PIV): PIV for a HWR is Vm.
Hence the load current flows through D2 and the voltage drop across the
load is equal to the input voltage.
where
It has four diodes (D1 through D4)to form a bridge in which input is
given at the opposite ends of the bridge and the load is connected
across the two ends of the bridge.
◦ No need of center-tapping.
W.K.T
W.K.T
Solution:
Considering the voltage drops across rf and rs due to the flow of load
current IL = 25 mA through them
In the above circuit, Zener diode is reverse biased. As long as the input
voltage does not fall below VZ, the voltage across the diode is constant
and hence the load voltage is also constant.
Hence when light having enough energy strikes on the device, more
and more electrons are excited to the conduction band which results
in a large number of charge carriers.
This results in the increase of current through the device when the
circuit is closed and hence it is said that the resistance of the device
has been decreased.
Disadvantages:
◦ Highly inaccurate with a response time of about tens or
hundreds of milliseconds.
Alarm clocks
But the construction of LED is quite different from ordinary diode, i.e, PN
junction of an LED is surrounded by a transparent, hard plastic epoxy resin
hemispherical shaped shell inorder to protect it from vibration and shock.
Aviation lighting
where
w.k.t IE = IC + IB
IB = IE -IC = (10 - 9.8) x 10-3 = 0.2mA
Problem 2
w.k.t
w.k.t
Problem 4
w.k.t
If
Problem 6
To obtain the load line, the two end points A and B of the
straight line are to be determined.
Finally, we get
The value of S is smaller than (1+β), which is obtained for fixed bias
circuit. Thus there is an improvement in the stability.
However, this circuit uses negative feedback, which reduces the gain
of the amplifier.
Biasing Circuit:
The resistors R1, R2 and RE form the biasing and stabilization
circuit, which helps in establishing a proper operating point.
DC collector-emitter voltage is
• At low frequencies the coupling and bypass capacitors lower the gain.
• At high frequencies, stray capacitances associated with the active device
lower the gain.
Frequency points like FL & FH are related to the lower corner & the upper
corner of the amplifier which are the gain falls of the circuits at high as
well as low frequencies. These frequency points are also known as decibel
points.
From the above two frequency points, the bandwidth(BW) can be defined
as BW = FH – FL.
Every high gain amplifier tends to give noise along with signal
in its output, which is very undesirable.
Positive Feedback:
The feedback in which the feedback energy i.e., either voltage or
current is in phase with the input signal and thus aids it is called as
Positive feedback.
The input signal and feedback signal introduces a phase shift of 180o
, thus making a 360o resultant phase shift around the loop.
Negative Feedback:
The feedback in which the feedback energy i.e., either voltage
or current is out of phase with the input and thus opposes it,
is called as negative feedback.
Voltage Amplifier:
The function of a voltage amplifier is to raise the voltage level of the
signal. The voltage gain of an amplifier is given by
This class A power amplifier can amplify small signals with least
distortion and the output will be an exact replica of the input with
increased strength.
w.k.t
For the next half cycle, the transistor T1 gets into cut off condition
and the transistor T2 gets into conduction, to contribute the output.
Hence for both the cycles, each transistor conducts alternately. The
output transformer Tr3 serves to join the two currents producing an
almost undistorted output waveform.
This cross over distortion effect also reduces the overall peak
to peak value of the output waveform which in turn reduces
the maximum power output.
The capacitors Cc1 and Cc2 are employed to block d.c. and to
provide an a.c. path.
The coil L1 has its one end connected to base via Cc1 and the
other to emitter via Ce.
The capacitors Cc1 and Cc2 are employed to block d.c. and to
provide an a.c. path.
Applications:
It can be used as High frequency sinewave generator.
This can be used as a temperature sensor with some
associated circuitry.
It is mostly used as a local oscillator in radio receivers.
It is also used as R.F. Oscillator.
It is an example for
Audio frequency
oscillator.
Disadvantages:
◦ Starting the oscillations is difficult as the feedback is
small.
◦ The output produced is small.
Disadvantages:
◦ The circuit cannot generate very high frequencies.
◦ Two transistors and number of components are required
for the circuit construction.
where CT = C+ Cm
Advantages:
They have a high order of frequency stability.
The quality factor (Q) of the crystal is very high.
Disadvantages:
They are fragile and can be used in low power circuits.
The frequency of oscillations cannot be changed appreciably.
Applications:
◦ used as delay and timing circuits
◦ used for temperory memories
◦ use to trigger another pulse generator
Therefore
where
Therefore
Feedback factor,
OR gate:
An OR gate is a digital circuit that has two or more inputs and
produces an output, which is the logical OR of all those
inputs. This logical OR is represented with the symbol ‘+’.
NOT gate:
A NOT gate is a digital circuit that has single input and single
output. The output of NOT gate is the logical inversion of
input. Hence, the NOT gate is also called as inverter.
Truth table of NOT gate:
Universal gates
A universal gate is a gate which can implement any Boolean
function without need to use any other gate type.
NAND & NOR gates are called as universal gates. Because we
can implement any Boolean function, which is in sum of
products form by using NAND gates alone.
Similarly, we can implement any Boolean function, which is in
product of sums form by using NOR gates alone.
Here A, B are the inputs and Y is the output of two input NAND gate.
When both inputs are ‘1’, the output, Y is ‘0’. If at least one of the
input is zero, then the output, Y is ‘1’. This is just opposite to that of
two input AND gate operation.
Here A, B are the inputs and Y is the output. If both inputs are
‘0’, then the output, Y is ‘1’. If at least one of the input is ‘1’,
then the output, Y is ‘0’. This is just opposite to that of two
input OR gate operation.
Here A, B are the inputs and Y is the output. The truth table of Ex-NOR
gate is same as that of NOR gate for first three rows. The only
modification is in the fourth row. That means, the output is one instead of
zero, when both the inputs are one.
Half Adder:
Half adder is a combinational circuit, which performs the
addition of two binary numbers A and B are of single bit. It
produces two outputs sum, S & carry, C.
In the above circuit, a two input Ex-OR gate & two input AND
gate produces sum, S & carry, C respectively. Therefore,
Half-adder performs the addition of two bits.
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Nautical Electronics
Modulation and Demodulation
UNIT 6
Carrier Signal: The high frequency signal which has a certain phase,
frequency, and amplitude but contains no information, is called a
carrier signal. It is an empty signal. It is just used to carry the signal
to the receiver after modulation.
Carrier power,
we get
Ac = 20 V, μ = 0.8, fm = 103 Hz and fc = 2 x 105 Hz
From the above equation, it is inferred that the two terms are
extracted from V2(t) by passing it through a low pass filter.
Among the two terms, the desirable term k2 Ac2 ka m(t) is the
scaled version of the message signal. Finally the desired term
alone can be extracted by removing the DC term k2Ac2/2 with
the help of a coupling capacitor.
Solution:
Solution:
Note:
For Narrowband FM, Bandwidth BW = 2fm
For Wideband FM, Bandwidth BW = 2(β+1) fm (Carson’s rule)
Carson’s rule:
Solution:
Comparing the given equation with standard equation of FM
wave
Case I: At ( fIF – Δf) < fin < fIF; Vo1 < Vo2; Then Vo is -ve. (This
means that as fin goes nearer to ( fIF – Δf ), the -ve output
voltage increases.)
Case III: At fIF < fin < ( fIF + Δf ); Vo1 > Vo2; Then Vo is +ve. (This
means that as fin increases from fIF to (fIF + Δf), the +ve output
voltage increases.)
Dr.G.Veera Senthil Kumar, Assistant
Professor, IMU 29
Contd...
The characteristics curve of the balanced slope detector is shown in
Figure below, and is called S-curve.
Let Vo1 and Vo2 are the respective output voltages of upper
and lower slope detector circuits constructed around diodes
D1 and D2 respectively.
Case II: At fin = fIF; the phase shift between primary and secondary
winding is exactly 90°, and the output of D1 is equal to the output
of D2 or Vo1 = Vo2; Then Vo = 0.
Case III: At fIF < fin < (fIF + Δf); the phase shift between primary and
secondary winding is less than 90°, and the output of D1 is more
than the output of D2 or Vo1 > Vo2; Then Vo is +ve. (This means that
as fin increases from fIF to ( fIF + Δf ), the +ve output voltage
increases.)
Disadvantages:
◦ poor sensitivity
◦ poor selectivity
◦ low data-rate
◦ limited demodulation capability
Then the tuned circuits in the RF stage are tuned to the signal
frequency fc and the local oscillator frequency f0 will
therefore be (fc + fif).
This image signal should not therefore be allowed to reach the input
of the mixer stage. Of course, it is not possible to completely
eliminate it, but it should be attenuated heavily in the RF stage.
Mixer-I − Mixer can produce both sum and difference of the frequencies
that are applied to it. i.e. fo+fl and fo-fl.
Mixer-II: The signals having frequencies of fo+fl and fo±fd are applied to
Mixer-II. So, the Mixer-II will produce the output having frequencies of
2fo+fl±fd or fl±fd.
• amplitude sensitive
• phase sensitive
Antenna
◦ Design usually specific to a given DF methodology
• Receiver(s) and processing unit
◦ One or more receive channels with analog-to-digital conversion
◦ Integrated or separate digital signal processing
• User interface
◦ Software for display and control
◦ Position fix and map display software
◦ Log-Period Antenna
◦ Loop Antenna
Disadvantages:
Cannot handle multiple signals.
Require a constant (CW) type signal.
Antenna sensitivity : Low.
Doesn’t work well for horizontally polarized signals (Doppler
antennas usually vertically polarized)
Drawbacks:
• Small aperture system (D/λ<0.2) leading to errors in case of
multipath propagation.
• large DF errors in case of skywaves with steep elevation
angles
Advantages :
• Improved error tolerances for skywave reception
• Implementation of wider apertures to avoid errors in case of multipath
reception
Where,
G is universal gravitational constant and it is equal to 6.673 x 10 -11
N·m2/kg2.
M is mass of the earth and it is equal to 5.98 x 1024 Kg.
m is mass of the satellite.
R is the distance from satellite to center of the Earth.
Kepler’s First Law: Kepler’s first law states that the path
followed by a satellite around its primary (the earth) will be
an ellipse.
Broadcast Satellite Services (BSS), which offer high transmission power for
reception using very small ground equipment. BSS is best known for
direct-to-consumer television and broadband applications such as DIRECTV.
Clock signals: There are 3 clock signals, i.e. X1, X2, CLK OUT.
X1, X2: A crystal (RC, LC) is connected at these two pins and is
used to set frequency of the internal clock generator. This
frequency is internally divided by 2.
CLK OUT: This signal is used as the system clock for devices
connected with the microprocessor.
Timing and control unit: It provides timing and control signal to the
microprocessor to perform operations. Timing and control signals
are
◦ Control Signals: READY, RD’, WR’, ALE
◦ Status Signals: S0, S1, IO/M’
◦ DMA Signals: HOLD, HLDA
◦ RESET Signals: RESET IN, RESET OUT
In the above circuit, when ALE goes high for initial time, clock
will be high.
It enables the transfer of input to output and hence address
on multiplexed bus will be transferred to output. i.e A0 - A7
Dr.G.Veera Senthil Kumar, Assistant
Professor, IMU 31
Contd...
Now A0 - A7 along with A8 - A15 provides the 16-bit address.
After getting address for fetching instruction or data from
memory, ALE goes low.
Then the multiplexed bus AD0 - AD7 acts as data bus for data
read or write from or to the memory.
Two byte instruction: eg. MVI B, 02H. Its opcode is 06H and
this instruction contains another byte 02H data.
Counters:
This programming technique uses INR or DCR instructions.A
loop is established to update count and each count is checked
to determine whether it has reached final number and if not
reached,then the loop is repeated.
MVI A, 52H Load the data 52H into the ACC 52H
Accumulator
STA 2000H Store the content of
2000 52H
Accumulator into a memory
location 2000H
HLT Terminate program execution
Algorithm:
Step1: Get the data from location pointed by HL reg. pair
Step 2: Transfer the content from Mem. Location to Acc.
Step 3: Move to next mem. location by incrementing HL reg. pair
Step4: Add the content of present mem. location with content in ACC.
Step 5: Initialize C reg. for carry
Step 6: Check for carry. If carry is present, store the content of rsult
from Acc to mem. location and also the carry in next mem. location
and terminate the program.
Step 6: If no carry, the store the content of result from Acc to any
mem. location and terminate the program.
CS A0 A1 Result
0 0 0 PORT A
0 0 1 PORT B
0 1 0 PORT C
0 1 1 CONTROL
REGISTER
1 X X No Selection