3-PPT Mosfet

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ECE249: BASIC ELECTRICAL AND ELECTRONICS ENGINEERING

Fundamental of Semiconductor Devices

UNIT-2

Lecture Prepared by Dr KRISHAN KUMAR


Topics

Unit III
Fundamental of semiconductor devices : PN junction
diode and its applications, Bipolar junction
transistor (PNP and NPN), MOSFET (working and
applications), Op-amp (features and virtual ground
concept), Op-amp (inverting and non-inverting)
KEY WORDS

• FET
• N Channel
• P Channel
• MOSFET
• IGMOSFET
• VGS
• VDS
A Field Effect Transistor (FET) is a three-
terminal semiconductor device.
Its operation is based on a controlled input
voltage.
Junction Field Effect Transistor
The functioning of Junction Field Effect Transistor depends upon
the flow of majority carriers (electrons or holes) only. Basically,
JFETs consist of an N type or P type silicon bar containing PN
junctions at the sides.
•Gate − By using diffusion or alloying technique, both sides of N
type bar are heavily doped to create PN junction. These doped
regions are called gate (G).
•Source − It is the entry point for majority carriers through which
they enter into the semiconductor bar.
•Drain − It is the exit point for majority carriers through which they
leave the semiconductor bar.
•Channel − It is the area of N type material through which majority
carriers pass from the source to drain.
There are two types of JFETs commonly used in the field
semiconductor devices: N-Channel JFET and P-Channel JFET.
N-Channel JFET

• It has a thin layer of N type material formed on P


type substrate. Then the gate is formed on top of
the N channel with P type material.
• When a DC voltage source is connected to the
source and the drain leads of a JFET, maximum
current will flow through the channel.
• The same amount of current will flow from the
source and the drain terminals.
The amount of channel current flow will be
determined by the value of VDD and the
internal resistance of the channel.
A typical value of source-drain resistance of a JFET is
quite a few hundred ohms. It is clear that even when the
gate is open full current conduction will take place in the
channel. Essentially, the amount of bias voltage applied
at ID, controls the flow of current carriers passing
through the channel of a JFET. With a small change in
gate voltage, JFET can be controlled anywhere between
full conduction and cutoff state.
Amplification Factor (u) − It is the ratio of change in drain-source
voltage (ΔVDS) to the change in gate source voltage (ΔVGS)
constant drain current (ΔID).
It can be expressed as,
u = (ΔVDS)/(ΔVGS) at constant ID
Output Characteristics of JFET

The output characteristics of JFET are drawn between drain


current (ID) and drain source voltage (VDS) at constant gate
source voltage (VGS) as shown in the following figure.
MOSFET
MOSFET

FETs have a few disadvantages like high drain resistance, moderate


input impedance and slower operation.
To overcome these disadvantages, the MOSFET which is an advanced
FET is invented.
MOSFET stands for Metal Oxide Silicon Field Effect Transistor or
Metal Oxide Semiconductor Field Effect Transistor.
This is also called as IGFET meaning Insulated Gate Field Effect
Transistor. The FET is operated in both depletion and enhancement
modes of operation. The following figure shows how a practical
MOSFET looks like.
Construction of a MOSFET

The construction of a MOSFET is a bit similar to the


FET. An oxide layer is deposited on the substrate to
which the gate terminal is connected.
This oxide layer acts as an insulator (sio2 insulates
from the substrate), and hence the MOSFET has
another name as IGFET. In the construction of
MOSFET, a lightly doped substrate, is diffused with
a heavily doped region. Depending upon the
substrate used, they are called as P-type and N-
type MOSFETs.
The voltage at gate controls the operation of the
MOSFET. In this case, both positive and negative voltages
can be applied on the gate as it is insulated from the
channel. With negative gate bias voltage, it acts as
depletion MOSFET while with positive gate bias voltage
it acts as an Enhancement MOSFET.
Working of N-Channel MOSFET Enhancement Mode
The same MOSFET can be worked in enhancement mode, if we can change the
polarities of the voltage VGG. So, let us consider the MOSFET with gate source voltage
VGG being positive as shown in the following figure.

When no voltage is applied between gate and source,


some current flows due to the voltage between drain
and source. Let some positive voltage is applied at VGG.
Then the minority carriers i.e. holes, get repelled and
the majority carriers i.e. electrons gets attracted
towards the SiO2 layer.
With some amount of positive potential at VGG a
certain amount of drain current ID flows through source
to drain. When this positive potential is further
increased, the current ID increases due to the flow of
electrons from source and these are pushed further due
to the voltage applied at VGG. Hence the more positive
the applied VGG, the more the value of drain current ID
will be. The current flow gets enhanced due to the
increase in electron flow better than in depletion mode.
Hence this mode is termed as Enhanced Mode MOSFET.
Working of N - Channel depletion mode
MOSFET
For now, we have an idea that there is no PN junction present between gate
and channel in this, unlike a FET. We can also observe that, the diffused
channel N between Two N+ Regions
, the insulating dielectric SiO2 and the aluminum metal layer of the gate
together form a parallel plate capacitor.
If the NMOS has to be worked in depletion mode, the gate terminal should be
at negative potential while drain is at positive potential, as shown in the
following figure.
When no voltage is applied between gate and source, some current flows
due to the voltage between drain and source. Let some negative voltage is
applied at VGG. Then the minority carriers i.e. holes, get attracted and settle
near SiO2 layer. But the majority carriers, i.e., electrons get repelled.
With some amount of negative potential at VGG a certain amount of drain
current ID flows through source to drain. When this negative potential is
further increased, the electrons get depleted and the current ID decreases.
Hence the more negative the applied VGG, the lesser the value of drain
current ID will be.
The channel nearer to drain gets more depleted than at source likeinFET
and the current flow decreases due to this effect. Hence it is called as
depletion mode MOSFET.
Drain Characteristics

The drain characteristics of a MOSFET are drawn between the drain current ID and the drain
source voltage VDS. The characteristic curve is as shown below for different values of inputs.

Actually when VDS is increased, the drain current ID should


increase, but due to the applied VGS, the drain current is
controlled at certain level. Hence the gate current controls
the output drain current.
Transfer Characteristics

Transfer characteristics define the change in the value of VDS with the change
in ID and VGS in both depletion and enhancement modes. The below transfer
characteristic curve is drawn for drain current versus gate to source voltage.

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