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    MCMM

    Uploaded by

    Agnathavasi
    cc

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    © All Rights Reserved
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    MCMM

    Uploaded by

    Agnathavasi
    74 views6 pages
    cc

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    © © All Rights Reserved

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    cc

    Copyright:

    © All Rights Reserved
    Download as PDF or read online from Scribd
    Download as pdf
    74 views6 pages

    MCMM

    Uploaded by

    Agnathavasi
    cc

    Copyright:

    © All Rights Reserved
    Download as PDF or read online from Scribd
    Download as pdf
    of 6
    (mmmc) Presented By sharief . shaile MMMCc:- ‘A mode is defined by a set of clocks, supply voltages, timing constraints, and libraries. It can also have annotation data, such as SDF or parasitic files. Many chip have multiple modes such as functional modes, test rode, sleep mode, and Corer:- ‘A comeris defined as a set of libraries characterized for process, voltage, and variations, Comers are not dependent on functional settings; they are meant to capture variations in manufacturing process, along with expected variations in the voltage and temperature of environment in which the chip wil operate PVT CONDITIONS (CORNERS) “Temperature: Best case, worst case, typical = 3 comers + Process for celis: Fast-fast, slow-slow, fast-siow, siow-fast, typical = 5 comers. -Voltage: Best case, worst case, typical = 3 comers *Process for interconnect: Max C, Min C, Max RC, Min RC, typical = § corners EXAMPLE:- consider a chip that has four operating modes (Normal, Sleep, Scan shift, tag), and is being analyzed at three PVT corners (WC, BC, TYPICAL) and three parasitic Interconnect comers (Typical, Min C, Min RC) Caer WC Ta ory) ee eed q formal/steep. ee Normal/sleep/sca_Normal/steep/sca nshift/itag nshift Mine 4:notrequired 5:Normal/steep 6: not required minke 7:notrequired &Normal/sleep 9: not required

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