COLLEGE OF COMPUTING AND INFORMATION

SCIENCES
Mid-Term Assessment Spring 2021 Semester
Class Id 106920 Course Title Computer Architecture
Program BSCS Campus / Shift City Campus/Evening
th
Date 11 March 2021 Total Points 100
Duration 02 hours Faculty Name Samrina Zamir
Student Id Student Name
Instructions:
• Filling out Student-ID and Student-Name on exam header is mandatory.
• Do not remove or change any part of exam header or question paper.
• Write down your answers in given space or at the end of exam paper with proper title
“Answer for Question# _ _”.
• Answers should be formatted correctly (font size, alignment and etc.)
• Handwritten text or image should be on A4 size page with clear visibility of contents.
• Only PDF format is accepted (Student are advise to install necessary software)
• In case of CHEATING, COPIED material or any unfair means would result in negative marking
or ZERO.
• A mandatory recorded viva session will be conducted to ascertain the quality of
answer scripts where deemed necessary.
• Caution: Duration to perform Mid-Term Assessment is 02 hours only. Extra 01 hours are
given to cater all kinds of odds in submission of Answer-sheet. Therefore, if you failed to
upload answer sheet on LMS (in PDF format) within 03 hours limit, you would be
considered as ABSENT/FAILED.
• Attempt ALL questions.
• Each question is of 20 marks.
• Reference material given at the end of question paper.
• Answer all the questions in this question paper.
• Check carefully PDF document before uploading that it has all the answers
provided by you with snapshots if you have in your paper.

STUDENT ID:________________________________ Page 1 of 8

 Question No 1 [5+10+5]

1. Using a quadruple 2 to 1 line Multiplexer and four inverters draw a block

diagram for implementing the statements .
T1:R2← R1

T2:R2← R2

T3:R2← 0

2. Design an Arithmetic circuit with two selection variables S0 and S1 that

generates the following Arithmetic operations. Draw the logic diagram of one
typical stage .

S0 S1 Cin = 0 Cin =1
0 0 B+A (add) B+A+1

0 1 AB(transfer) B+1(increment)

1 0 A'(complement) A'+1 (negate)

1 1 B+A' B+A'+1(subtract)

3. Given a figure of ALU which perform Arithmetic and Logical operations complete
the truth table by giving the details of operations performed.

S1 S0 Cin = 0 Cin = 1

0 0

0 1

1 0

1 1

STUDENT ID:________________________________ Page 2 of 8

 Question No 2 [10+10]

a. You need to design the control gates logic of Data Register. For this general-purpose
register, list-down all functions & Boolean expressions that are controlling the LD,
INR, and CLR inputs of DR. Also draw the control gates logic circuit for it.

b. Following is the instruction set of a machine (Note: This is not Mano

Machine) Machine has 16 bit instruction. and has four bits opcode
0000 Stop Execution
0001 Jump to adr if accumulator is zero
0010 Load AC from memory
0011 Copy the contents of DR to AC

0100 Subtract DR from AC

0101 And bitwise DR to AC

0110 Copy the contents AC to DR

0111 Add DR to AC

1000 Complement contents of AC

1001 Store contents of AC in memory

1010 Jump to instruction with address adr

The content of PC is 456 (all numbers are in hexadecimal). The content of AC is A145.
The content of memory at address 456 is 72BE. The content of memory at address
2BE is BCF1. The content of memory at address CF1 is 812A.
a. What is the instruction that will be fetched and executed next?
b. Show the binary operation that will be performed in the AC when the instruction
is executed.
c. Give the contents of registers PC, AR, DR, AC, and IR in hexadecimal and the values
of E, I, and the sequence counter SC in binary at each step of program (or instruction)
before execution and after execution.
d. Give RTL Of the instruction what you concluded from basic computer for applying
on this machine.

STUDENT ID:________________________________ Page 3 of 8

 Question No 3 [20]

1. List the assembly language program with instruction in hexadecimal for computing
GCD(Greatest Common divisor) generated by a compiler from the following pseudo
code:
while a!=b
if a < b Nearer Assembly Language:

b=b-a LOOP: compute b - a

if result is zero,go to DONE
else if result < 0 , goto BIGA
a=a-b store result in b goto LOOP
BIGA: Compute a - b
end else Store result in a goto LOOP
end while DONE: Put b into result
halt
return b
You have to write the above program in assembly of basic computer.

STUDENT ID:________________________________ Page 4 of 8

 Question No 4 [15+5]
1. Write a program to evaluate the arithmetic statement:

X=(A+B×C)/(D–E×F)
• Using a general register computer with three address instructions.
• Using a general register computer with two address instructions
• Using an accumulator type computer with one address instructions
• Using a stack organized computer with zero=address operation instructions.

2. What stack elements remain after the following instructions are executed? [5]
PUSH 1
PUSH 3
PUSH 6
ADD
PUSH 20
SUB
MUL

-11

STUDENT ID:________________________________ Page 5 of 8

 Question No 5 [10+10]

1. Consider the following memory map A=032BH and (R) =5190H

Memory Address Contents

2345H 0025H
op-code R A 001AH ABF0H
032BH 15FFH
1234H 001AH
1321H 1234H
1353H 0032H
3C00H F10FH
5190H 0032H
63C4H 0000H
64B1H 63C4H

Find Effective address and operand for the following Addressing modes.
• Immediate
• Direct
• Indirect
• Register Direct
• Register Indirect
• Pre-Indexing
• Post-Indexing

2. A machine uses 16-bit instructions including 3-bits for an address field. The
Expanding op-code technique is to be used so that the machine instruction set
contains 15- 3 Address instructions, 40- 2 Address instructions 60-1 Address
instructions .Is the Instruction set design possible and if so, Find out the maximum
number of zero Address Instructions that machine can have. Also show encoding of
all instructions.

STUDENT ID:________________________________ Page 6 of 8

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