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Experiment 4 Final

The document discusses a lab report on decoders. It covers the objectives, components used, theory, problems solved, and discussion. The report examines pin diagrams and logic diagrams of decoders, implementing functions using decoders, and building gates with decoders in Logisim software.

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liddleme33
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90 views

Experiment 4 Final

The document discusses a lab report on decoders. It covers the objectives, components used, theory, problems solved, and discussion. The report examines pin diagrams and logic diagrams of decoders, implementing functions using decoders, and building gates with decoders in Logisim software.

Uploaded by

liddleme33
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
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Lab Report on Decoders

Course Code: CSE 1326


Course Title: Digital Logic Design Laboratory
Experiment No: 04 | Group No: 01

Submitted by:
Name: Tarek Hasan
Student ID: 0112230109
Section: D

Submitted to:
Fahim Hafiz
Lecturer
Dept. of CSE, UIU

Performance Date: 17th June 2023


Submission Date: 24th June 2023
Objectives:
1. Pin diagram of 74139 (with two 2-to-4 decoders inside).
2. Logic diagram of 3-to-8 line decoder implementation
a. Basic gates, hierarchical (Decoder and AND gate – two inputs)
b. 2-to-4 line decoders with enable
3. Logic diagram of realizing combinational circuits using 3-to-8 line decoder
F = M1 . M3 . M6 . M7
4. How to use the 3-to-8 line decoder (the one you have designed with two 2-to-4 line
decoders) for implementing the following function?
F = m0 + m4 + m5 + m7
5. Implement 2 input AND, OR, XOR, NAND Gate using decoder and basic gates in
logisim. Show the circuit diagram in Logisim for each gate.
6. Implement 3 input XOR gate using Decoder and basic gates. Show the circuit
implementation in Logisim.
7. Implement the logic function , F = M(1, 3, 9, 13) using 3-8 decoder and basic gate.

Components used:
1. 74LS08 Quad 2-Input AND gate
2. 74LS32 Quad 2-Input OR gate
3. 74LS86 Quad 2-Input XOR
4. 74LS00 Quad 2-Input NAND gate
5. 3-to-8 line Decoder
6. 74139 dual 2-to-4 Decoder
7. Logisim software

Theory:
In digital logic design, a decoder is a combinational circuit that takes binary inputs and
produces multiple outputs based on the input combination. It is commonly used to convert
a binary code into a set of control signals. The decoder's functionality is determined by the
number of inputs and outputs it has, where the number of inputs corresponds to the binary
code's bit size, and the number of outputs depends on the desired output combinations.
Each input combination activates a specific output line, which represents a unique code.
Decoders are widely employed in various applications, including address decoding in
memory systems, signal routing, data multiplexing, and demultiplexing. They play a
fundamental role in digital systems by enabling efficient information processing and
control.
Problem/Design Solve Procedure:
1. Pin diagram of 74139 (with two 2-4 decoders inside).

2. Logic diagram of 3-to-8 line decoder implementation


a. Basic gates, hierarchical (Decoder and AND gate – two inputs)
b. 2-to-4 line decoders with enable

3. Logic diagram of realizing combinational circuits using 3-to-8 line decoder


F = M1 . M3 . M6 . M7

Here, F = M1.M3.M6.M7 indicates the Max-terms (M). So the Min-Terms (m) are:
F = m0 + m2 + m4 + m5.

Truth Table:

A B C m
0 0 0 1
0 0 1 0
0 1 0 1
0 1 1 0
1 0 0 1
1 0 1 1
1 1 0 0
1 1 1 0
Logic Diagram:

4. How to use the 3-to-8 line decoder (the one you have designed with two 2-to-4 line
decoders) for implementing the following function?
F = m0 + m4 + m5 + m7

Truth table:

A B C m
0 0 0 1
0 0 1 0
0 1 0 0
0 1 1 0
1 0 0 1
1 0 1 1
1 1 0 0
1 1 1 1

Logic diagram:
5. Implement 2 input AND, OR, XOR, NAND Gate using decoder and basic gates in
logisim. Show the circuit diagram in Logisim for each gate.

AND gate:

OR gate:
XOR gate:

NAND gate:
6. Implement 3 input XOR gate using Decoder and basic gates. Show the circuit
implementation in Logisim.

Logic diagram:

7. Implement the logic function, F = M (1, 3, 9, 13) using 3-8 decoder and basic gate.
So, the Max-terms mentioned in the questions are F = M (1,3,9,13). Thus, the
Min-terms are:
F = m0 + m2 + m4 + m5 + m6 + m7 + m8 + m10 + m11 + m12 + m14 + m15
Discussion:
During the course of this experiment, I have gained a comprehensive understanding of
various types of decoders and their underlying mechanisms. By observing the
implementation of a decoder on the trainer board, I was able to witness its practical
application and analyze its behavior. Moreover, I had the opportunity to construct decoder
circuits from scratch using logic gates, thereby deepening my understanding of their logical
composition. By comparing the outputs of these circuits with their corresponding truth
tables, I could verify their accuracy and functionality. This hands-on experience has
enhanced my knowledge of decoders, their circuitry, and the fundamental principles of
digital logic design. Overall, this experiment has provided valuable insights into the
practical implementation and validation of decoders.

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