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    BCD Adder

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    snehaa30.01.2005
    The document describes the design and implementation of a 4-bit BCD adder using the IC 7483. It includes the pin diagram and logic diagram of the IC 7483, as well as the truth table for BCD addition. The procedure connects the components as shown in the circuit diagram and verifies the output using the truth table. The aim is achieved by successfully adding two 4-bit BCD numbers using the IC 7483 BCD adder circuit.

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    BCD Adder

    Uploaded by

    snehaa30.01.2005
    213 views9 pages
    The document describes the design and implementation of a 4-bit BCD adder using the IC 7483. It includes the pin diagram and logic diagram of the IC 7483, as well as the truth table for BCD addition. The procedure connects the components as shown in the circuit diagram and verifies the output using the truth table. The aim is achieved by successfully adding two 4-bit BCD numbers using the IC 7483 BCD adder circuit.

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    The document describes the design and implementation of a 4-bit BCD adder using the IC 7483. It includes the pin diagram and logic diagram of the IC 7483, as well as the truth table for BCD addition. The procedure connects the components as shown in the circuit diagram and verifies the output using the truth table. The aim is achieved by successfully adding two 4-bit BCD numbers using the IC 7483 BCD adder circuit.

    Copyright:

    © All Rights Reserved
    Download as DOCX, PDF, TXT or read online from Scribd
    Download as docx, pdf, or txt
    213 views9 pages

    BCD Adder

    Uploaded by

    snehaa30.01.2005
    The document describes the design and implementation of a 4-bit BCD adder using the IC 7483. It includes the pin diagram and logic diagram of the IC 7483, as well as the truth table for BCD addition. The procedure connects the components as shown in the circuit diagram and verifies the output using the truth table. The aim is achieved by successfully adding two 4-bit BCD numbers using the IC 7483 BCD adder circuit.

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    1

    EX NO : 11 DESIGN OF BCD ADDER


    DATE:
    AIM:
    To design and implement BCD Adder using IC 7483.

    APPARATUS REQUIRED:
    S.No. COMPONENT SPECIFICATION QTY.
    1. IC IC 7483 1
    2. EX-OR GATE IC 7486 1
    3. NOT GATE IC 7404 1
    3. IC TRAINER KIT - 1
    4. PATCH CORDS - 40

    THEORY:

    4 BIT BCD ADDER:

    Consider the arithmetic addition of two decimal digits in BCD, together with an
    input carry from a previous stage. Since each input digit does not exceed 9, the output
    sum cannot be greater than 19, the 1 in the sum being an input carry. The output of two
    decimal digits must be represented in BCD and should appear in the form listed in the
    columns.
    A BCD adder that adds 2 BCD digits and produce a sum digit in BCD. The 2
    decimal digits, together with the input carry, are first added in the top 4 bit adder to
    produce the binary sum.

    PIN DIAGRAM FOR IC 7483:


    2
    LOGIC DIAGRAM:
    BCD ADDER
    3

    K MAP

    Y = S4 (S3 + S2)
    TRUTH TABLE:

    BCD SUM CARRY


    S4 S3 S2 S1 C
    0 0 0 0 0
    0 0 0 1 0
    0 0 1 0 0
    0 0 1 1 0
    0 1 0 0 0
    0 1 0 1 0
    0 1 1 0 0
    0 1 1 1 0
    1 0 0 0 0
    1 0 0 1 0
    1 0 1 0 1
    1 0 1 1 1
    1 1 0 0 1
    1 1 0 1 1
    1 1 1 0 1
    1 1 1 1 1

    PROCEDURE:

    (i) Connections were given as per circuit diagram.

    (ii) Logical inputs were given as per truth table

    (iii) Observe the logical output and verify with the truth tables.
    4

    RESULT:
    5
    EX NO. 11

    DESIGN AND IMPLEMENTATION OF DEMULTIPLEXER

    AIM:
    To design and implement Demultiplexer using logic gates and
    study of IC 74150 and IC 74154.

    APPARATUS REQUIRED:
    Sl.No. COMPONENT SPECIFICATION QTY.
    1. 3 I/P AND GATE IC 7411 2
    2. OR GATE IC 7432 1
    3. NOT GATE IC 7404 1
    2. IC TRAINER KIT - 1
    3. PATCH CORDS - 32

    THEORY:
    DEMULTIPLEXER:
    The function of Demultiplexer is in contrast to multiplexer function. It takes
    information from one line and distributes it to a given number of output lines. For this
    reason, the demultiplexer is also known as a data distributor. Decoder can also be used as
    demultiplexer.
    In the 1: 4 demultiplexer circuit, the data input line goes to all of the AND gates.
    The data select lines enable only one gate at a time and the data on the data input line will
    pass through the selected gate to the associated data output line.

    BLOCK DIAGRAM FOR 1:4 DEMULTIPLEXER


    6

    FUNCTION TABLE:

    S1 S0 INPUT
    0 0 X → D0 = X S1’ S0’
    0 1 X → D1 = X S1’ S0
    1 0 X → D2 = X S1 S0’
    1 1 X → D3 = X S1 S0

    Y = X S1’ S0’ + X S1’ S0 + X S1 S0’ + X S1 S0

    LOGIC DIAGRAM FOR DEMULTIPLEXER:


    7
    TRUTH TABLE:
    INPUT OUTPUT
    S1 S0 I/P D0 D1 D2 D3
    0 0 0 0 0 0 0
    0 0 1 1 0 0 0
    0 1 0 0 0 0 0
    0 1 1 0 1 0 0
    1 0 0 0 0 0 0
    1 0 1 0 0 1 0
    1 1 0 0 0 0 0
    1 1 1 0 0 0 1
    8

    PROCEDURE:

    (i) Connections are given as per circuit diagram.

    (ii) Logical inputs are given as per circuit diagram.

    (iii) Observe the output and verify the truth table.

    RESULT:
    9

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