Chapter 3: Logic Gates and Boolean algebra

CHAPTER 3 LOGIC GATES AND BOOLEAN ALGEBRA

3.1 Introduction
Digital Logic Synchronous logic brings time into play along with the associated issue
All digital systems are founded on logic design. Logic design transforms of how fast a circuit can reliably operate. Logic elements are
algorithms and processes conceived by people into computing machines. constructed using real electrical components, each of which has
A grasp of digital logic is crucial to the understanding of other basic physical requirements that must be satisfied for proper operation.
elements of digital systems, including microprocessors. This chapter Timing analysis is discussed as a basic part of logic design, because it
addresses vital topics ranging from Boolean algebra to synchronous quantifies the requirements of real components and thereby
logic to timing analysis with the goal of providing a working set of establishes a digital circuit’s practical operating conditions.
knowledge that is the prerequisite for learning how to design and Binary logic deals with variables that take on two discrete values and
implement an unbounded range of digital systems. with operations that assume logical meaning. The two values the
Logic gates are electronic circuits that can be used to implement the variables take may be called by different names (e.g., true and false,
most elementary logic expressions, also known as Boolean expressions. yes and no, etc.), but for our purpose, it is convenient to think in terms
Logic gates are the basic elements that make up a digital system. The of bits and assign the values of I and O. Binary logic is used to
electronic gate is a circuit that is able to operate on a number .of describe, in a mathematical way, the manipulation and processing of
binary inputs in order to perform a particular logical function. binary information. It is particularly suited for the analysis and design
Boolean algebra is the mathematical basis for logic design and of digital systems. The binary logic to be introduced in this section is
establishes the means by which a task’s defining rules are represented equivalent to an algebra called Boolean algebra. The purpose of this
digitally. The topic is introduced in stages starting with basic logical section is to introduce Boolean algebra in a heuristic manner and relate
operations and progressing through the design and manipulation of logic it to digital logic circuits and binary signals.
equations. Binary and hexadecimal numbering and arithmetic was Machines of all types, including computers, are designed to perform
discussed in previous chapter, to explain how logic elements accomplish specific tasks in exact well de- fined manners. Some machine
significant and practical tasks. With an understanding of how basic components are purely physical in nature, because their composition and
logical relationships are established and implemented, the discussion behavior are strictly regulated by chemical, thermodynamic, and
moves on to explain flip-flops and synchronous logic design. Synchronous physical properties. For example, an engine is designed to transform
logic complements Boolean algebra, because it allows logic operations to the energy released by the combustion of gasoline and oxygen into
store and manipulate data over time. Digital systems would be rotating a crankshaft. Other machine components are algorithmic in
impossible without a deterministic means of advancing through an nature, because their designs primarily follow constraints necessary to
algorithm’s sequential steps. Boolean algebra defines algorithmic steps, implement a set of logical functions as defined by human beings rather
and the progression between steps is enabled by Synchronous logic. than the laws of physics. A traffic light’s behavior is predominantly
defined by human beings rather than by natural physical laws. This book

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 Chapter 3: Logic Gates and Boolean algebra

is concerned with the design of digital systems that are suited to the
algorithmic requirements of their particular range of applications.
Digital logic and arithmetic are critical building blocks in constructing
such systems.
An algorithm is a procedure for solving a problem through a series of
finite and specific steps. It can be represented as a set of
mathematical formulas, lists of sequential operations, or any
combination thereof. Each of these finite steps can be represented by
a Boolean logic equation. Boolean logic is a branch of mathematics that
was discovered in the nineteenth century by an English mathematician
named George Boole. The basic theory is that logical relationships can
be modeled by algebraic equations. Rather than using arithmetic
operations such as addition and subtraction, Boolean algebra employs
logical operations including AND, OR, and NOT. Boolean variables have
two enumerated values: true and false, represented numerically as 1
and 0, respectively. The AND operation is mathematically defined as
the product of two Boolean values, denoted A and B for reference.
Truth tables are often used to illustrate logical relationships as shown
for the AND operation in Table 3.1. A truth table provides a direct
mapping between the possible inputs and outputs. A basic AND
operation has two inputs with four possible combinations, because each
input can be 1 or 0 — true or false. Mathematical rules apply to Boolean
algebra, resulting in a non- zero product only when both inputs are 1.
There are three basic logic gates, namely the OR gate, the AND gate
and the NOT gate. Other logic gates that are derived from these
basic gates are the NAND gate, the NOR gate, the EXCLUSIVE- OR Fig. 3-1
gate and the EXCLUSIVE-NOR gate. Except for the exclusive-NOR Switching Circuits and Binary Signals
gate, are all others available in monolithic integrated circuit form. Logic The use of binary variables and the application of binary logic are
gates are the building blocks of digital electronics. Figure 3.0 provides demonstrated by the simple switching circuits of Fig. 3-1. Let the
a description of what each logic gate does and gives a switch and manual switches A and B represent two binary variables with values
transistor analogy for each gate. equal to 0 when the switch is open and 1 when the switch is closed.
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 Chapter 3: Logic Gates and Boolean algebra

Similarly, let the lamp L represent a third binary variable equal to 1 is crossed only during state transitions. The input terminals of digital
when the light is on and 0 when off. For the switches in series, the circuits accept binary signals within the allowable tolerances and
light turns on if A and B are closed. For the switches in parallel, the respond at the out- put terminal with binary signals that fall within the
light turns on if A or B is closed. It is obvious that the two circuits can specified tolerances.
be expressed by means of binary logic with the AND and OR Electronic digital circuits are also called logic circuits because, with
operations, L=A·B L=A+B for the circuit of Fig. 3-1(b) for the the proper input, they establish logical manipulation paths. Any desired
circuit of Fig. 3-1(c) respectively; information for computing or control can be operated upon by passing
Electronic digital circuits are sometimes called switching circuits binary signals through various combinations of logic circuits, each signal
because they behave like a switch, with the active element such as a representing a variable and carrying one bit of information. Logic
transistor either conducting (switch closed) or not conducting (switch circuits that perform the logical operations of AND, OR, and NOT are
open). Instead of changing the switch manually, an electronic switching shown with their symbols in Fig. 3-3.
circuit uses binary signals to control the conduction or non-conduction
state of the active element. Electrical signals such as voltages or
currents exist throughout a digital system in either one of two
recognizable values (except during transition). Voltage-operated
circuits, for example, respond to two separate voltage levels, which
represent a binary variable equal to logic-l or logic-O. For example, a
particular digital system may define logic-l as a signal with a nominal Fig. 3-3 schematic symbols of basic logic gates
value of 3 volts and logic-O as a signal with a nominal value of 0 volt.

Fig. 3-4 timing diagram of Digital signals and logic operations

These circuits, called gates, are blocks of hardware that produce a
logic-l or logic-O output signal if input logic requirements are satisfied.
As shown in Fig. 3-2, each voltage level has an acceptable deviation Note that four different names have been used for the same type of
from the nominal. The intermediate region between the allowed regions circuits: digital circuits, switching circuits, logic circuits, and gates. All
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 Chapter 3: Logic Gates and Boolean algebra

four names are widely used, but we shall refer to the circuits as AND, For example, xy = z or xy = Z is read "x AND y is equal to z." The
OR, and NOT gates. The NOT gate is sometimes called an inverter logical operation AND is interpreted to mean that z = 1 if and only if x
circuit since it inverts a binary signal. The input signals x and y in the = 1 and y = 1; otherwise z = O. (Remember that x, y, and z are binary
two-input gates of Fig. 3-3 may exist in one of four possible states: 00, variables and can be equal either to 1 or 0, and nothing else.)
10, 11, or 01. These input signals are shown in Fig. 3-4, together with OR: This operation is represented by a plus sign. For example, x + y = z
the output signals for the AND and OR gates. The timing diagrams in is read "x OR y is equal to z," meaning that z = 1 if x = 1 or if y = 1 or if
Fig. 3-4 illustrate the response of each circuit to each of the four both x = 1 and y = 1. If both x = 0 and y = 0, then z = o.
possible input binary combinations. The reason for the name "inverter" NOT: This operation is represented by a prime (sometimes by a bar).
for the NOT gate is apparent from a comparison of the signal x (input For example, x’ = Z (or x = z) is read "not x is equal to z," meaning that
of inverter) and that of x' (output of inverter), AND and OR gates may z is what x is not. In other words, if x = 1, then z = 0; but if x = 0, then
have more than two inputs, an AND gate with three inputs and an OR z = 1.
gate with four inputs are shown in Fig. 3-3. The three-input AND gate Table 3.1 AND Operation Truth Table
responds with a logic-l output if all three input signals are logic-I. The
output produces a logic-O signal if any input is logic-O. The four-input A B A AND B
OR gate responds with a logic-I when any input is a logic-I. Its output 0 0 0
becomes logic-O if all input signals are logic-O. 0 1 0
1 0 0
The mathematical system of binary logic is better known as Boolean, or
1 1 1
switching, algebra. This algebra is conveniently used to describe the
Summation is represented by the OR operation in Boolean algebra as
operation of complex networks of digital circuits. Designers of digital
shown in Table 1.2. Only one combination of inputs to the OR operation
systems use Boolean algebra to transform circuit diagrams to algebraic
result in a zero sum: 0 + 0 = 0.
expressions and vice versa. We know that, to represent and solve
Table 3.2 OR Operation Truth Table
arithmetic expressions we use arithmetic operators such as +, -, x and
+, similarly, we can use logical operators to represent and solve logical A B A OR B
expressions. 0 0 0
Binary logic consists of binary variables and logical operations. The 0 1 1
variables are designated by letters of the alphabet such as A, B, C, x, 1 0 1
y, Z, etc., with each variable having two and only two distinct possible 1 1 1
values: 1 and O. There are three basic logical operations: AND, OR, and AND and OR are referred to as binary operators, because they require
NOT. two operands. NOT is a Unary, meaning that it requires only one
AND: This operation is represented by a dot or by the absence of an operand. The NOT operator returns the complement of the input: 1
operator.
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 Chapter 3: Logic Gates and Boolean algebra

becomes 0, and 0 becomes 1. When a variable is passed through a NOT In fact, the symbols used for AND and OR are the same as those used
operator, it is said to be inverted. for multiplication and addition. However; binary logic should not be
Boolean variables may not seem too interesting on their own. It is what confused with binary arithmetic. One should realize that an arithmetic
they can be made to represent that leads to useful constructs. A variable designates a number that may consist of many digits. A logic
rather contrived example can be made from the following logical variable is always either a l or a O. For example, in binary arithmetic,
statement: we have 1 + 1 = 10 (read: "one plus one is equal to 2"), whereas in binary
“If today is Saturday or Sunday and it is warm, then put on logic, we have 1 + 1 = 1 (read: "one OR one is equal to one").For each
shorts.” combination of the values of x and y, there is a value of z specified by
Three Boolean inputs can be inferred from this statement: Saturday, the definition of the logical operation. The gate is a digital circuit with
Sunday, and warm. One Boolean output can be inferred: shorts. These one or more input voltages but only one output voltage. By connecting
four variables can be assembled into a single logic equation that the different gates in different ways, we can build circuits that
computes the desired result, perform arithmetic and other functions associated with the human
Shorts = (Saturday OR Sunday) AND warm brain because they simulate mental processes.
While this is a simple example, it is representative of the fact that any The operation 'of logic gate can be easily understood with the help of
logical relationship can be expressed algebraically with products and "truth table". A truth table is a table that shows all the input-output
sums by combining the basic logic functions AND, OR, and NOT. possibilities of a logic circuit; i.e. the truth table indicates the outputs
Several other logic functions are regarded as elemental, even though for different possibilities of the inputs. A truth table is a table of all
they can be broken down into AND, OR, and NOT functions. These are possible combinations of the variables showing the relation between
not–AND (NAND), not–OR (NOR), exclusive–OR (XOR), and exclusive– the values that the variables may take and the result of the operation.
NOR (XNOR). Table 3.3 presents the logical definitions of these other For example, the truth tables for the operations AND and OR with
basic functions. XOR is an interesting function, because it implements a variables x and y are obtained by listing all possible values that the
sum that is distinct from OR by taking into account that 1 + 1 does not variables may have when combined in pairs. The result of the operation
equal 1. As will be seen later, XOR plays a key role in arithmetic for for each combination is then listed in a separate row.
this reason. All binary operators can be chained together to implement a wide
Table 3.3 NAND, NOR, XOR, XNOR Truth Table function of any number of inputs. For example, the truth table for a
A B A NAND B A NOR B A XOR B A XNOR B ten-input AND function would result in a 1 output only when all inputs
0 0 1 1 0 1 are 1. Similarly, the truth table for a seven-input OR function would
0 1 1 0 1 0 result in a 1 output if any of the seven inputs are 1. A four-input XOR,
1 0 1 0 1 0
however, will only result in a 1 output if there are an odd number of
1 1 0 0 0 1
ones at the inputs. This is because of the logical daisy chaining of
Binary logic resembles binary arithmetic, and the operations AND and
multiple binary XOR operations.
OR have some similarities with multiplication and addition, respectively.
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 Chapter 3: Logic Gates and Boolean algebra

As shown in Table 3.3, an even number of 1’s presented to an XOR circuit terminology, the logical operators are called gates.
function cancel each other out. It quickly grows unwieldy to write out . Figure 3.5 shows how the basic logic gates are drawn on a
the names of logical operators. Concise algebraic expressions are circuit diagram. Naming the inputs of each gate A and B and the output
written by using the graphical representations shown in Table 3.4. Note Y is for reference only; any name can be chosen for convenience. A
that each operation has multiple symbolic representations. The choice small bubble is drawn at a gate’s output to indicate a logical inversion.
of representation is a matter of style when hand-written and is
predetermined when programming a computer by the syntactical
requirements of each computer programming language. A common means
of representing the output of a generic logical function is with the
variable Y.
Table 1.4 Symbolic Representations of Standard Boolean Operators
FIGURE 3.5 Graphical representations of basic logic gates.
More complex Boolean functions are created by combining Boolean
operators in the same way that arithmetic operators are combined in
normal mathematics. Parentheses are useful to explicitly convey
precedence information so that there is no ambiguity over how
two variables should be treated. A Boolean function might be written
as

This same equation could be represented graphically in a circuit

Therefore, the AND function of two variables, A and B, can be written diagram, also called a Schematic diagram, as shown in Fig 3.6. This
as Y = A & B or Y = A*B. As with normal mathematical notation, representation uses only two-input logic gates.
products can also be written by placing terms right next to each other, As already mentioned above, binary operators can be chained together
such as Y = AB. Notation for the inverted functions, NAND, NOR, and to implement functions of more than two variables.
XNOR, is achieved by inverting the base function.
Two equally valid ways of representing NAND are
and Y =(AB)’.
Similarly, an XNOR might be written as
When logical functions are converted into circuits, graphical
representations of the seven basic operators are commonly used. In FIGURE 3.6 Schematic diagram of logic function.
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 Chapter 3: Logic Gates and Boolean algebra

An alternative graphical representation would use a three-input OR [CMOS devices listed in the figures include 74HCxx, 4000(B), while
gate by collapsing the two-input OR gates into a single entity. TTL devices shown include the 74xx, 74Fxx, and 74LS.]
The construction of digital gates is best left to the IC manufacturers.
In fact, making gates from discrete components is highly impractical in
regard to both overall performance (power consumption, speed, drive
capacity, etc.) and overall cost and size. There are a number of
technologies used in the fabrication of digital logic. The two most
popular technologies include TTL (transistor-transistor logic) and
CMOS (complementary MOSFET) logic. TTL incorporates bipolar
transistors into its design, while CMOS incorporates MOSFET
transistors. Both technologies perform the same basic functions, but
certain characteristics (e.g., power consumption, speed, output drive
capacity, etc.) differ. There are many subfamilies within both TTL and
CMOS.
A logic IC, be it TTL or CMOS, typically houses more than one logic
gate (e.g., quad 2-input NAND, hex inverter, etc.). Each of the gates
within the IC shares a common supply voltage that is implemented via
two supply pins, a positive supply pin (+VCC or +VDD) and a ground pin
(GND). The vast majority of TTL and CMOS ICs are designed to run Figure 3.6 typical IC logic families
off a +5-V supply. (This does not apply for all the logic families, but I
will get to that later.)
Generally speaking, input and output voltage levels are assumed to be 0
V (low) and +5 V (high). However, the actual input voltage required and
the actual output voltage provided by the gate is not set in stone. For
example, the 74xx TTL series will recognize a high input from 2.0 to 5
V, a low from 0 to 0.8 V, and will guarantee a high output from 2.4 to 5
V and a low output from 0 to 0.4 V. However, for the CMOS 4000B
series (VCC = +5 V), recognizable input voltages range from 3.3 to 5 V
for high, 0 to 1.7 V for low, while guaranteed high and low output levels
range from 4.9 to 5 V and 0 to 0.1 V, respectively. For now, let’s just
get acquainted with what some of these ICs look like. See Figs. 3.6.
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 Chapter 3: Logic Gates and Boolean algebra

3.4 The universal property of NAND and NOR gates input example. Also, an OR gate can be produced from NOR gates,
as illustrated in Fig.( (3-9)(b). An AND gate can be constructed by the
The NAND Gate as a Universal Logic Element use of NOR gates, as shown in Fig(3-9)(c). In this case the NOR gates
The NAND gate is a universal gate because it can be used to produce G 1 and G 2 are used as inverters, and the final output is derived by the
the NOT, the AND, the OR, and the NOR functions. An inverter can use of DeMorgan's theorem as follows:
be made from a NAND gate by connecting all of the inputs X=(A’+B’)’=AB Fig(3-9)(d) shows how NOR gates are used t0 form a
together and creating, in effect, a single input, as shown in Fig.(6- NAND function.
8)(a) for a 2-input gate. An AND function can be generated by the use
of NAND gates alone, as shown in Fig.(6-8)(b). An OR function can be
produced with only NAND gates, as illustrated in part (c). Finally.
a NOR function is produced as shown in part (d).

Fig 3.9
Exercise
implement the following Boolean function using Basic logic gates and
Fig3.8
repeat using NAND-NAND AND NOR-NOR logic network
The NOR Gate as a Universal Logic Element
A’B 2. AB’ C. A’B+AB’
Like the NAND gate, the NOR gate can be used to produce the NOT,
AND. OR and NAND functions. A NOT circuit, or inverter, can be
made from a NOR gate by connecting all of the inputs together to
effectively create a single input, as shown in Fig.(3-9)(a) with a 2-
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 Chapter 3: Logic Gates and Boolean algebra

Positive and Negative Logic Boolean Algebra, invented by the mathematician George Boole in 1854.
The binary signals at the inputs or outputs of any gate may be one of Boolean Algebra deals with the rules by which logical operations
two values, except during transitions. One signal value represents logic are carried out. In 1854 George Boole introduced a systematic
1, and the other is logic 0. For a positive logic system, the most approach of logic and developed an algebraic system to treat the logic
positive voltage level represents logic 1 state or HIGH level voltage functions, which is now called Boolean algebra. In 1938 C.E. Shannon
level represents logic 1 state. developed a two-valued Boolean algebra called Switching algebra, and
demonstrated that the properties of two-valued or bi-stable electrical
switching circuits can be represented by this algebra. The postulates
formulated by E.V. Huntington in 1904 are employed for the formal
definition of Boolean algebra. However, Huntington postulates are
not unique for defining Boolean algebra and other postulates are
For example, if the voltage levels are –1 volt and –10 volt in a positive also used. The following Huntington postulates are satisfied for
logic system, then –1 volt represents logic 1 and –10 volt represents the definition of Boolean algebra on a set of elements S
logic 0. together with two binary operators (+) and (•).
In a negative logic system, logic 1 state is represented by –10 volt and (a) Closer with respect to the operator (+).
logic 0 is represented by –1 volt. Figure 3.41(a) represents the (b). Closer with respect to the operator (•).
positive logic system choosing the highest voltage level as logic 1 (a) An identity element with respect to (+) is designated by 0 i.e.,
and the lowest voltage level as logic 0. Whereas Figure 3.41(b) A+0 = 0+A = A.
represents the negative logic system assigning the highest voltage level (b) An identity element with respect to (•) is designated by 1 i.e.
as logic 0 and the lowest voltage level as logic 1. A•1= 1•A = A.
(a) Commutative with respect to (+), i.e., A + B = B + A.
3.5 INTRODUCTION TO BOOLEAN ALGEBRA (b) Commutative with respect to (•), i.e., A•B = B•A.
Binary logic deals with variables that have two discrete values—1 for (a) (•) Is distributive over (+), i.e., A •(B+C) = (A•B) + (A•C).
TRUE and 0 for FALSE. A simple switching circuit containing active For every element A ∈ S, there exists an element A' ∈ S (called
elements such as a diode and transistor can demonstrate the binary the complement of A) such that A+ A′ =1 and A • A′ = 0.
logic, which can either be ON (switch closed) or OFF (switch open). There exists at least two elements A,B ∈ S, such that A
Electrical signals such as voltage and current exist in the digital is not equal to B.
system in either one of the two recognized values, except during Comparing Boolean algebra with arithmetic and ordinary algebra
transition. The switching functions can be expressed with Boolean (the field of real numbers), the following differences are
equations. Complex Boolean equations can be simplified by a new observed:
kind of algebra, which is popularly called Switching Algebra or

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 Chapter 3: Logic Gates and Boolean algebra

1. Huntington postulates do not include the associate law. However, The set of elements S, together with the two operators
Boolean algebra follows the law and can be derived from the satisfies six Huntington postulates.
other postulates for both operations. One may formulate many Boolean algebras, depending on the
2. The distributive law of (+) over (•) i.e., A+ (B.C) = (A+B) •(A+C) is choice of elements of set S and the rules of operation. In the
valid for Boolean algebra, but not for ordinary algebra. subsequent chapters, we will only deal with a two-valued Boolean
3. Boolean algebra does not have additive or multiplicative algebra i.e., one with two elements. Two-valued Boolean algebra
inverses, so there are no subtraction or division operations. has the applications in set theory and propositional logic. But
4. Postulate 5 defines an operator called Complement, which is not here, our interest is with the application of Boolean algebra to
available in ordinary algebra. gate-type logic circuits.
5. Ordinary algebra deals with real numbers, which consist of an 3.5.1 TWO-VALUED BOOLEAN ALGEBRA
infinite set of elements. Boolean algebra deals with the as yet Two-valued Boolean algebra is defined on a set of only two
undefined set of elements S, but in the two- valued Boolean elements, S = {0,1}, with rules for two binary operators (+) and (•)
algebra, the set S consists of only two elements—0 and 1. and inversion or complement as shown in the following operator table.
Boolean algebra is very much similar to ordinary algebra in some A B A + B A•B A′ B′
respects. The symbols (+) and (•) are chosen intentionally to facilitate 0 0 0 0 1 1
Boolean algebraic manipulations by persons already familiar to ordinary 0 1 1 0 1 0
algebra. Although one can use some knowledge from ordinary 1 0 1 0 0 1
algebra to deal with Boolean algebra, beginners must be careful not to 1 1 1 1 0 0
substitute the rules of ordinary algebra where they are not The rule for the complement operator is for verification of
applicable. It is important to distinguish between the elements of the postulate 5. These rules are exactly the same for as the logical
set of an algebraic structure and the variables of an algebraic system. OR, AND, and NOT operations, respectively
For example, the elements of the field of real numbers are It can be shown that the Huntington postulates are applicable
numbers, the variables such as X, Y, Z, etc., are the symbols for the set S = {0,1} and the two binary operators defined above.
that stand for real numbers, which are used in ordinary algebra. On  Closure is obviously valid, as it is can be observed from truth
the other hand, in the case of Boolean algebra, the elements of a set S tables of AND Operator (•) and OR Operator(+),the result of each
are defined, and the variables A, B, C, etc., are merely symbols operation is either 0 or 1 and 0,1 ∈ S.
that represent the elements. At this point, it is important to  From the above table we can see clearly the following facts; In
realize that in order to have Boolean algebra, the following must fact these operations verifies the two identity elements 0 for (+) and 1
be shown. for (•) as defined by postulate 2 above.
The elements of the set S. 0 + 0 = 0  1•1=1
The rules of operation for the two binary operators 0 + 1 = 1  1•0=0

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 Chapter 3: Logic Gates and Boolean algebra

1 + 0 = 1  0•1=0 In ordinary algebra, the letter symbols can take on any number of
1 + 1 = 1  0•0=0 values including infinity. In Boolean algebra, they can take on either of
 The commutative laws are confirmed by the symmetry of two values, that is, 0 and 1.
binary operator tables. The values assigned to a variable have a numerical significance in
. The distributive laws of (•) over (+) i.e., A •(B+C)=(A • B) + (A •C), ordinary algebra, whereas in its Boolean counterpart they have a logical
and (+) over (•) i.e., A+(B•C)=(A+B)•(A+C) can be shown to be significance.
applicable with the help of the truth tables considering all the While ‘.’ and ‘+’ are respectively the signs of multiplication and
possible values of A, B, and C.( exercise by yourself this fact). addition in ordinary algebra, in Boolean algebra ‘.’ means an AND
 A + A′ = 1, since 0 + 0' = 1 and 1 + 1' = 1. operation and ‘+’ means an OR operation. For instance, A + B in ordinary
 A • A′ = 0, since 0 • 0’ = 0 and 1 • 1’ = 0. algebra is read as A plus B, while the same in Boolean algebra is read as
These confirms postulate 5. A OR B. Basic logic operations such as AND, OR and NOT have already
Postulate 6 also satisfies two-valued Boolean algebra that has two been discussed in previous section .
distinct elements 0 and 1 where 0 is not equal to 1. More specifically, Boolean algebra captures the essential properties
3.5 BASIC PROPERTIES AND THEOREMS OF BOOLEAN of both logic operations such as AND, OR and NOT and set operations
ALGEBRA such as intersection, union and complement. As an illustration, the
Boolean algebra is mathematics of logic. It is one of the most basic logical assertion that both a statement and its negation cannot be true
tools available to the logic designer and thus can be effectively used has a counterpart in set theory, which says that the intersection of a
for simplification of complex logic expressions. Other useful and widely subset and its complement is a null (or empty) set.
used techniques based on Boolean theorems include the use of Boolean algebra may also be defined to be a set A supplied with two
Karnaugh maps in what is known as the mapping method of logic binary operations of logical AND, logical OR (V), a unary operation of
simplification and the tabular method given by Quine–McCluskey. In logical NOT and two elements, namely logical FALSE (0) and logical
this chapter, we will have a closer look at the different postulates and TRUE (1).
theorems of Boolean algebra and their applications in minimizing This set is such that, for all elements of this set, the postulates or
Boolean expressions. We will also discuss at length the mapping and axioms relating to the associative, commutative, distributive,
tabular methods of minimizing fairly complex and large logic absorption and complementation properties of these elements hold
expressions. good. These postulates are described in the following pages.
Boolean algebra, quite interestingly, is simpler than ordinary algebra. Variables, Literals and Terms in Boolean Expressions
It is also composed of a set of symbols and a set of rules to manipulate Variables are the different symbols in a Boolean expression. They may
these symbols. However, this is the only similarity between the two. take on the value ‘0’ or ‘1’. For instance, in the first expression shown
The differences are many. These include the following: below, A, B and C are the three variables. In second expression shown

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 Chapter 3: Logic Gates and Boolean algebra

below P, Q, R and S are the four variables: The complement of a

variable is not considered as a separate variable.

Each occurrence of a variable or its complement is called a literal. In In Boolean algebra, a product term is the product of literals.
the first and second expressions shown above there are eight and A product term is equal to 1 only if each of the literals in the term is 1.
seven literals respectively. A term is the expression formed by literals A product term is equal to 0 when one or more of the literals are 0.
and operations at one level. The above Expression has five terms Some examples of product terms are
including four AND terms and the OR term that combines the first- Example;
level AND terms.
► Boolean Addition Boolean addition is equivalent to the OR
operation and the basic rules are illustrated with their relation to
3.5.1 Principle of Duality
the OR gate as follows:
From Huntington postulates, it is evident that they are grouped in pairs
as (a) and (b) and every algebraic expression deductible from the
postulates of Boolean algebra remains valid if the operators and
In Boolean algebra, a sum term is a sum of literals. Some examples of identity elements are interchanged. The dual of a Boolean expression is
sum terms are: obtained by replacing all ‘.’ operations with ‘+’ operations, all ‘+’
operations with ‘.’ operations, all 0s with 1s and all 1s with 0s and leaving
A sum term is equal to 1 all literals unchanged. The examples below give some Boolean
when one or more of the literals in the term are1. A sum term is equal expressions and the corresponding dual expressions: Given Boolean
to 0 only if each of the literals is 0. expression This important property of Boolean algebra is called
Example; principle of duality.

Solution:
Boolean Multiplication is the equivalent to the AND operation and 3.5.2 DeMorgan’s Theorem
the basic rules are illustrated with their relation to the AND gate as
Two theorems that were proposed by DeMorgan play important
follows: parts in Boolean algebra. The first theorem states that the
complement of a product is equal to the sum of the complements.
That is, if the variables are A and B, then (A•.B)′ = A′ + B′
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 Chapter 3: Logic Gates and Boolean algebra

The second theorem states that the complement of a sum is Absorption A + A.B = A A.(A + B) = A
equal to the product of the complements. In equation form, this can Theorem
be expressed as A+A’B=A+B A.(A’+B)=A.B
(A+ B) ′ = A′ •B′ Theorem Figure 3.6
The complements of Boolean logic function or a logic expression Theorem 1(a): A + A = A
may be simplified or expanded by the following steps of A + A = (A + A).1 by postulate 2
DeMorgan’s theorem. = (A + A). (A + A′) by postulate 5
Replace the operator (+) with (.) And (.) With (+) given in the = A + A.A′
expression. =A+0 by postulate 4
Complement each of the terms or variables in the expression. = A postulate 2
DeMorgan’s theorems are applicable to any number of variables. For (a) Theorem 1(b): A . A = A
three variables A, B, and C, the equations are A. A = (A . A) + 0 by postulate 2(a)
(A.B.C)′ = A′ + B′ + C′ and (A + B + C)′ = A′.B′.C′ = (A . A) + ( A . A′) by postulate 5
3.5.3 Other Important Theorems = A (A + A′) = A . 1 by postulate 4
The following is the complete list of postulates and theorems = A postulate 2(b)
useful for two-valued Boolean algebra. Theorem 2(a): A + 1 = 1 Theorem 2(b): A . 0 = 0
Postulate 2 A+0=A A.1 = A Theorem 3(a): A + A.B = A
Postulate A+1=1 A.0 = 0 A + A.B = A. 1 + A.B by postulate 2(b)
Postulate A + A′ = 1 A.A′ = 0 = A (1 + B) by postulate 4(a)
Postulate A +A =A A.A = A = A. 1 by postulate 2(a)
Theorem 3, (A′)′ = A =Theorem 3(b): A (A + B) = A by duality
Involution Exercise
Theorem A+B=B+A A.B = B.A Write the output expression for each circuit as it appears in Fig.(3- 11)
Commutative and then change each circuit to an equivalent AND-OR configuration.
Associativity A+(B+C)=(A+B)+C A.(B.C) = (A.B).C Develop the truth table for circuit in Fig.(3-11)(a-b).
Theorem
Distributive A(B + C) = A.B + A.C A+B.C= (A+B).(A + C)
Theorem
DeMorgan’s (A + B)′ = A′.B′ (A.B)′ = A′ + B′
Theorem

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 Chapter 3: Logic Gates and Boolean algebra

Show that an exclusive-NOR circuit produces a POS output. AB+A’B’ variables present in the Boolean function or expression. For example, if
a Boolean function is expressed algebraically as F =AB’C then
the value of F will be 1, when A = 1, B = 0, and C = 1.
For other values of A, B, C the value of F is 0.
Boolean functions can also be represented by truth tables. A truth
table is the tabular form of the values of a Boolean function according
to the all possible values of its variables. For an n number of variables,
2n combinations of 1’s and 0’s are listed and one column represents
function values according to the different combinations. For example,
3.6 Boolean functions and simplification methods for three variables the Boolean function F = AB + C truth table
We have studied so far logic gates and Boolean can be written as below in Figure 4.1.
algebra. Boolean algebra and theorems are used for the
manipulations of logical expressions. It has also been seen that a
logical expression can be realized by using the logic gates.
The number of gates required and the number of input terminals
for the implementation of a logical expression, in general, get reduced
considerably if the expression can be simplified. Therefore, the
simplification of logical expression is very important as it saves the

A Boolean function from an algebraic expression can be realized

to a logic diagram composed of logic gates. Figure 4.2 is an example
of a logic diagram realized by the basic gates like AND, OR, and NOT
gates.
hardware required to design a specific system we know that logical In subsequent chapters, more logic diagrams with various gates
expressions are implemented by connecting specific logic gates. will be shown.
3.6.1 BOOLEAN FUNCTIONS
Binary variables have two values, either 0 or 1. A Boolean function is an
expression formed with binary variables, the two binary operators
AND and OR, one unary operator NOT, parentheses and equal sign.
The value of a function may be 0 or 1, depending on the values of

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 Chapter 3: Logic Gates and Boolean algebra

3.6.2 Simplification of Boolean Expressions X+X′Y+Y′+XX′Y+Y′X′Y

When a Boolean expression is implemented with logic gates, =X+X′Y+Y′ as XX′=0, and YY′=0
each literal in the function is designated as input to the gate.
=X+Y+Y′ as X+X′Y=X+Y
The literal may be a primed or unprimed variable. Minimization of the
number of literals and the number of terms leads to less =X+1 as Y+Y′=1
complex circuits as well as less number of gates, which should be a =1 as X + 1=1
designer’s aim. Simplification of Boolean functions is mainly used to iii. Simplify the Boolean expression F=Z(Y+Z) (X+Y+Z)
reduce the gate count of a design. Less number of gates means less
The above expression can be written as
power consumption, sometimes the circuit works faster and also when
number of gates is reduced, cost also comes down. There are many (ZY+ZZ)(X+Y+Z)
ways to simplify a logic design; some of them are given below. We will = (ZY+Z) (X+Y+Z) as ZZ=Z
be looking at each of these in detail in the next few pages. =Z(X+Y+Z) as Z+ZY=Z
➢ Algebraic Simplification method.
=ZX+ZY+ZZ
✓ Simplify symbolically using theorems/postulates.
✓ Requires good skills Boolean algebra including important theorems and =ZX+ZY+Z as ZZ=Z,
postulates. =ZX+Z as Z+ZY=Z
➢ Karnaugh Maps (K-map) method. =Z as Z+ZX=Z
✓ Diagrammatic technique using 'Venn - diagram'.
✓ Limited to not more than 6 variables iv. Simplify the Boolean expression F= (X+Y)(X′+Z)(Y+Z)

a. Simplification of Boolean expressions using Algebraic method The above expression can be written as
Some of the examples are given here: (XX′+XZ+YX′+YZ)(Y+Z)
i. Simplify the Boolean expression F=XY′Z′+XY′Z′W+XZ′ = (XZ+YX′+YZ) (Y+Z) as XX′=0
The above expression can be written as =XZY+YYX′+YYZ+XZZ+YX′Z+YZZ
XY′Z′ (1+W) +XZ′ =XZY+YX′+YZ+XZ+YX′Z+YZ as YY=Y, ZZ=Z
=XY′Z′+XZ′ as 1+W=1 Rearranging the terms we get
=XZ′ (Y′+1) XZY+XZ+YX′+YX′Z+YZ as YZ+YZ=YZ
=XZ′ as Y′+1=1 =XZ(Y+1) +YX′+YZ (X′+1) as Y+1=1, X′+1=1
ii. Simplify the Boolean expression F=X+X′Y+Y′+(X+Y′) X′Y =XZ+YX′+YZ
The above expression can be written as Now it seems that it cannot be reduced further.
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 Chapter 3: Logic Gates and Boolean algebra

But apply the following trick: Solution F = A′B′C + A′BC + AB′

The above expression can be written as =A’C (B’+B) +AB’
XZ+YX′+YZ(X+X′) as X+X′=1
= A′C + AB′
=XZ+YX′+YZX+YZX′ Rearranging the terms we get
viii. Simplify the Boolean function
XZ+YXZ+YX′+YX′Z
F = ((XY′+XYZ) ′ + X(Y + XY′)) ′.
=XZ (1+Y) +YX′ (1+Z)
Solution. F = ((XY′ + XYZ)′ + X(Y + XY′))′
=XZ+YX′ as 1+Y=1, 1+Z=1
= ((X (Y′ + YZ)) ′ + XY + XY′) ′
v. Simplify the Boolean function F=AB+ BC + B′C.
= ((X(Y′Z + Y′ + YZ))′ + X(Y + Y′))′ as (Y′ = Y′(Z+1)=Y′Z+Y′)
Solution.
= ((X (Y′ + Z)) ′ + X) ′
F = AB + BC + B′C
=(X (Y’+Z)).X’
= AB + C (B + B′)
=0
= AB + C
ix. Simplify the Boolean function
vi. Simplify the Boolean function F= A + A′B.
F = XYZ + XY′Z + XYZ′.
Solution. F = A+ A′B
Solution. F = XYZ + XY′Z + XYZ′
= (A+ A′) (A + B)
=A+B = XZ (Y + Y′) + XY (Z + Z′)

vii.Simplify the Boolean function = XZ + XY = X (Y +Z)

F= A′B′C + A′BC + AB′.

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 Chapter 3: Logic Gates and Boolean algebra

3.6.3 Standard and Canonical Forms (a). using AND-OR network (b). NAND-NAND network:
(i). AB + B (CD + EF)
3.6.3.1 STANDARD FORMS OF BOOLEAN EXPRESSIONS (ii). (A + B) (B + C + D)
(iii). [(A + B)’ + C]’
All Boolean expressions, regardless of their form, can be
Solution: (i). AB + B (CD + EF) ←this expression is not in standard form.
converted into either of two standard forms: the sum-of-products
(Why?)
form or the product-of- sums form. Standardization makes the
 In order to write the expression in standard form; remember
evaluation, simplification, and implementation of Boolean expressions
Boolean theorems and postulates we discussed earlier.
much more systematic and easier. A given Boolean function is said to be
Thus it can be rewritten as:
in standard form, if it is expressed in sum of the products or product
AB + B (CD + EF) = AB + BCD + BEF… (Using distributive property)
of the sums fashion.
Now the expression is in standard SOP forms. AB, BCD, & BEF are
For examples expressions, like
Y = AB + BC + AC (SUM-OF-PRODUCT=> SOP Expression)
product terms that can be realized using AND gates. The product terms
are logically summed together using OR logic gate.
Y = (A + B +C) (A+B′ + C) (A + B + C′) (PRODUCT-Of-SUM => POS Expression)
are the standard forms. Then Implementation of the SOP expression; AB + BCD + BEF
However, Boolean functions are also sometimes expressed in
nonstandard forms like F = (AB + CD)(A′B′ + C′D′), which is neither a
sum of products form nor a product of sums form. However, the same
expression can be converted to a standard form with help of
various Boolean properties, as
F = (AB + CD) (A′B′ + C′D′) = A′B′CD + ABC′D′
i. Sum of product (SOP) Expressions. Fig. (3.6) AND-OR logic network Fig. (3.7) NAND-NAND logic network
A sum of products (SOP) expression consists of several product
This NAND-NAND implementation shown above in fig.3.7 is equivalent
terms logically added. A product term is a logical product of several
to the AND-OR in figure 3.6 given above.
variables. The variables may or may not be complemented. The following
are the examples of sum of products expressions.
I will leave it for you the remaining two questions (ii) & (iii) as an
exercise
1. XY+X'Y+XY' 2. AB+ABC+BC'
ii. Product of Sum (POS) Expressions.
3. A+AB'+B'C 4. ABC+A'B+AB'C+A'BC' A product of sums (POS) expression consists of several sum terms
Sometimes a product term may consist of a single variable. logically multiplied. A sum term is the logical addition of several
Example: Convert each of the following Boolean expressions to SOP variables. The variables may or may not be complemented. The following
form and realize its logic circuit are examples of product of sums expressions:

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 Chapter 3: Logic Gates and Boolean algebra

(i). (A+B) (A'+B')

(ii). A (B'+C') (B+C) Similarly, we can write F (A, B) = A + B as follows;
(iii). (X+Y') (X+Y+Z) (Y+Z) A + B =A + B+CC’
Sometimes a sum term may consist of a single variable. Implementation
= (A + B +C) • (A + B + C′)
of a POS Expression simply requires AND_ing the outputs of two or
= AA + AB + AC′ + AB + BB + BC′ + AC + BC + CC′
more OR gates. A sum term is produced by an OR operation and the Rearranging the terms we get
product of two or more sum terms is produced by an AND operation. AA + BB + AC′ + BC′ + AC + BC + AB + AB, as CC′ = 0
= (A + B) + C′ (A + B) + C (A + B) + AB + AB [AA = A; BB = B]
= (A + B) + (A + B) (C + C′) + AB + AB
= (A + B) + (A + B) + AB + AB as C + C′ = 1
= A + B + AB + AB as (A + B) + (A + B) = (A + B)
= A + AB + B + AB= A (1 + B) + B (1 + A)
= A + B as 1 + B = 1, 1 + A =1
Fig. (3.8) This technique can be extended to any number of variables such as
The above logic circuit shows OR-AND logic network (POS) (A + B′ + C) = (A + B′ + C + D) (A + B′ + C + D′)
implementation for the expression (A + B)(B + C + D)(A + C). Recall: X+Z•Z’=(X+Z )•(X+Z’) as well as dual expression
The output X of the AND gate equals the POS expression. 
As you can notice from above examples a given standard Boolean X• (Z+Z’) = (X•Z) + (X•Z’)
expression some of a product term or sum term do not include all
variables in the domain (either in its true form or complemented form). 3.6.3.2 Canonical SOP and POS Forms:
Thus we can include those missing literals so that each sum or product When each term of a logic expression contains all variables, it’s
term is composed of all n-input variables in the domain. said to be in the canonical form. When a sum of products form of logic
This conversion mechanisms converts the expression in to canonical expression is in canonical form, each product term is called minterm.
form. Before we proceed with such a conversion a few identities should Each minterm contains all variables. The canonical form of a sum
be examined.
of products expression is also called minterm canonical form or standard
We can expand F(A,B)=A as (A + B) (A + B′) both expressions are
equivalent. This fact can be proved as follows: sum of products.
A = A +A + 0 Similarly, when a product of sums form of logic expression
= A.A + A (B + B′ ) + B.B′, as AA=A B + B′ =1, , BB′=0 is in canonical form, each sum term is called a maxterm. Each maxterm
= AA +AB + AB′ + BB′ contains all variables. The canonical form of a product of sums
= A (A +B) + B′ (A + B) expression is also called maxterm canonical form or standard product of
= (A + B) (A + B′) sums.
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 Chapter 3: Logic Gates and Boolean algebra

When a logic expression is not in the canonical form, it can be As shown in the above table each minterm is represented by mi
converted into canonical form by using unifying theorem. In the and each maxterm is represented by Mi where ‘i’ is the decimal
canonical form there is uniformity in the expression, which number equivalent of the natural binary number. With these
facilitates minimization procedure. shorthand notations logical functions can be represented as follows:
The following are examples of the canonical form of sum of products a. Y = A’ B' C’ + A’ B’ C + A’ B C + A B C’
expressions (or minterm canonical form):
= 0 0 0 + 0 0 1 + 0 1 1 + 1 1 0 respectively
(i). Z = XY + XY′
(ii). F = XYZ′ + X′YZ + X′YZ′ + XY′Z + XYZ = m0 + m 1 + m 3 + m 6
In case of 2 variables, the maximum possible product terms are 4, for = ∑m (0, 1, 3, 6)
3 variables, the possible product terms are 8, for 4 variables 16, and for n
b. Y = (A+B+C’) ( A+B’+C’) ( A’ + B’ + C)
variables, 2ⁿ. In the above examples the expression (ii) contains 5 out of 8
= (0 01 ) (011) (110) respectively
possible product terms. When the expression is in the canonical form all
terms are mutually exclusive. It means that for a given set of values of the = M1.M3. M6
variables, when one of the terms is equal to 1, all others must be 0. Of course, = π M (1, 3, 6)
it is possible that all terms may be 0.The following are examples of Where ∑ denotes sum of product while π denotes product of sum
canonical form of product of sums expressions (or maxterm canonical
form).
Note that: A=> 1, A’=>0 in SOP But , A=> 0, A’=>1 in POS
(i). Z = (X + Y) (X + Y′)
(ii). F = (X′ + Y + Z′) (X′ + Y + Z) (X′ + Y′ + Z′) i. Canonical Sum of Product Expression.
The following figure gives the minterms and maxterms for a three A product term containing all n variables of the function in
variable logical function where the number of minterms as well as either true or complemented form is called the minterm. Each minterm
maxterms is 2³ = 8. In general, for an n-variable logical function there is obtained by an AND operation of the variables in their true form or
are 2ⁿ minterms and an equal number of maxterms. complemented form. For a two-variable function, four different
combinations are possible, such as, A′B′, A′B, AB′, and AB. These product
terms are called the fundamental products or standard products or
minterms. In the minterm, a variable will possess the value 1 if
it is in true or un complemented form, whereas, it contains the
value 0 if it is in complemented form. For three variables
function, eight minterms are possible as listed in the following
table in Figure 3.9.

Figure 3.8 Minterms and Maxterms for Three variables

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 Chapter 3: Logic Gates and Boolean algebra

In the product terms the input variables appear either in true

(un-complemented) form if it contains the value 1, or in complemented
form if it possesses the value 0.
The canonical sum of products form of a logic function can be
obtained by using the following procedure.
➢ Check each term in the given logic function. Retain if it is a
minterm, continue to examine the next term in the same manner.
➢ Examine for the variables that are missing in each product which
is not a minterm.
Table 3.9 minterm of three variables function ➢ If the missing variable in the minterm is X, multiply that
So, if the number of variables is n, then the possible number of minterm with (X+X′).
minterms is 2n. The main property of one minterm is that it possesses ➢ Multiply all the products and discard the redundant terms.
the value of 1 for only one combination of n input variables and The following examples will illustrate how logic expressions
the rest of the 2n – 1 combinations have the logic value of 0. can be converted into canonical form. Here are some examples to
This means, for the above three variables example, if A = 0, B = explain the above procedure.
1, C = 1 i.e., for input combination of 011, there is only one Example 1: Convert the expression X + XY’ into canonical form.
combination A′BC that has the value 1, the rest of the seven The expression has two variables. The first term has only one variable.
So to make it of two variables it can be multiplied by (Y + Y’), as Y + Y’ =
combinations have the value 0 for input combination of 011 .
1. After multiplication the given logic expression can be written as
For example, if the canonical sum of product form of a three-
X(Y + Y′) + XY′, as Y + Y′ = 1
variable logic function F has the minterms A′BC, AB′C, and ABC′, this
= XY + XY′ + XY′
can be expressed as the sum of the decimal codes corresponding
to these minterms as below. = XY + XY′, as XY′ + XY′= XY′
F (A,B,C) = (3,5,6) =m3 + m5 + m6 =A’BC + AB′C + ABC′ Example 2. Obtain the canonical sum of product form of the following
where Σ (3,5,6) represents the summation of minterms function. F (A, B) = A + B
corresponding to decimal codes 3, 5, and 6. Solution. The given function contains two variables A and B. The
The sum of products (SOP) expression of a Boolean function can variable B is missing from the first term of the expression and the
be obtained from its truth table summing or performing OR variable A is missing from the second term of the expression.
operation of the product terms corresponding to the combinations Therefore, the first term is to be multiplied by (B + B′) and the
input variables containing a function value of 1. second term is to be multiplied by (A + A′) as demonstrated
below.
F (A, B) = A + B = A.1 + B.1

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 Chapter 3: Logic Gates and Boolean algebra

= A (B + B′) + B (A + A′) =AB+ AB′ + AB + A′B + AB′ + A′B (as AB + AB

= AB, Discard redundant term) Hence the canonical sum of the
product expression of the given function is
F (A, B) = AB + AB′ + A′B.
Example 3. Obtain the canonical sum of product form of the
following function. F (A, B, C) = A + BC
Solution. Here neither the first term nor the second term is
minterm. The given function contains three variables A, B, and C. The
variables B and C are missing from the first term nor the second
term is minterm. The given function contains three variables A, B, and Figure 3.10 deriving a Boolean function as Sum-of-Products form from a truth table
Here the output Y value is 1 for the input conditions of
C. The variables B and C are missing from the first expression.
010, 100, 101, and 110, and their corresponding product terms are
Therefore, the first term of the expression has to be multiplied by (B +
A′BC′, AB′C′, AB′C, and ABC′ respectively.
B′) and (C + C′). The second and the variable A is missing from the
The final sum of products expression (SOP) for the output Y is
second term of the term is to be multiplied by (A + A′).
This is demonstrated below. derived by summing or performing an OR operation of the four
F (A, B, C) = A + BC = A (B + B′) (C + C′) + BC (A + A′) product terms as shown below.
= (AB+AB’) (C + C′) + (ABC + A′BC) Y=A′BC′ + AB′C′ + AB′C + ABC′
=ABC + AB′C + ABC′ + AB′C′ + A′BC (as ABC + ABC = ABC)
In general, the procedure of deriving the output expression in
Hence the canonical sum of the product expression of the given
SOP form from a truth table can be summarized as below.
function is F (A, B) = ABC + AB′C + ABC′ + AB′C′ + A′BC.
1. Form a product term for each input combination in the table,
Example 4. Obtain the canonical sum of product form of the
containing an output value of 1.
following function. F (A, B, C, D) = AB + ACD
2. Each product term consists of its input variables in either true form
Solution. F (A, B, C, D) = AB +ACD
or complemented form. If the input variable is 0, it appears in
= AB (C + C′) (D + D′) + ACD (B + B′) complemented form and if the input variable is 1, it appears in
= (ABC+ ABC′) (D + D′) + ABCD + AB′CD true form.
=ABCD+ ABCD′ + ABC′D + ABC′D′ + ABCD + AB′CD 3. To obtain the final SOP expression of the output, all the product
terms are OR operated.
=ABCD+ ABCD′ + ABC′D + ABC′D′ + AB′CD
Hence above is the canonical sum of the product expression of ii. Canonical Product of Sum Expression.
the given function. A sum term containing all n variables of the function in either true or
Now, consider the following truth table in Figure 3.10, for complemented form is called the maxterm. Each maxterm is obtained
a three-input function Y. by an OR operation of the variables in their true form or complemented
form. Four different combinations are possible for a two-variable

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 Chapter 3: Logic Gates and Boolean algebra

function, such as, A′ + B′, A′ + B, A + B′, and A + B. These sum

terms are called the standard sums or maxterms. Note that, in the where Π (0,2,5) represents the product of maxterms
maxterm, a variable will possess the value 0, if it is in true or corresponding to decimal codes 0, 2,AND 5
uncomplemented form, whereas, it contains the value 1, if it is in The canonical product of sums form of a logic function can
complemented form. Like minterms, for a three-variable function, eight be obtained by using the following procedure.
maxterms are also possible as listed in the following table in ➢ Check each term in the given logic function. Retain it if it is a
Figure 3.11. maxterm, continue to examine the next term in the same manner.
➢ Examine for the variables that are missing in each sum term that is
not a maxterm.
➢ If the missing variable in the maxterm is X, multiply that
maxterm with (X.X′).
➢ Expand the expression using the properties and postulates as
described earlier and discard the redundant terms.
Some examples are given here to explain the above procedure.
Example 3.5. Obtain the canonical product of the sum form of the
following function. F (A, B, C) = (A + B′) (B + C) (A + C′)
Table 3.11 minterm of three variables function Solution. In the above three-variable expression, C is missing
So, if the number of variables is n, then the possible number of from the first term, A is missing from the second term, and B is
maxterms is 2n. The main property of a maxterm is that it possesses missing from the third term. Therefore, CC′ is to be added with
the value of 0 for only one combination of n input variables and the rest first term, AA′ is to be added with the second, and BB′ is to be
of the 2n –1 combinations have the logic value of 1. This means, for the
added with the third term. This is shown below.
above three variables example, if A = 1, B = 1, C = 0 i.e., for input
F (A, B, C) = (A + B′) (B + C) (A + C′)
combination of 110, there is only one combination A′ + B′ + C that has
the value 0, for input combination of 110,the rest of the seven = (A + B′ + 0) (B + C + 0) (A + C′ + 0)
combinations have the value 1. = (A + B′ + CC′) (B + C + AA′) (A + C′ + BB′)
For example, if the canonical product of sums form of a three- = (A + B′ +C) (A + B′+ C′) (A + B + C) (A′ + B + C) (A + B + C′) (A + B′ + C′)
variable logic function F has the maxterms A + B + C, A + B′ + [Using the distributive property, as X + YZ = (X + Y) (X + Z)]
C, and A′ + B + C′, this can be expressed as the product of the = (A + B′ + C) (A + B′ + C′) (A + B + C) (A′ + B + C) (A + B + C′)
decimal codes corresponding to these maxterms as below, [as (A + B′ + C′) (A + B′ + C′) = A + B′ + C′]Hence the canonical
F (A, B, C) = (A + B + C) (A + B′ + C) (A′ + B + C′) product of the sum expression for the given function is
= Π (M0 •M2•M5)=Π (0, 2, 5) F(A, B, C) = (A + B′ +C) (A + B′ + C′) (A + B +C) (A′ + B + C) (A + B + C′)

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 Chapter 3: Logic Gates and Boolean algebra

Example 3.6. Obtain the canonical product of the sum form of the As explained above, the product of sums (POS) expression
following function. of a Boolean function can also be obtained from its truth table
F (A, B, C) = A + B′C by a similar procedure. Here, an AND operation is performed on the
Solution. In the above three-variable expression, the function is sum terms corresponding to the combinations containing a function
given at sum of the product form. First, the function needs to be value of 0.
changed to product of the sum form by applying the distributive law as In the sum terms the input variables appear either in true (un
shown below. F (A, B, C) = A + B′C = (A + B′) (A + C) Now, in complemented) form if it contains the value 0, or in complemented
the above expression, C is missing from the first term and B is missing form if it possesses the value 1.
from the second term. Hence CC′ is to be added with the first term and Now, consider the same truth table as shown in Figure 3.12, for a
BB′ is to be added with the second term as shown below. three-input function Y.
F (A, B, C) = (A + B′) (A + C) = (A + B′ + CC′) (A + C + BB′)
= (A + B′ + C) (A + B′ + C′) (A + B + C) (A + B′ + C) [using
the distributive property, as X + YZ = (X + Y) (X + Z)]
= (A + B′ + C) (A + B′ + C′) (A + B + C) [as (A + B′ + C) (A + B′ +C)
= A + B′ + C]
Hence the canonical product of the sum expression for the given
function is F (A, B, C) = (A + B′ + C) (A + B′ + C′) (A + B + C).
Example 7:
Convert the following expression into canonical form :(A +B) (B + C) Figure 3.12 deriving a Boolean function as Products -of- Sum form from a truth table
To convert the above expression into canonical form the following Here the output Y value is 0 for the input conditions of 000,
identity can be used: 001, 011, and 111, and their corresponding product terms are A + B +
X + Y = (X + Y + Z) (X + Y + Z′) C, A + B + C′, A + B′ + C′, and A′ + B′ + C′ respectively. So now the final
Applying the above identity, the given logic expression can be written product of sums expression (POS) for the output Y is derived
as by performing an AND operation of the four sum terms as shown
(A + B + C) (A + B + C′) (A + B + C) (A′ + B + C) below.
= (A + B + C) (A + B + C′) (A′ + B + C) Y = (A + B + C) (A + B + C′) (A + B′ + C′) (A′ + B′ + C′)
When a Boolean function is expressed as the logical In general, the procedure of deriving the output expression in POS
product of all the maxterms from the rows of a truth table, for form from a truth table can be summarized as below.
which the value of the function is 0, it is referred to as the 1. Form a sum term for each input combination in the table, containing an output value of 0.
canonical product of sum expression. The same can be expressed 2. Each product term consists of its input variables in either true form or complemented form. If the
in a compact form by listing the corresponding decimal equivalent input variable is 1, it appears in complemented form and if the input variable is 0, it appears
codes of the maxterms containing a function value of 0 in true form.
3. To obtain the final POS expression of the output, all the sum terms are AND operated.
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 Chapter 3: Logic Gates and Boolean algebra

Conversion between Canonical Forms F=(X+Y+Z) (X+Y’+Z) (X+Y’+Z’) (X’+Y+Z’) (X’+Y’+Z)

From the above discussion, it may be noted that the complement of a The last conversion follows from the definition of minterms and maxterms as
function expressed as the sum of products (SOP) equals to the sum of shown in the tables in Figures 3.9 and 3. 11. It can be clearly noted that the
products or sum of the minterms which are missing from the original function. following relation holds true m′i = Mi. That is, the maxterms with subscript i
This is because the original function is expressed by those minterms is a complement of the minterm with the same subscript i, and vice versa.
that make the function equal to 1, while its complement is 1 for those This example demonstrates the conversion between a function expressed
minterms whose values are 0. in sum of products (SOP) and its equivalent in product of maxterms. A similar
example can show the conversion between the product of sums (POS) and its
equivalent sum of minterms. In general, to convert from one canonical form to
other canonical form, it is required to interchange the symbols Σ and π, and
list the numbers which are missing from the original form. Note that, to
find the missing terms, the total 2 n number of minterms or maxterms
must be realized, where n is the number of variables in the function.
Example: write the function F(X, Y)=X+Y’ in terms of sop expression.
Solution this is 2-variable function. Three out of 4 possible combinations are
missing. Notice that x+y’ is a maxterm that corresponds to combinations (01).
Figure 3.13
Hence the remaining namely 00, 10 and 11 are the minterms of the function.
According to the truth table given in Figure 3.13:
Therefore F’(X, Y) =(X+Y) (X’+Y) (X’+Y’)
F (A, B, C) = ∑ (2, 4, 5, 6) =m2+m4+m5+m6
=∏M (0, 2, 3)
= A′BC′ + AB′C′ + AB′C + ABC′. This has the complement that can be
(F’)’=F=∑m (0, 2, 3)= X’Y’+XY’+XY
expressed as F′ (A,B,C) = (0,1,3,7)
= m0 + m1 + m3 + m7
Now, if we take complement of F′ by DeMorgan’s theorem,
we obtain F as F (A,B,C) = (m0 + m1 + m3 + m7)′
= m0′m1′m3′m′7 = M0M1M3M7
∏(0,1,3,7) = (A + B + C)(A + B + C′) (A + B′ + C′) (A′ + B′ + C′).
Example 2: Express the function F = x’ y’ z + x y’ z’ + x y z as Sum of its
maxterms (SOP).
SOLUTION
F = x’ y’ z + x y’ z’ + x y z
=∑m (1, 4, 7) = m1 + m4 + m7
The 5 missing minterms out of 8 possible are complements of the function F.
Thus F’==∑m (0, 2, 3, 5, 6) = m0+ m2+m3+m5+m6
(F’)’=F=m0’m2’m3’m5’m6’ =M0•M2•M3•M5•M6
F= [x’ y’ z’ + x’ y z’ + x’ y z + x y’ z + x y z’]’ -------Using DeMorgan’s Law
F=[x’ y’ z’]’ • [x’ y z’]’ • [x’ y z]’ • [x y’ z ]’ • [x y z’]’
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 Chapter 3: Logic Gates and Boolean algebra

3.7 Simplification of Boolean Expressions using Karnaugh Maps Once all possible groups have been formed, the corresponding terms are
Karnaugh maps provide a systematic method to obtain identified.
simplified sum-of-products (SOPs) Boolean expressions. This is a compact ->A group of two 1's eliminates one variable from the original minterm.
way of representing a truth table and is a technique that is used to simplify ->A group of eight 1's eliminates three variables from the original minterm,
logic expressions. It is ideally suited for four or less variables, becoming and so on.
cumbersome for five or more variables. Each square represents either a ->A group of four 1's eliminates two variables from the original minterm.
minterm or maxterm. ->A group of eight 1's eliminates three variables from the original minterm,
A K-map consists of a grid of squares, each square representing one canonical and so on.
minterm combination of the variables or their inverse. A K-map of ->The variables eliminated are those which are different in the original
n variables will have 2n squares. For a Boolean expression, product minterms of the group.
terms are denoted by 1's, while sum terms are denoted by 0's. The map is In any K-Map, each square represents a minterm. Adjacent squares always
arranged so that squares representing minterms which differ by only one differ by just one literal (So that the unifying theorem may apply: X + X' = 1).
variable are adjacent both vertically and horizontally. Therefore XY'Z' would For the 2-variable case (e.g.: variables X, Y), the map can be drawn as in Figure
be adjacent to X'Y'Z' and would also adjacent to XY'Z and XYZ'. 3.14 (a). Two variable map is the one which has got only two variables as input.
Minimization Technique
• Based on the Unifying Theorem: X + X' = 1
• The expression to be minimized should generally be in sum-of-products form
(If necessary, the conversion process is applied to create the sum-of-products
form).
• The function is mapped onto the K-map by marking a 1 in
those squares corresponding to the terms in the expression to be simplified
(The other squares may be filled with 0's).
• Pairs of 1's on the map which are adjacent are combined using
the theorem Y(X+X') = Y where Y is any Boolean expression (If two pairs are
also adjacent, then these can also be combined using the same theorem).
The minimization procedure consists of recognizing those pairs and multiple Equivalent Labeling
pairs K-map need not follow the ordering as shown in the Figure 3.14 (a). What this
->These are circled indicating reduced terms. means is that we can change the positions of m0, m1, m2, m3 of the above
o Groups which can be circled are those which have two (21) 1's, four (22) 1's, figure as shown in the Figure 3.14 (b) and Figure 3.14 (c).Position assignment is
and eight (23) 1's. the same as the default k-map positions. This is the one which we will be using
->Note that because squares on one edge of the map are considered adjacent throughout this unit.
to those on the opposite edge, group can be formed with these squares. The K-map for a function is specified by putting a '1' in the square
->Groups are allowed to overlap. corresponding to a minterm, a '0' otherwise.
The objective is to cover all the 1's on the map in the fewest number of groups Grouping/Circling K-maps
and to create the largest groups to do this.

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 Chapter 3: Logic Gates and Boolean algebra

The power of K-maps is in minimizing the terms, K-maps can be minimized with Example - X'Y+XY+XY'
the help of grouping the terms to form single terms as shown in Figure 3.15 In this example we have the equation as input, and we have one output
(d). When forming groups of squares, observe/consider the following: function. Draw the k-map for function F with marking 1 for X'Y, XY and XY
• Every square containing 1 must be considered at least once. positions. Now combine two 1's as shown in Figure 2.2.4(g) to form two single
• A square containing 1 can be included in as many groups as desired terms.
A group must be as large as possible. F=X+Y

Figure 2.2.4(g)

There are 8 minterms for 3 variables (X, Y, Z). Therefore, there are 8 cells in
a 3-variable K-map. One important thing to note is that K-maps follow the gray
Figure 3.15 code sequence, not the binary one. Using gray code arrangement ensures that
• If a square that is containing 1 which cannot be placed in a group, then leave minterms of adjacent cells differ by only one literal. Each cell in a 3-variable
it out to include in final expression. K-map has 3 adjacent neighbours. In general, each cell in an n- variable K-map
• The number of squares in a group must be equal to 2(pair), 4(quad), 8(octet). has n adjacent neighbours as shown in Figure 2.2.4(h)
The map is considered to be folded or spherical; therefore squares at the end
of a row or column are treated as adjacent squares.
The simplified logic expression obtained from a K-map is not always
unique. Groupings can be made in different ways as shown in Figure 3.15 (e).
Before drawing a K-map the logic expression must be in canonical form.
In the next few pages we will see some examples of grouping. Figure 2.2.4 (h) (i)
There is wrap-around in the K-map
• X'Y'Z' (m0) is adjacent to X'YZ' (m2) XY'Z' (m4) is adjacent to XYZ' (m6)
Example - F= X'Y+XY
as shown in Figure 2.2.4(i)
In this example we have the equation as input, and we have one output
Example draw a k-map for the Boolean function given as ;
function. Draw the k-map for function F with marking 1 for X'Y and XY
F = XYZ'+XYZ+X'YZ
positions. Now combine two 1's as shown in Figure 2.2.4 (f) to form the single
term. As you can see X and X' get canceled and only Y remains F = Y

Figure 2.2.4 (f)

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 Chapter 3: Logic Gates and Boolean algebra

A s it can be viewed from the k-map group one is formed by X’YZ (m3) and Example F (W, X, Y, Z) = ∑ (4, 5, 10, 11, 14, 15)
XYZ (m7) eliminating common term redundant term after writing the term as
YZ(X’+X) gives YZ. F = W'XY' + WY
Similarly group 2 is formed by XYZ’ (m6) and XYZ (m7) can be rewritten as
XY. Combining the simplified terms as SOP expression it can be written as F
= XY + YZ. Note that a given cell can be taken twice as m7 is included in both
groups. Both groups contains a 21 ones so each formed group is capable of
reducing 1 variable from the original expression.
Example F(X, Y, Z) =∑ (1, 3, 4, 5, 6, 7) Don’t Care Condition:
In some digital systems, certain input conditions never occur during normal
operations; therefore the corresponding output never appears. Since the
output does not appear it is indicated by an X in the truth table. X is called
don’t care condition. So don’t cares can be treated either as 0’s or as 1’s; such
F=X+Z that it is more convenient in the process of k-map simplification.
Consider the following truth table in which the output is low for all input
There are 16 cells in a 4-variable (W, X, Y, Z) K-map as shown in the Figure entries from 1001 and ‘X’ from 1010 through 1111. The don’t care conditions
2.2.4 (j). are denoted by ’X’.

There are 2 wrap-around: a horizontal wrap-around and a vertical wrap-around. Commented [R1]:
Every cell thus has 4 neighbors. For example, the cell Here three don’t cares are treated as 1’s to get a quad which
corresponding to minterm m0 has neighbor’s m1, m2, m4 and m8 as shown eliminates two variables. The remaining don’t care are treated as 0’s.
in Figure 2.2.4(k). Steps to be followed to apply don’t care conditions:
Example F (W, X, Y, Z) = ∑ (1, 5, 12, 13) 1. For the given truth table, draw a K-map with 0’s, 1’s and don’t cares.
2. Encircle the actual 1’s on the K-map in the largest groups, by treating the
F=WXY'+W'Y'Z don’t cares as 1’s.
3. After the actual 1’s have been included in groups discard the remaining don’t
cares visualizing them as 0’s.

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