STD17NF25

Datasheet

N-channel 250 V, 140 mΩ typ., 17 A STripFET II Power MOSFET

in a DPAK package

Features
TAB
Order code VDS RDS(on) max. ID

2 3 STD17NF25 250 V 165 mΩ 17 A

1
• Exceptional dv/dt capability
DPAK
• 100% avalanche tested
D(2, TAB)
• Low gate charge

Applications
• Switching applications
G(1)

Description

S(3) This Power MOSFET has been developed using STMicroelectronics' unique
AM01475v1_noZen
STripFET process, which is specifically designed to minimize input capacitance and
gate charge. This renders the device suitable for use as primary switch in advanced
high-efficiency isolated DC-DC converters for telecom and computer applications,
and applications with low gate charge driving requirements.

Product status link

STD17NF25

Product summary

Order code STD17NF25

Marking 17NF25
Package DPAK
Packing Tape and reel

DS5089 - Rev 5 - August 2023 www.st.com

For further information contact your local STMicroelectronics sales office.
 STD17NF25
Electrical ratings

1 Electrical ratings

Table 1. Absolute maximum ratings

Symbol Parameter Value Unit

VDS Drain-source voltage 250 V

VGS Gate-source voltage ±20 V

Drain current (continuous) at TC = 25 °C 17

ID A
Drain current (continuous) at TC = 100 °C 10

IDM(1) Drain current (pulsed) 68 A

PTOT Total power dissipation at TC = 25 °C 90 W

dv/dt(2) Peak diode recovery voltage slope 10 V/ns

Tstg Storage temperature range °C

-55 to 150
TJ Operating junction temperature range °C

1. Pulse width is limited by safe operating area.

2. ISD ≤ 17 A, di/dt ≤ 200 A/μs, VDS (peak) < V(BR)DSS, VDD = 80%V(BR)DSS.

Table 2. Thermal data

Symbol Parameter Value Unit

RthJC Thermal resistance, junction-to-case 1.38 °C/W

RthJA(1) Thermal resistance, junction-to-ambient 50 °C/W

1. When mounted on 1 inch2 FR-4, 2 Oz copper board.

Table 3. Avalanche characteristics

Symbol Parameter Value Unit

IAR Avalanche current, repetitive or non-repetitive (pulse width limited by TJ max.) 17 A

EAS Single pulse avalanche energy (starting TJ = 25 °C, ID = IAR, VDD = 50 V) 100 mJ

DS5089 - Rev 5 page 2/15

 STD17NF25
Electrical characteristics

2 Electrical characteristics

TC = 25 °C unless otherwise specified.

Table 4. On/off states

Symbol Parameter Test conditions Min. Typ. Max. Unit

V(BR)DSS Drain-source breakdown voltage ID = 1 mA, VGS = 0 V 250 V

VGS = 0 V, VDS = 250 V 1

IDSS Zero gate voltage drain current µA
VGS = 0 V, VDS = 250 V, TC = 125 °C(1) 10

IGSS Gate body leakage current VDS = 0 V, VGS = ±20 V ±100 nA

VGS(th) Gate threshold voltage VDS = VGS, ID = 250 µA 2 3 4 V

RDS(on) Static drain-source on resistance VGS = 10 V, ID = 8.5 A 140 165 mΩ

1. Specified by design, not tested in production.

Table 5. Dynamic

Symbol Parameter Test conditions Min. Typ. Max. Unit

Ciss Input capacitance - 1000 - pF

Coss Output capacitance VDS = 25 V, f = 1 MHz, VGS = 0 V - 178 - pF

Crss Reverse transfer capacitance - 28 - pF

Coss eq.(1) Equivalent output capacitance VDS = 0 to 200 V, VGS = 0 V - 135 - pF

Rg Gate input resistance f = 1 MHz, ID = 0 A - 2 - Ω

Qg Total gate charge - 29.5 - nC

VDD = 200 V, ID = 17 A, VGS = 0 to 10 V
Qgs Gate-source charge (see Figure 13. Test circuit for gate - 4.8 - nC

Qgd charge behavior)

Gate-drain charge - 15.6 - nC

1. Coss eq. is defined as a constant equivalent capacitance giving the same charging time as Coss when VDS increases from 0
to 80% VDSS.

Table 6. Switching times

Symbol Parameter Test conditions Min. Typ. Max. Unit

td(on) Turn-on delay time VDD = 125 V, ID = 8.5 A, - 8.8 - ns

tr Rise time RG = 4.7 Ω, VGS = 10 V - 17.2 - ns

td(off) Turn-off delay time (see Figure 12. Test circuit for resistive - 21 - ns
load switching times and
tf Fall time Figure 17. Switching time waveform) - 8.8 - ns

DS5089 - Rev 5 page 3/15

 STD17NF25
Electrical characteristics

Table 7. Source drain diode

Symbol Parameter Test conditions Min. Typ. Max. Unit

ISD Source-drain current - 17 A

ISDM(1) Source-drain current (pulsed) - 68 A

VSD(2) Forward on voltage ISD = 17 A, VGS = 0 V - 1.6 V

trr Reverse recovery time ISD = 17 A, di/dt = 100 A/µs, - 157 ns

Qrr Reverse recovery charge VDD = 50 V - 0.91 μC

(see Figure 14. Test circuit for inductive
IRRM Reverse recovery current - 11.6 A
load switching and diode recovery times)
trr Reverse recovery time ISD = 17 A, di/dt = 100 A/µs, - 196 ns

Qrr Reverse recovery charge VDD = 50 V, TJ = 150 °C - 1.34 μC

(see Figure 14. Test circuit for inductive
IRRM Reverse recovery current - 13.7 A
load switching and diode recovery times)

1. Pulse width limited by safe operating area.

2. Pulsed: pulse duration = 300 μs, duty cycle 1.5%.

DS5089 - Rev 5 page 4/15

 STD17NF25
Electrical characteristics (curves)

2.1 Electrical characteristics (curves)

Figure 1. Safe operating area Figure 2. Thermal impedance

Zth = k * RthJC
δ = tp / Ƭ

tp
Ƭ

Figure 3. Output characterisics Figure 4. Transfer characteristics

Figure 5. Normalized V(BR)DSS vs temperature Figure 6. Static drain-source on resistance

DS5089 - Rev 5 page 5/15

 STD17NF25
Electrical characteristics (curves)

Figure 7. Gate charge vs gate-source voltage Figure 8. Capacitance variations

Figure 9. Normalized gate threshold voltage vs

Figure 10. Normalized on resistance vs temperature
temperature

Figure 11. Source-drain diode forward characteristics

DS5089 - Rev 5 page 6/15

 STD17NF25
Test circuits

3 Test circuits

Figure 12. Test circuit for resistive load switching times Figure 13. Test circuit for gate charge behavior

VDD

12 V 47 kΩ
1 kΩ
100 nF
RL
2200 3.3
+ μF μF VDD
VD IG= CONST
VGS 100 Ω D.U.T.

VGS
RG D.U.T. pulse width +
2.7 kΩ
2200 VG
pulse width μF
47 kΩ

1 kΩ

AM01468v1 AM01469v1

Figure 14. Test circuit for inductive load switching and Figure 15. Unclamped inductive load test circuit
diode recovery times

A A A
D L
fast 100 µH VD
G D.U.T. diode
S B 3.3 1000 2200 3.3
B B + µF
25 Ω D
µF + µF VDD µF VDD
ID
G D.U.T.
+ RG S

_ Vi D.U.T.

pulse width

AM01470v1
AM01471v1

Figure 16. Unclamped inductive waveform Figure 17. Switching time waveform

ton toff
V(BR)DSS
td(on) tr td(off) tf
VD

90% 90%
IDM

10% VDS 10%

ID 0

VDD VDD
VGS 90%

0 10%

AM01472v1 AM01473v1

DS5089 - Rev 5 page 7/15

 STD17NF25
Package information

4 Package information

In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK packages,
depending on their level of environmental compliance. ECOPACK specifications, grade definitions and product
status are available at: www.st.com. ECOPACK is an ST trademark.

4.1 DPAK (TO-252) type C3 package information

Figure 18. DPAK (TO-252) type C3 package outline

0068772_type-C3_rev34

DS5089 - Rev 5 page 8/15

 STD17NF25
DPAK (TO-252) type C3 package information

Table 8. DPAK (TO-252) type C3 mechanical data

mm
Dim.
Min. Typ. Max.

A 2.20 2.30 2.38

A1 0.00 0.10
A2 0.90 1.01 1.10
b 0.72 0.85
b2 0.72 1.10
b3 5.13 5.33 5.46
c 0.47 0.60
c2 0.47 0.60
D 6.00 6.10 6.20
D1 5.20 5.45 5.70
E 6.50 6.60 6.70
E1 5.00 5.20 5.40
e 2.186 2.286 2.386
H 9.80 10.10 10.40
L 1.40 1.50 1.70
L1 2.90 REF
L2 0.51 BSC
L3 0.90 1.25
L4 0.60 0.80 1.00
L5 0.15 0.75
L6 1.80 REF
θ 0° 8°
θ1 5° 7° 9°
θ2 5° 7° 9°

DS5089 - Rev 5 page 9/15

 STD17NF25
DPAK (TO-252) type C3 package information

Figure 19. DPAK (TO-252) recommended footprint (dimensions are in mm)

FP_0068772_34
FP_0068772_34

DS5089 - Rev 5 page 10/15

 STD17NF25
DPAK (TO-252) packing information

4.2 DPAK (TO-252) packing information

Figure 20. DPAK (TO-252) tape outline

10 pitches cumulative
tolerance on tape +/- 0.2 mm

Top cover P0 D P2
T tape
E

F
K0 W
B1 B0

For machine ref. only A0 P1 D1

including draft and
radii concentric around B0
User direction of feed

Bending radius
User direction of feed

AM08852v1

DS5089 - Rev 5 page 11/15

 STD17NF25
DPAK (TO-252) packing information

Figure 21. DPAK (TO-252) reel outline

40mm min.
access hole
at slot location
B

D C

N
A

Tape slot G measured

in core for at hub
Full radius tape start
2.5mm min.width

AM06038v1

Table 9. DPAK (TO-252) tape and reel mechanical data

Tape Reel

mm mm
Dim. Dim.
Min. Max. Min. Max.

A0 6.8 7 A 330
B0 10.4 10.6 B 1.5
B1 12.1 C 12.8 13.2
D 1.5 1.6 D 20.2
D1 1.5 G 16.4 18.4
E 1.65 1.85 N 50
F 7.4 7.6 T 22.4
K0 2.55 2.75
P0 3.9 4.1 Base qty. 2500
P1 7.9 8.1 Bulk qty. 2500
P2 1.9 2.1
R 40
T 0.25 0.35
W 15.7 16.3

DS5089 - Rev 5 page 12/15

 STD17NF25

Revision history
Table 10. Document revision history

Date Revision Changes

01-Feb-2007 1 First release.

Minor text changes.
The part number STI17NF25 has been moved to a separate datasheet.
07-Nov-2012 2
Section 4: Package mechanical data and Section 5: Packaging mechanical data have been
updated.
Removed maturity status indication from cover page. The document status is production data.
Updated title in cover page, Section 1 Electrical ratings, Section 2 Electrical characteristics
28-May-2018 3
and Section 4 Package information.
Minor text changes.
The part numbers STF17NF25 and STP17NF25 have been moved to separate datasheets
and the document has been updated accordingly.
Removed "Section 4.1 DPAK (TO-252) type A2 package information" and replaced "Section
18-Jul-2023 4
4.2 DPAK (TO-252) type C2 package information" with Section 4.1 DPAK (TO-252) type C3
package information.
Minor text changes.
28-Aug-2023 5 Updated Section 1 Electrical ratings.

DS5089 - Rev 5 page 13/15

 STD17NF25
Contents

Contents
1 Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2
2 Electrical characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
2.1 Electrical characteristics (curves) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
3 Test circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7
4 Package information. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8
4.1 DPAK (TO-252) type C3 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
4.2 DPAK (TO-252) packing information. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .13

DS5089 - Rev 5 page 14/15

 STD17NF25

IMPORTANT NOTICE – READ CAREFULLY

STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST
products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders. ST
products are sold pursuant to ST’s terms and conditions of sale in place at the time of order acknowledgment.
Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the design of
purchasers’ products.
No license, express or implied, to any intellectual property right is granted by ST herein.
Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product.
ST and the ST logo are trademarks of ST. For additional information about ST trademarks, refer to www.st.com/trademarks. All other product or service names
are the property of their respective owners.
Information in this document supersedes and replaces information previously supplied in any prior versions of this document.
© 2023 STMicroelectronics – All rights reserved

DS5089 - Rev 5 page 15/15