TECHNICAL USER'S MANUAL FOR:

smartModule 480 BUS

INTEGRATION MANUAL

Nordstrasse 11/F
CH- 4542 Luterbach
Tel.: ++41 (0)32 681 58 00
Fax: ++41 (0)32 681 58 01
Email: support@digitallogic.com
Homepage: http://www.digitallogic.com
DIGITAL-LOGIC AG SM480 Integration manual V1.7

COPYRIGHT  1999- 2003 BY DIGITAL- LOGIC AG

No part of this document may be reproduced, transmitted, transcribed, stored in a retrieval system, in any
form or by any means, electronic, mechanical, optical, manual, or otherwise, without the prior written permis-
sion of DIGITAL-LOGIC AG.

The software described herein, together with this document, are furnished under a license agreement and
may be used or copied only in accordance with the terms of that agreement.

ATTENTION:
All information in this manual and the product are subject to change without prior notice.

REVISION HISTORY:

Prod.-Serialnumber: smart- BIOS Doc. Date/Vis: Modification:

From: To: bus Version Version Remarks, News, Attention:
Version
V1.0 09.2000 Initial Version
V2.0 V1.01 10.2000 Min. Modifikations, ICP Port defined
V2.1 V1.1 12.2000 STP smart design dimensions, 480bus
definitions, schematic added
V2.2 V1.2f 01.2001 KUF SMGX modifications, new DK
schematic, typo errors, application
tips, etc
V2.2 V1.3 04.2001 STP smart dimensions and 480bus sig-
nals corrected, new schematics
V2.2 V1.4 04.2001 STP Pin1 position smart480 connector
corrected
V2.2 V1.5 06.2001 STP AC97 codec taken out, new sche-
matic of the DK,
V2.2 V1.6 09.2001 STP New cooler dimensions
V2.2 V1.7 08.2003 KUF LCD-Bus to 3.3V only corrected.

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DIGITAL-LOGIC AG SM480 Integration manual V1.7

Table of Contents

1 PREFACE .......................................................................................................... 4
1.1 How to use this manual .......................................................................................................... 4
1.2 Disclaimer ................................................................................................................................ 4
1.3 Who should use this product................................................................................................. 4
1.4 Limited Warranty ..................................................................................................................... 5
1.5 smart Support Request Form (smart-SRF)........................................................................... 6
1.6 smart DesignIn Center (smart – DIC) .................................................................................... 7
2 OVERVIEW ........................................................................................................ 8
2.1 Features.................................................................................................................................... 8
2.2 Optional features (must be ordered separately) .................................................................. 8
2.3 SM586PC block diagram........................................................................................................ 9
2.4 SMP5PC & SMP3PC block diagram................................................................................... 10
2.5 SMGXPC block diagram ..................................................................................................... 11
2.6 Specifications ........................................................................................................................ 12
2.7 Ordercodes ............................................................................................................................ 14
3 DESIGNIN WITH SMART ................................................................................ 15
3.1 Mechanical dimensions, SMxxxPC ..................................................................................... 15
3.1.1 Mechanical PCB pad dimensions on the carrier-board ................................................... 16
3.1.2 PCB to SMxxxPC height ................................................................................................ 17
3.1.3 Mechanical dimensions of the PCB, plug ........................................................................ 18
3.1.4 Mechanical dimensions of the SMxxxPC, receptacle ...................................................... 19
4 BOARD TO BOARD CONNECTORS.............................................................. 20
4.1 The generic smartModule480 bus, (sinceVers. 2.2)........................................................... 20
4.2 SM480BUS pullup/down resistor specification................................................................. 26
4.2.1 Differences between the smartModules........................................................................... 32
4.2.2 Signal lines ....................................................................................................................... 33
4.2.3 LCD interface signaldefinition, only for C&T 69000 / 69030 (not for GEODE) ............... 35
4.2.4 CRT monitor signaldefinition ........................................................................................... 36
4.2.5 Power lines signaldefinition, SM486PCX......................................................................... 36
4.3 Power supply of the smartModule-480Bus......................................................................... 37
4.3.1 Connector specifications .................................................................................................. 37
4.3.2 Suspend mode description............................................................................................... 38
4.4 Thermal specifications ......................................................................................................... 38
5 PCI ASSIGNMENTS ...................................................................................... 39
5.1 Onmodule PCI assignments................................................................................................. 39
5.2 PC/104plus PCI assignments ............................................................................................... 39
5.3 CompactPCI assignments ................................................................................................... 39
5.4 ATX-board PCI-BUS assignments ..................................................................................... 39
6 DESIGNIN BLOCK SCHEMATICS.................................................................. 40
6.1 Samples Schematics SMP5PC- DK and SM486PCX- EK................................................. 41
6.2 Application to use the downloadtool for the external VGA BIOS. ................................... 42
6.3 Application for external DRAM (SODIMM 144pins)............................................................ 43
6.4 Application for external IDE’s .............................................................................................. 44
6.5 Application for the ATX power supply ................................................................................ 45
6.6 Application AC97 CODEC for the SMGXPC........................................................................ 46
6.7 SM486PCX- EK ...................................................................................................................... 50
7 INDEX .............................................................................................................. 55

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DIGITAL-LOGIC AG SM480 Integration manual V1.7

1 PREFACE
This manual is for integrators of systems based on the smartModule480 family. It contains information on
hardware requirements, interconnections, and details of how to program the system. The specifications
given in this manual were correct at the time of printing; advances mean that some may have changed in the
meantime.

1.1 How to use this manual

This manual is written for the original equipment manufacturer (OEM) who plans to build computer systems
based on the system on chip units. It provides instructions for designing, installing and configuring the unit,
and describes the system and setup requirements.

1.2 Disclaimer
DIGITAL-LOGIC AG makes no representations or warranties with respect to the contents of this manual and
specifically disclaims any implied warranty of merchantability or fitness for any particular purpose. DIGITAL-
LOGIC AG shall under no circumstances be liable for incidental or consequential damages or related ex-
penses resulting from the use of this product, even if it has been notified of the possibility of such damage.
DIGITAL-LOGIC AG reserves the right to revise this publication from time to time without obligation to notify
any person of such revisions

1.3 Who should use this product

- Electronic engineers with know-how in PC-technology.
- Without electronic know-how we expect you to have questions. This manual assumes, that you have a
general knowledge of PC-electronics.
- Because of the complexity and the variability of PC-technology, we can’t give any warranty that the prod-
uct will work in any particular situation or combination.
- Pay attention to the electrostatic discharges. Use a CMOS protected workplace.
- Power supply OFF when you are working on the board or connecting any cables or devices.

This is a high technology product.

You need know-how in electronics and PC-technology
to install the system !

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DIGITAL-LOGIC AG SM480 Integration manual V1.7

1.4 Limited Warranty

DIGITAL-LOGIC AG warrants the hardware and software products it manufactures and produces to be free
from defects in materials and workmanship for one year following the date of shipment from DIGITAL-LOGIC
AG, Switzerland. This warranty is limited to the original purchaser of product and is not transferable.

During the one year warranty period, DIGITAL-LOGIC AG will repair or replace, at its discretion, any defec-
tive product or part at no additional charge, provided that the product is returned, shipping prepaid, to
DIGITAL-LOGIC AG. All replaced parts and products become property of DIGITAL-LOGIC AG.

Before returning any product for repair, customers are required to contact the company.

This limited warranty does not extend to any product which has been damaged as a result of accident, mis-
use, abuse (such as use of incorrect input voltages, wrong cabling, wrong polarity, improper or insufficient
ventilation, failure to follow the operating instructions that are provided by DIGITAL-LOGIC AG or other con-
tingencies beyond the control of DIGITAL-LOGIC AG), wrong connection, wrong information or as a result of
service or modification by anyone other than DIGITAL-LOGIC AG. Neither, if the user has not enough
knowledge of these technologies or has not consulted the product manual or the technical support of
DIGITAL-LOGIC AG and therefore the product has been damaged.

Except, as expressly set forth above, no other warranties are expressed or implied, including, but not limited
to, any implied warranty of merchantability and fitness for a particular purpose, and DIGITAL-LOGIC AG ex-
pressly disclaims all warranties not stated herein. Under no circumstances will DIGITAL-LOGIC AG be liable
to the purchaser or any user for any damage, including any incidental or consequential damage, expenses,
lost profits, lost savings, or other damages arising out of the use or inability to use the product.

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DIGITAL-LOGIC AG SM480 Integration manual V1.7

1.5 smart Support Request Form (smart-SRF)

1. Send this SRF with your problem description to:

DIGITAL-LOGIC AG
smartModule DesignIn Center
Nordstr. 11/F
CH-4542 Luterbach (SWITZERLAND)
Fax: ++41 32 681 58 01
E-Mail: support@digitallogic.com
Internet www.digitallogic.com

Support request form (fill in and send via fax to DIGITAL-LOGIC AG support center):

SRF No: S118_______ Date:

Customer company:
Customer name:
Customer tel.no.: Customer e-mail:

Customers Customers country:

Address:
smart type: SM Processing date:
Request type: Support report: Operating system:
DesignIn aid: OS version: V___.____
BIOS adaption: BIOS version: V___.____
Manual correction:
Others:

Problem description:

Solution / answer (will be filled in by DIGITAL-LOGIC AG smart DesignIn Center):

Support date: Support statistics:

Support sign: Comment:
Support cost: yes no Offered costs CHF/USD/DEM:
for serving design
support:
DesignIn no.: Effective time / costs:

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DIGITAL-LOGIC AG SM480 Integration manual V1.7

1.6 smart DesignIn Center (smart – DIC)

DIGITAL-LOGIC AG offers a DesignIn support from a specialized engineering group in the smart DesignIn
Center (smart – DIC). To initialize a DesignIn Support, please fill in the smart-SRF form. The DesignIn Sup-
port can be offered in each phase of a DesignIn procedure. Only the ordered support value will be charged.
The charge fees are as follow:

Design Phase No. Support type Fee Charged

Evaluation 01 Consultation CHF 200.-- per hour

02 Training CHF 200.-- per hour
03 Design of the customers specification CHF 150.-- per hour

Schematics 10 Consultation CHF 200.-- per hour

11 Design of the schematics CHF 150.-- per hour
12 Review / inspection of customers schematics CHF 300.-- per sheet
13 Development of circuits / schematics CHF 200.-- per hour

Layout 20 Consultation CHF 200.-- per hour

21 Design of the layout CHF 150.-- per hour
22 Review / inspection of customers layout CHF 300.-- per sheet
23 Development of circuits / layout CHF 200.-- per hour

BIOS 30 Consultation CHF 200.-- per hour

31 Modification / test of the BIOS sourcecode CHF 1500.-- per day
32 Review / inspection of customers software CHF 300.-- per hour
33 Development of software CHF 200.-- per hour

Prototype 40 Consultation CHF 200.-- per hour

41 Test of customers system CHF 1200.-- per day
42 Review / inspection of customers system CHF 300.-- per hour
43 Development of test entvironment CHF 200.-- per hour

All costs are payable in advance.

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DIGITAL-LOGIC AG SM480 Integration manual V1.7

2 OVERVIEW
The following information is only a summary. Please refer to the product manual to receive the latest infor-
mation of a specific smartModule product.

2.1 Features
The smartModule is a miniaturized PC system on chip unit incorporating the major elements of a PC/AT
compatible computer. It includes standard PC/AT compatible elements, such as:

- Powerful Pentium P5/P3, GEODE or 80586 core

- BIOS Flash AMD 29F010 or ATMEL 29C020
- SODIMM socket for 16 - 128MB
- AT Timers
- AT DMA
- Real-time clock
- 2k EEPROM
- LPT1
- COM1and COM2 (as TTL’s)
- IrDA interface
- Speaker interface
- AT-keyboard interface
- PS/2 mouse interface
- 2x USB V1.0
- Floppydisk interface
- 2x ATA-IDE harddisk interface
- VGA/LCD video controller 3.3V (5V)
- JTAG Incircuit-Testport
- Embedded smartBUS480
- Support for ATX-Powermanagement
- 3.3V CPU- CORE- power supply (switched mode)
- PCI (33MHz) bus and ISA-bus (8MHz)
- External SDRAM expansion with 66/100MHz
- Remote BIOS function for control over serial link with host

2.2 Optional features (must be ordered separately)

- SMGXPCX and SM586PCX with onboard module 100Base-T LAN
- SMGXPC with soundfunktion (onboard AC97 codec), new since integration manual version V1.5

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DIGITAL-LOGIC AG SM480 Integration manual V1.7

2.3 SM586PC block diagram

CPU

MachZF DRAM
80586
(SO-DIMM 16- 128MB)
BUS
133MHz

PCI-BUS

Temp.
LM75 LCD/VGA VRAM
OPTION
MachZF 80586 Controller 2 MB
Speaker LAN
69000 INTEL
RTC (69030, VRAM 4MB) 82559
2x IDE

Ext.Bat
LCD CRT
Watchdog EEPROM
2x USB
1232 2kByte

ISA-BUS

BIOS MachZF
256kByte 80586

TTL TTL

IrDA FD LPT1 COM1 COM2 KB Mouse

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DIGITAL-LOGIC AG SM480 Integration manual V1.7

2.4 SMP5PC & SMP3PC block diagram

CPU

P5 – 266MHz
+ TX430 DRAM since V2.0 (SMP5PC):
(SO-DIMM 16- 256MB)
PIII – 700MHz BUS
+ BX440
until V1.4 (SMP5PC):
DRAM (32/64 Mbyte)
PCI-BUS

Temp.
LM75 LCD/VGA VRAM
PIIX4 Controller 2 MB
Speaker 69000
RTC (69030, VRAM 4MB)
2x IDE

Ext.Bat
LCD CRT
Watchdog EEPROM
2x USB
1232 2kByte

ISA-BUS

BIOS Super I/O

256kByte 37C672

TTL TTL

IrDA FD LPT1 COM1 COM2 KB Mouse

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DIGITAL-LOGIC AG SM480 Integration manual V1.7

2.5 SMGXPC block diagram

CPU

GX1-300MHz
GEODE DRAM
(SO-DIMM 16- 128MB)
VGA/LCD and BUS
North & South-
bridge incl.

PCI-BUS

Temp.
LM75 GEODE UMA
GEODE VGA Controller
Speaker Southbridge Integrated in South
RTC bridge
2x IDE

Ext.Bat
LCD CRT
Watchdog EEPROM
2x USB
1232 2kByte

ISA-BUS

BIOS Super I/O

256kByte PC97317

TTL TTL

IrDA FD LPT1 COM1 COM2 KB Mouse

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DIGITAL-LOGIC AG SM480 Integration manual V1.7

2.6 Specifications
CPU:
CPU: ZF 80586-133MHz
Pentium P5 166/266MHz
Pentium PIII 400-700MHz
GEODE 300MHz
Mode: Real / Protected
Compatibility: 8086 – 80386
1. Level Cache: 16 & 16kByte write-back
Word Size: 64 Bits
Physical Addressing: 32 lines
Virtual Addressing: 64 Mbytes
Clock Rates: Depending from the modultype

Math. Coprocessor:
Available on the CPU

Power Management:
available Defined by the BIOS

DMA:
8237A comp. 2 channels 8 Bits

Interrupts:
8259 comp. 8 + 2 levels
PC compatible

Timers:
8254 comp. 3 programmable counter/timers

Memory:
DRAM SODIMM 144pin holder (16 – 128Mbyte), externally expandable
For TX and BX chipset up to 256MB or higher depending on market

Video:
Controller: 80586, P5 and P3:
69000 (69030) PCI-BUS
CRT: 2Mbyte (4MB)
LCD: 36Bit up to 1024 x 768 x 256 colors
Panel: TFT up to 36Bit, STN, EL Plasma

GEODE:
CRT: up to 2Mbyte UMA (Unified Memory Architecture)
LCD: 18Bit TFT LCD
Panel: TFT 18Bit

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DIGITAL-LOGIC AG SM480 Integration manual V1.6

Mass Storage:
FD: Floppy disk interface, for max. 2 floppies
HD: 2x IDE interface, AT - Type, for max. 4 harddisks

Standard AT Interfaces:
Serial: Device FIFO Std.- Addr. Signals: Remarks
Name IRQs
COM1 yes IRQ4 3F8
COM2 yes IRQ3 2F8

(Baudrates: 50 – 115 KBaud programmable)

Parallel: LPT1 printer interface, Modes: SPP (output) , EPP ( bidir.)
Keyboard: AT- or PS/2-keyboard
Mouse: PS/2
Speaker: 0.1 W output drive
RTC: Integrated into the PIIX4 or SuperIO with CMOS-RAM 256byte
Backup current: <5 µA at 3.0V
Battery: Not assembled, must be connected external

Supervisory:
Watchdog: LTC1232 with power-fail detection, strobe time max. 1 sec.

BUS:

ISA: IEEE-996 standard bus

Clock: 8 MHz
PC/104plus IEEE-996 standard bus, buffered
Clock: 33 MHz defined by the design
USB Defined by the chipsset
DRAM 66Mhz or 100MHz (Pentium-III), defined by the chipset

Power Supply:
Working: 5 Volts ± 5%, 3.3V onboard switch mode regulator
Power Rise Time: > 100µs (0V --> 4,75V)

Physical Characteristics:
Dimensions: Length: 85 mm +/- 0.1mm
Depth: 66 mm +/- 0.1mm
Height: 12 mm +/- 0.2mm (with 5mm bus connectors)
+ 12 mm (active or passive cooler)
Weight: 90 gr / 9 ounces
PCB Thickness: 1.6 mm / 0.0625 inches nominal
PCB Layer: Multilayer

Operating Environment:
Relative Humidity: 5 - 90% non condensing
Vibration: 5 to 2000 Hz
Shock: 10 G
Temperature: Refer to the product manual

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DIGITAL-LOGIC AG SM480 Integration manual V1.6

EMI / EMC (IEC1131-2 refer MIL 461/462):

ESD Electro Static Discharge: IEC 801-2, EN55101-2, VDE 0843/0847 Part 2
metallic protection needed
separate Ground Layer included
15 kV single peak
REF Radiated Electromagnetic Field: IEC 801-3, VDE 0843 Part 3, IEC770 6.2.9.
not tested
EFT Electric Fast Transient (Burst): IEC 801-4, EN50082-1, VDE 0843 Part 4
250V - 4kV, 50 ohms, Ts=5ns
Grade 2: 1KV Supply, 500 I/O, 5Khz
SIR Surge Immunity Requirements: IEC 801-5, IEEE587, VDE 0843 Part 5
Supply: 2 kV, 6 pulse/minute
I/O: 500 V, 2 pulse/minute
FD, CRT: none
High-frequency radiation: EN55022

Any information is subject to change without notice.

2.7 Ordercodes
To get the actual status of the partnumbers, customers are advised to ask for them via our
sales department or distributors.
The list below has to be treated as a momentary screenshot and is might not up to date
anymore.

Family/order code: Based CPU Standard with VGA Option: No VGA Option: With LAN

smartModule486 ELAN400 (66MHz) SM486PCX SM486PCN SM486PCX

smartModule586 ZF586 (133MHz) SM586PC SM586PCN SM586PCX

smartModuleGX GEODE 200MHz SMGXPC-200 Not available SMGXPCX-200

GEODE 300MHz SMGXPC-300 SMGXPCX-300

smartModuleP5 Pentium 166MHz SMP5PC-166 SMP5PCN-166 Not available

Pentium 266MHz SMP5PC-266 SMP5PCN-266

smartModuleP3 Pentium 400C MHz SMP3PC-400C SMP3PCN-400C Not available

Pentium-III 700MHz SMP3PC-700

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DIGITAL-LOGIC AG SM480 Integration manual V1.6

3 DESIGNIN WITH smart

3.1 Mechanical dimensions, SMxxxPC

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DIGITAL-LOGIC AG SM480 Integration manual V1.6

3.1.1 Mechanical PCB pad dimensions on the carrier-board

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DIGITAL-LOGIC AG SM480 Integration manual V1.6

3.1.2 PCB to SMxxxPC height

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DIGITAL-LOGIC AG SM480 Integration manual V1.6

3.1.3 Mechanical dimensions of the PCB, plug

Must be mounted onto the customers electronicboard (carrierboard).

Standard height: 5.0mm (do not place components below the smartModule)
Expanded height: 7.0mm (place max. 2.0mm components below the smartModule)

53475-2409 Dimension mm (inches)

Circuits A (Overall Length) B (1st to Last Ckt) C D
240 83.07(3.270) 75.565(2.970) 79.17(3.110) 78.07(3.070)
DLAG partnumber: 439004

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DIGITAL-LOGIC AG SM480 Integration manual V1.6

3.1.4 Mechanical dimensions of the SMxxxPC, receptacle

Mounted on the smartModule xxPC, as a reference only

52760-2409 Dimension mm (inches)

Circuits A B C D
240 84.07(3.309) 75.565(2.970) 80.47(3.168) 78.87(3.105)
DLAG part number: 439003

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DIGITAL-LOGIC AG SM480 Integration manual V1.6

4 BOARD TO BOARD CONNECTORS

4.1 The generic smartModule480 bus, (sinceVers. 2.2)

smart 480 BUS connector J1 Pin 1-40 (Vers. 2.2 SM520PC, SMGXPC, SMP5/3PC)

Pin Group Volt SMxxxPC Pin Group Volt SMxxxPC

A1 POWER VCC (5V) B1 ISA 5i IRQ1 used by keyboard
A2 ISA 5o RESDRV B2 ISA 5i IRQ9
A3 ISA 5i SBHE# B3 ISA 5i IRQ3 used by COM2
A4 ISA 5i MEMCS16# B4 ISA 5i IRQ4 used by COM1
A5 ISA 5i IOCS16# B5 ISA 5i IRQ5
A6 ISA 5o IOW# B6 ISA 5i IRQ6 used by FDD
A7 ISA 5o IOR# B7 ISA 5i IRQ7 used by LPT1
A8 ISA 5o SYSCLK B8 ISA 5i IRQ10
A9 ISA 5o TC B9 ISA 5i IRQ11
A10 ISA 5o ALE B10 ISA 5i IRQ12 used by PS/2 mouse
A11 ISA 5 i/o SD7 B11 ISA 5i IRQ14 used by P-IDE
A12 ISA 5 i/o SD6 B12 ISA 5i IRQ15 used by S-IDE
A13 ISA 5 i/o SD5 B13 CORE 3/5 i Only factory: COREBIOS
A14 ISA 5 i/o SD4 B14 CORE 3/5 i Only factory: VGABIOS
A15 ISA 5 i/o SD3 B15 ISA 5o SA21 = LA21
A16 ISA 5 i/o SD2 B16 ISA 5o SA20 = LA20
A17 ISA 5 i/o SD1 B17 ISA 5o LA19
A18 ISA 5 i/o SD0 B18 ISA 5o LA18
A19 ISA 5o IOCHRDY B19 ISA 5o LA17
A20 ISA 5o AEN B20 ISA 5 i/o SD8
A21 ISA 5o SA19 B21 ISA 5 i/o SD9
A22 ISA 5o SA18 B22 ISA 5 i/o SD10
A23 ISA 5o SA17 B23 ISA 5 i/o SD11
A24 ISA 5o SA16 B24 ISA 5 i/o SD12
A25 ISA 5o SA15 B25 ISA 5 i/o SD13
A26 ISA 5o SA14 B26 ISA 5 i/o SD14
A27 ISA 5o SA13 B27 ISA 5 i/o SD15
A28 ISA 5o SA12 B28 ISA 5i DRQ 0
A29 ISA 5o SA11 B29 ISA 5i DRQ 1
A30 ISA 5o SA10 B30 ISA 5i DRQ 2
A31 ISA 5o SA9 B31 ISA 5i DRQ 3
A32 ISA 5o SA8 B32 ISA 5i DRQ 5
A33 ISA 5o SA7 B33 ISA 5i DRQ 6
A34 ISA 5o SA6 B34 ISA 5o OSC (14.31MHz)
A35 ISA 5o SA5 B35 ISA 5o DMA0#
A36 ISA 5o SA4 B36 ISA 5o DMA1#
A37 ISA 5o SA3 B37 ISA 5o DMA2#
A38 ISA 5o SA2 B38 ISA 5o DMA3#
A39 ISA 5o SA1 B39 ISA 5o DMA5#
A40 ISA 5o SA0 B40 ISA 5o DMA6#

** These signals (LA17-LA19) correspond with the SA17-SA19.

Remarks:
5 o = 5V output 5 i/o = 5V input/output
3 o = 3V output 3 i/o = 3V input/output

# (-)= active low signal o.c. = open collector output NC = not connected
RES = pin function depending of the CPU, reserved

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DIGITAL-LOGIC AG SM480 Integration manual V1.6

smart 480 BUS connector J1 Pin 41-80 (Vers. 2.2 SM520PC, SMGXPC, SMP5/3PC)

Pin Group Volt SMxxxPC Pin Group Volt SMxxxPC

A41 S/DRAM 3o CAS0- / DQMB0 B41 CORE 5o Speaker
A42 S/DRAM 3o CAS1- / DQMB1 B42 ISA 5i ZWS#
A43 S/DRAM 3o CAS2- / DQMB2 B43 ISA 5o REF#
A44 S/DRAM 3o CAS3- / DQMB3 B44 ISA 5o MEMR#
A45 S/DRAM 3o CAS4- / DQMB4 B45 ISA 5o SMEMR#
A46 S/DRAM 3o CAS5- / DQMB5 B46 ISA 5o MEMW#
A47 S/DRAM 3o CAS6- / DQMB6 B47 ISA 5o SMEMW#
A48 S/DRAM 3o CAS7- / DQMB7 B48 S-IDE 5 i/o IDE HD 0
A49 DRAM 3 i/o MD0 B49 S-IDE 5 i/o IDE HD 1
A50 DRAM 3 i/o MD1 B50 S-IDE 5 i/o IDE HD 2
A51 DRAM 3 i/o MD2 B51 S-IDE 5 i/o IDE HD 3
A52 DRAM 3 i/o MD3 B52 S-IDE 5 i/o IDE HD 4
A53 DRAM 3 i/o MD4 B53 S-IDE 5 i/o IDE HD 5
A54 DRAM 3 i/o MD5 B54 S-IDE 5 i/o IDE HD 6
A55 DRAM 3 i/o MD6 B55 S-IDE 5 i/o IDE HD 7
A56 DRAM 3 i/o MD7 B56 S-IDE 5 i/o IDE HD 8
A57 POWER GROUND B57 S-IDE 5 i/o IDE HD 9
A58 DRAM 3 i/o MD8 B58 S-IDE 5 i/o IDE HD 10
A59 DRAM 3 i/o MD9 B59 S-IDE 5 i/o IDE HD 11
A60 DRAM 3 i/o MD10 B60 S-IDE 5 i/o IDE HD 12
A61 DRAM 3 i/o MD11 B61 S-IDE 5 i/o IDE HD 13
A62 DRAM 3 i/o MD12 B62 S-IDE 5 i/o IDE HD 14
A63 DRAM 3 i/o MD13 B63 S-IDE 5 i/o IDE HD 15
A64 DRAM 3 i/o MD14 B64 S-IDE 5o IDE CS0#
A65 DRAM 3 i/o MD15 B65 S-IDE 5o IDE CS1#
A66 POWER GROUND B66 S-IDE 5o IDE IOR#
A67 DRAM 3 i/o MD16 B67 S-IDE 5o IDE IOW#
A68 DRAM 3 i/o MD17 B68 SDRAM 3o SDCLK2
A69 DRAM 3 i/o MD18 B69 SDRAM 3o CKE0
A70 DRAM 3 i/o MD19 B70 SDRAM 3o CKE1
A71 DRAM 3 i/o MD20 B71 SDRAM 3o SCASA
A72 DRAM 3 i/o MD21 B72 SDRAM 3o SCASB
A73 DRAM 3 i/o MD22 B73 SDRAM 3o SRASA
A74 DRAM 3 i/o MD23 B74 SDRAM 3o SDASB
A75 DRAM 3o MA0 B75 SDRAM 3o RAS4 (TX)
A76 DRAM 3o MA1 B76 SDRAM 3o RAS5 (TX)
A77 DRAM 3o MA2 B77 DRAM 3o MA13
A78 DRAM 3o MA3 B78 SDRAM 3o S DCLK0
A79 DRAM 3o MA4 B79 SDRAM 3o S DCLK1
A80 DRAM 3o MA5 B80 RES 3o RES- function 7/ 24MHz

Remarks:
5 o = 5V output 5 i/o = 5V input/output
3 o = 3V output 3 i/o = 3V input/output

# (-)= active low signal o.c. = open collector output NC = not connected
RES = pin function depending of the CPU, reserved

P5 CPU with 64Bit memorybus:

CASL0-CASL3 Bank 0,2 CAS0 .... CAS7 to all banks
CASH0-CASH3 Bank 1,3

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DIGITAL-LOGIC AG SM480 Integration manual V1.6

smart 480 BUS connector J1 Pin 81-120 (Vers. 2.2 SM520PC, SMGXPC, SMP5/3PC)

Pin Group Volt SMxxxPC Pin Group Volt SMxxxPC

A81 DRAM 3o MA 6 B81 POWER Ground
A82 DRAM 3o MA 7 B82 DRAM 3 i/o NC/ MD48
A83 DRAM 3o MA 8 B83 DRAM 3 i/o NC/ MD49
A84 DRAM 3o MA 9 B84 DRAM 3 i/o NC/ MD50
A85 DRAM 3o MA 10 B85 DRAM 3 i/o NC/ MD51
A86 DRAM 3o MA 11 B86 DRAM 3 i/o NC/ MD52
A87 DRAM 3o MA 12 B87 DRAM 3 i/o NC/ MD53
A88 POWER Ground B88 DRAM 3 i/o NC/ MD54
A89 DRAM 3 i/o MD24 B89 DRAM 3 i/o NC/ MD55
A90 DRAM 3 i/o MD25 B90 POWER GROUND
A91 DRAM 3 i/o MD26 B91 DRAM 3 i/o NC/ MD56
A92 DRAM 3 i/o MD27 B92 DRAM 3 i/o NC/ MD57
A93 DRAM 3 i/o MD28 B93 DRAM 3 i/o NC/ MD58
A94 DRAM 3 i/o MD29 B94 DRAM 3 i/o NC/ MD59
A95 DRAM 3 i/o MD30 B95 DRAM 3 i/o NC/ MD60
A96 DRAM 3 i/o MD31 B96 DRAM 3 i/o NC/ MD61
A97 POWER GROUND B97 DRAM 3 i/o NC/ MD62
A98 DRAM 3 i/o MD32 B98 DRAM 3 i/o NC/ MD63
A99 DRAM 3 i/o MD33 B99 POWER GROUND
A100 DRAM 3 i/o MD34 B100 S-IDE 5 i/o IDE-DACK#
A101 DRAM 3 i/o MD35 B101 S-IDE 5 i/o IDE-DRQ
A102 DRAM 3 i/o MD36 B102 S-IDE 5 i/o IRQ (assigned to IRQ15)
A103 DRAM 3 i/o MD37 B103 S-IDE 5 i/o IDE-IORDY
A104 DRAM 3 i/o MD38 B104 S-IDE 5 i/o IDE-A0
A105 DRAM 3 i/o MD39 B105 S-IDE 5 i/o IDE-A1
A106 POWER GROUND B106 S-IDE 5 i/o IDE-A2
A107 DRAM 3 i/o MD40 B107 SDRAM 3o BA0
A108 DRAM 3 i/o MD41 B108 Core 5 i# WDOG Strobe
A109 DRAM 3 i/o MD42 B109 Core 5 i# WDOG Enable
A110 DRAM 3 i/o MD43 B110 SDRAM 3o BA1
A111 DRAM 3 i/o MD44 B111 Xbus 3o KM-P10/ XD0
A112 DRAM 3 i/o MD45 B112 Xbus 3o KM-P11/ XD1
A113 DRAM 3 i/o MD46 B113 Xbus 3o KM-P12/ XD2
A114 DRAM 3 i/o MD47 B114 Xbus 3o KM-P13/ XD3
A115 S/DRAM 3o RAS0# / (S0 @ SDRAM) B115 Xbus 3o KM-P14/ XD4
A116 S/DRAM 3o RAS1# / (S1 @ SDRAM) B116 Xbus 3o KM-P15/ XD5
A117 S/DRAM 3o RAS2# / (internally used) B117 Xbus 3o KM-P16/ XD6
A118 S/DRAM 3o RAS3# / (free) B118 Xbus 3o KM-P17/ XD7
A119 DRAM 3o MWEA# B119 Xbus 3o KM-WRMTRX/ XD CS#
A120 DRAM 3o MWEB# B120 RES KM-RDMTRX/ VCC (+5V)

Remarks:
5 o = 5V output 5 i/o = 5V input/output
3 o = 3V output 3 i/o = 3V input/output

# (-)= active low signal o.c. = open collector output NC = not connected
RES = pin function depending of the CPU, reserved

Memorybus width: P5: 64Bit (MD0 – MD63))

22
DIGITAL-LOGIC AG SM480 Integration manual V1.6

smart 480 BUS connector J2 Pin 1-40 (Vers. 2.2 SM520PC, SMGXPC, SMP5/3PC)

Pin Group Volt SMxxxPC Pin Group Volt SMxxxPC

A1 PRINTER 5o Strobe# B1 COM1 5o DCD1
A2 PRINTER 5o Auto# B2 COM1 5i DSR1
A3 PRINTER 5o Error# B3 COM1 5i RXD1
A4 PRINTER 5o Init# B4 COM1 5o RTS1
A5 PRINTER 5o Slctin# B5 COM1 5o TXD1
A6 PRINTER 5 i/o PRINTER data 0 B6 COM1 5i CTS1
A7 PRINTER 5 i/o PRINTER data 1 B7 COM1 5o DTR1
A8 PRINTER 5 i/o PRINTER data 2 B8 COM1 5i RI1
A9 PRINTER 5 i/o PRINTER data 3 B9 COM2 5o DCD2
A10 PRINTER 5 i/o PRINTER data 4 B10 COM2 5i DSR2
A11 PRINTER 5 i/o PRINTER data 5 B11 COM2 5i RXD2
A12 PRINTER 5 i/o PRINTER data 6 B12 COM2 5o RTS2
A13 PRINTER 5 i/o PRINTER data 7 B13 COM2 5o TXD2
A14 PRINTER 5i Acknowledge# B14 COM2 5i CTS2
A15 PRINTER 5i Busy B15 COM2 5o DTR2
A16 PRINTER 5i Paper end# B16 COM2 5i RI2
A17 PRINTER 5i Select# B17 FLOPPY 5i Index#
A18 KBD 5 i/o Keyboard data B18 FLOPPY 5o Drive select 1#
A19 KBD 5o Keyboard clock B19 FLOPPY 5i Disk change#
A20 MOUSE 5o MOUSE clock B20 FLOPPY 5o Motor on 1
A21 MOUSE 5 i/o MOUSE data B21 FLOPPY 5o Direction#
A22 POWER Ground B22 FLOPPY 5o Step impulse#
A23 P-IDE 5 i/o IDE HD 0 B23 FLOPPY 5o Write data#
A24 P-IDE 5 i/o IDE HD 1 B24 FLOPPY 5o Write gate#
A25 P-IDE 5 i/o IDE HD 2 B25 FLOPPY 5i Track zero#
A26 P-IDE 5 i/o IDE HD 3 B26 FLOPPY 5i Write protected#
A27 P-IDE 5 i/o IDE HD 4 B27 FLOPPY 5i Read data#
A28 P-IDE 5 i/o IDE HD 5 B28 FLOPPY 5o Head select#
A29 P-IDE 5 i/o IDE HD 6 B29 FLOPPY 5o Drive select 0
A30 P-IDE 5 i/o IDE HD 7 B30 FLOPPY 5o Motor on 0
A31 P-IDE 5 i/o IDE HD 8 B31 APM 5i PWRBTN#
A32 P-IDE 5 i/o IDE HD 9 B32 P-IDE 5o IDE RESET#
A33 P-IDE 5 i/o IDE HD 10 B33 APM 5i LID#
A34 P-IDE 5 i/o IDE HD 11 B34 USB 5 i/o USB-P0+
A35 P-IDE 5 i/o IDE HD 12 B35 USB 5 i/o USB-P0-
A36 P-IDE 5 i/o IDE HD 13 B36 P-IDE 5o IDE-A 0
A37 P-IDE 5 i/o IDE HD 14 B37 P-IDE 5o IDE-A 1
A38 P-IDE 5 i/o IDE HD 15 B38 P-IDE 5o IDE-A 2
A39 P-IDE 5o IDE CS0# B39 P-IDE 5o IDE-IORDY
A40 P-IDE 5o IDE CS1# B40 LCD 5o LCD D32

Remarks:
5 o = 5V output 5 i/o = 5V input/output
3 o = 3V output 3 i/o = 3V input/output

# (-)= active low signal o.c. = open collector output NC = not connected
RES = pin function depending of the CPU, reserved

23
DIGITAL-LOGIC AG SM480 Integration manual V1.6

smart 480 BUS connector J2 Pin 41-80 (Vers. 2.2 SM520PC, SMGXPC, SMP5/3PC)

Pin Group Volt SMxxxPC Pin Group Volt SMxxxPC

A41 P-IDE 5o DACK# B41 IrDA 5o IrDA TX
A42 P-IDE 5o DRQ B42 IrDA 5i IrDA RX
A43 P-IDE 5i IDE-IRQ (to IRQ14) B43 LCD 3.3/5 o LCD D33
A44 P-IDE 5o IDE-IOR# B44 LCD 3.3/5 o LCD D34
A45 P-IDE 5o IDE-IOW# B45 LCD 3.3/5 o LCD D35
A46 POWER VCC (5V) B46 POWER 3i Battery 3.0V-3.6V for RTC
A47 PCI 3 i/o AD0 B47 PCI 3 i/o AD16
A48 PCI 3 i/o AD1 B48 PCI 3 i/o AD17
A49 PCI 3 i/o AD2 B49 PCI 3 i/o AD18
A50 PCI 3 i/o AD3 B50 PCI 3 i/o AD19
A51 PCI 3 i/o AD4 B51 PCI 3 i/o AD 20
A52 PCI 3 i/o AD5 B52 PCI 3 i/o AD 21
A53 PCI 3 i/o AD6 B53 PCI 3 i/o AD 22
A54 PCI 3 i/o AD7 B54 PCI 3 i/o AD 23
A55 PCI 3 i/o AD8 B55 PCI 3 i/o AD 24
A56 PCI 3 i/o AD9 B56 PCI 3 i/o AD 25
A57 PCI 3 i/o AD10 B57 PCI 3 i/o AD 26
A58 PCI 3 i/o AD11 B58 PCI 3 i/o AD 27
A59 PCI 3 i/o AD12 B59 PCI 3 i/o AD 28
A60 PCI 3 i/o AD13 B60 PCI 3 i/o AD 29
A61 PCI 3 i/o AD14 B61 PCI 3 i/o AD 30
A62 PCI 3 i/o AD15 B62 PCI 3 i/o AD 31
A63 PCI 3o C-BE0# B63 PCI 3i PIRQA#
A64 PCI 3o C-BE1# B64 PCI 3i PIRQB#
A65 PCI 3o C-BE2# B65 PCI 3i PIRQC#
A66 PCI 3o C-BE3# B66 PCI 3i PIRQD#
A67 POWER VCC (5V) B67 POWER VCC (5V)
A68 PCI 3o PCI-CLK1 B68 PCI 3o PCI-CLK2
A69 PCI 3i REQ0# B69 PCI 3o GNT0#
A70 PCI 3i REQ1# B70 PCI 3o GNT1#
A71 PCI 3i REQ2# B71 PCI 3o GNT2#
A72 PCI 3i REQ3# B72 PCI 3o GNT3#
A73 RES i/o RES.- function 5 B73 POWER VCC (5V)
DRAM_SEL
A74 PCI 3 i/o FRAME# B74 PCI 3 i/o IRDY#
A75 PCI 3 i/o TRDY# B75 PCI 3 i/o STOP#
A76 PCI 3 i/o DEVSEL# B76 PCI 3 i/o PAR#
A77 PCI 3 i/o SERR# B77 PCI 3 i/o LOCK#
A78 RES i/o RES.-function 4 B78 PCI 3o PCI-RESET#
A79 CORE 5i Resetinput / POWERgood B79 ISA 5i DRQ7
A80 RES i/o RES.- function 6 B80 ISA 50 DACK7#

All PCI signals are left open, if the smartModule does not support the PCI bus.

Remarks:
5 o = 5V output 5 i/o = 5V input/output
3 o = 3V output 3 i/o = 3V input/output

# (-)= active low signal o.c. = open collector output NC = not connected
RES = pin function depending of the CPU, reserved

24
DIGITAL-LOGIC AG SM480 Integration manual V1.6

smart 480 BUS connector J2 Pin 81-120 (Vers. 2.2 SM520PC, SMGXPC, SMP5/3PC)

Pin Group Volt SMxxxPC Pin Group Volt SMxxxPC

A81 LCD 3o LCD D24 B81 USB 5 i/o USB-P1+
A82 LCD 3o LCD D25 B82 USB 5 i/o USB-P1-
A83 LCD 3o LCD D26 B83 USB 5 i/o USB-OC0
A84 LCD 3o LCD D27 B84 USB 5 i/o USB-OC1
A85 LCD 3o LCD D28 B85 ISA 5o LA22
A86 LCD 3o LCD D29 B86 ISA 5o LA23
A87 LCD 3o LCD D30 B87 PCI 5 i/o PERR-
A88 LCD 3o LCD D31 B88 RES i/o RES.-function 1
A89 RES i/o RES.- function 2 B89 I2C 3 i/o SMB-DAT
A90 RES i/o RES.- function 3 B90 I2C 3o SMB-CLK
A91 POWER 3.3V B91 POWER 3.3V
A92 OPTION i/o INTERN LAN TX+ B92 ISA 5i MASTER#
A93 OPTION i/o INTERN LAN TX- B93 ISA 5i IOCHCK
A94 OPTION i/o INTERN LAN RX+ B94 CORE 5i JTAG-TCK (DASP)
A95 OPTION i/o INTERN LAN RX- B95 CORE 3i JTAG-TDI (DIAG)
A96 APM 3o SSTAT2 B96 CORE 3o JTAG-TDO (SEL)
A97 POWER 5i VCC-SUSPEND +5Volt B97 CORE 3i JTAG-TMS
A98 APM 3 i/o SUSA- (LAN0) B98 VGA 3o VESA VDDA
A99 APM 3 i/o SUSB- (LAN1) B99 VGA 3o VESA VDDC
A100 APM 3 i/o SUSC- (LAN2) B100 APM 3i STAT1
A101 VGA o VGA Analog Green B101 VGA o Analog ground
A102 VGA o VGA Analog Blue B102 VGA 5o VSynch
A103 VGA o VGA Analog Red B103 VGA 5o HSynch
A104 LCD 5o LCD ENAVEE B104 LCD 3o LCD ENAVDD
A105 POWER GROUND B105 LCD 3o LCD SHCLK
A106 LCD 3o LCD FLM/VS B106 LCD 3o LCD LP/HS
A107 LCD 3o LCD D12 B107 LCD 3o LCD D0
A108 LCD 3o LCD D13 B108 LCD 3o LCD D1
A109 LCD 3o LCD D14 B109 LCD 3o LCD D2
A110 LCD 3o LCD D15 B110 LCD 3o LCD D3
A111 LCD 3o LCD D16 B111 LCD 3o LCD D4
A112 LCD 3o LCD D17 B112 LCD 3o LCD D5
A113 LCD 3o LCD D18 B113 LCD 3o LCD D6
A114 LCD 3o LCD D19 B114 LCD 3o LCD D7
A115 LCD 3o LCD D20 B115 LCD 3o LCD D8
A116 LCD 3o LCD D21 B116 LCD 3o LCD D9
A117 LCD 3o LCD D22 B117 LCD 3o LCD D10
A118 LCD 3o LCD D23 B118 LCD 3o LCD D11
A119 LCD 3o LCD ENABKL B119 LCD 3o LCD M
A120 POWER 3o LCD VCC OUTPUT (3.3V) B120 POWER 2o CPU CORE OUTPUT (VCC2)

Remarks:
5 o = 5V output 5 i/o = 5V input/output
3 o = 3V output 3 i/o = 3V input/output

# (-)= active low signal o.c. = open collector output NC = not connected
RES = pin function depending of the CPU, reserved

25
DIGITAL-LOGIC AG SM480 Integration manual V1.6

4.2 SM480BUS pullup/down resistor specification

SM480BUS pullup/down-resistor, connector J1 Pin 1-40

(Vers. 2.2 SM586PC, SMGXPC, SMP5/3PC)

Pin Pull *) Chip Description Pin Pull *) Chip Description

A1 VCC (5V) B1 iPU10k /5V PIIX4 IRQ1 used by keyboard
A2 TTL-Output HCT04 RESDRV B2 iPU10k /5V PIIX4 IRQ9
A3 ePU1k /5V PIIX4 SBHE# 1) B3 iPU10k /5V PIIX4 IRQ3 used by COM2
A4 ePU1k /5V PIIX4 MEMCS16# 1) B4 iPU10k /5V PIIX4 IRQ4 used by COM1
A5 ePU1k /5V PIIX4 IOCS16# 1) B5 iPU10k /5V PIIX4 IRQ5
A6 iPU10k /5V PIIX4 IOW# B6 iPU10k /5V PIIX4 IRQ6 used by FDD
A7 iPU10k /5V PIIX4 IOR# B7 iPU10k /5V PIIX4 IRQ7 used by LPT1
A8 SYSCLK B8 iPU10k /5V PIIX4 IRQ10
A9 TC B9 iPU10k /5V PIIX4 IRQ11
A10 iPU10k /5V PIIX4 ALE B10 iPU10k /5V PIIX4 IRQ12 used by PS/2
A11 iPU10k /5V PIIX4 SD7 B11 iPU10k /5V PIIX4 IRQ14 used by P-IDE
A12 iPU10k /5V PIIX4 SD6 B12 iPU10k /5V PIIX4 IRQ15 used by S-IDE
A13 iPU10k /5V PIIX4 SD5 B13 Only factory: COREBIOS
A14 iPU10k /5V PIIX4 SD4 B14 Only factory: VGABIOS
A15 iPU10k /5V PIIX4 SD3 B15 iPU10k /5V PIIX4 SA21 = LA21
A16 iPU10k /5V PIIX4 SD2 B16 iPU10k /5V PIIX4 SA20 = LA20
A17 iPU10k /5V PIIX4 SD1 B17 iPU10k /5V PIIX4 LA19
A18 iPU10k /5V PIIX4 SD0 B18 iPU10k /5V PIIX4 LA18
A19 ePU1k /5V PIIX4 IOCHRDY 1) B19 iPU10k /5V PIIX4 LA17
A20 iPU10k /5V PIIX4 AEN B20 iPU10k /5V PIIX4 SD8
A21 iPU10k /5V PIIX4 SA19 B21 iPU10k /5V PIIX4 SD9
A22 iPU10k /5V PIIX4 SA18 B22 iPU10k /5V PIIX4 SD10
A23 iPU10k /5V PIIX4 SA17 B23 iPU10k /5V PIIX4 SD11
A24 iPU10k /5V PIIX4 SA16 B24 iPU10k /5V PIIX4 SD12
A25 iPU10k /5V PIIX4 SA15 B25 iPU10k /5V PIIX4 SD13
A26 iPU10k /5V PIIX4 SA14 B26 iPU10k /5V PIIX4 SD14
A27 iPU10k /5V PIIX4 SA13 B27 iPU10k /5V PIIX4 SD15
A28 iPU10k /5V PIIX4 SA12 B28 iPD1k /5V PIIX4 DRQ 0
A29 iPU10k /5V PIIX4 SA11 B29 iPD1k /5V PIIX4 DRQ 1
A30 iPU10k /5V PIIX4 SA10 B30 iPD1k /5V PIIX4 DRQ 2
A31 iPU10k /5V PIIX4 SA9 B31 iPD1k /5V PIIX4 DRQ 3
A32 iPU10k /5V PIIX4 SA8 B32 iPD1k /5V PIIX4 DRQ 5
A33 iPU10k /5V PIIX4 SA7 B33 iPD1k /5V PIIX4 DRQ 6
A34 iPU10k /5V PIIX4 SA6 B34 iSE 33 PIIX4 OSC (14.31MHz)
A35 iPU10k /5V PIIX4 SA5 B35 PIIX4 DMA0#
A36 iPU10k /5V PIIX4 SA4 B36 PIIX4 DMA1#
A37 iPU10k /5V PIIX4 SA3 B37 PIIX4 DMA2#
A38 iPU10k /5V PIIX4 SA2 B38 PIIX4 DMA3#
A39 iPU10k /5V PIIX4 SA1 B39 PIIX4 DMA5#
A40 iPU10k /5V PIIX4 SA0 B40 PIIX4 DMA6#

*) ePU = external required resistor

iPU = internal placed resistor
eSE = external serial resistor needed
iSE = internal serial resistor
iPD = internal pulled down

1) Internal with 10k to 5V pullup, for ISA-Bus application an external 1k pullup resistor is recommended
• Shaded resistors must be placed externally on the motherboard as close as possible to the module
• PIIX4 treat also as SOUTHBRIDGE
• TX treat also as NORTHBRIDGE

26
DIGITAL-LOGIC AG SM480 Integration manual V1.6

SM480BUS pullup/down-resistor, connector J1 Pin 41-80

(Vers. 2.2 SM586PC, SMGXPC, SMP5/3PC)

Pin Pull *) Chip Description Pin Pull *) Chip Description

A41 eSe 33 TX CAS0# B41 Speaker
A42 eSe 33 TX CAS1# B42 iPU10k /5V PIIX4 ZWS#
A43 eSe 33 TX CAS2# B43 iPU10k /5V PIIX4 REF#
A44 eSe 33 TX CAS3# B44 iPU10k /5V PIIX4 MEMR#
A45 eSe 33 TX CAS4# B45 iPU10k /5V PIIX4 SMEMR#
A46 eSe 33 TX CAS5# B46 iPU10k /5V PIIX4 MEMW#
A47 eSe 33 TX CAS6# B47 iPU10k /5V PIIX4 SMEMW#
A48 eSe 33 TX CAS7# B48 eSe 10 PIIX4 SIDE – D0
A49 TX MD0 B49 eSe 10 PIIX4 SIDE – D1
A50 TX MD1 B50 eSe 10 PIIX4 SIDE – D2
A51 TX MD2 B51 eSe 10 PIIX4 SIDE – D3
A52 TX MD3 B52 eSe 10 PIIX4 SIDE – D4
A53 TX MD4 B53 eSe 10 PIIX4 SIDE – D5
A54 TX MD5 B54 eSe 10 PIIX4 SIDE – D6
A55 TX MD6 B55 eSe 10 PIIX4 SIDE – D7
A56 TX MD7 B56 eSe 10 PIIX4 SIDE – D8
A57 GROUND B57 eSe 10 PIIX4 SIDE – D9
A58 TX MD8 B58 eSe 10 PIIX4 SIDE – D10
A59 TX MD9 B59 eSe 10 PIIX4 SIDE – D11
A60 TX MD10 B60 eSe 10 PIIX4 SIDE – D12
A61 TX MD11 B61 eSe 10 PIIX4 SIDE – D13
A62 TX MD12 B62 eSe 10 PIIX4 SIDE – D14
A63 TX MD13 B63 eSe 10 PIIX4 SIDE – D15
A64 TX MD14 B64 eSe 10 PIIX4 SIDE - CS0#
A65 TX MD15 B65 eSe 10 PIIX4 SIDE – CS1#
A66 GROUND B66 eSe 10 PIIX4 SIDE – IOR#
A67 TX MD16 B67 eSe 10 PIIX4 SIDE – IOW#
A68 TX MD17 B68 iSe 10 TX SDRAM – CLK2
A69 TX MD18 B69 iSe 10 TX SDRAM – CKE0
A70 TX MD19 B70 iSe 10 TX SDRAM – CKE1
A71 TX MD20 B71 iSe 10 TX SDRAM – SCASA
A72 TX MD21 B72 iSe 10 TX SDRAM – SCASB
A73 TX MD22 B73 iSe 10 TX SDRAM – SRASA
A74 TX MD23 B74 iSe 10 TX SDRAM – SRASB
A75 eSE 33 TX MA0 B75 eSe 33 TX RAS4
A76 eSE 33 TX MA1 B76 eSe 33 TX RAS5
A77 eSE 33 TX MA2 B77 eSe 33 TX MA13
A78 eSE 33 TX MA3 B78 iSe 10 TX SDRAM – CLK0
A79 eSE 33 TX MA4 B79 iSe 10 TX SDRAM – CLK1
A80 eSE 33 TX MA5 B80 RES RES. –function 7/ 24MHz

*) ePU = external required resistor

iPU = internal placed resistor
eSE = external serial resistor needed
iSE = internal serial resistor
iPD = internal pulled down

2) Internal with 10k to 5V pullup, for ISA-Bus application an external 1k pullup resistor is recommended
• Shaded resistors must be placed externally on the motherboard as close as possible to the module
• PIIX4 treat also as SOUTHBRIDGE
• TX treat also as NORTHBRIDGE

27
DIGITAL-LOGIC AG SM480 Integration manual V1.6

SM480BUS pullup/down-resistor, connector J1 Pin 81-120

(Vers. 2.2 SM586PC, SMGXPC, SMP5/3PC)

Pin Pull: *) Chip Description Pin Pull: *) Chip Description

A81 eSE 33 TX MA 6 B81 TX Ground
A82 eSE 33 TX MA 7 B82 TX NC/ MD48
A83 eSE 33 TX MA 8 B83 TX NC/ MD49
A84 eSE 33 TX MA 9 B84 TX NC/ MD50
A85 eSE 33 TX MA 10 B85 TX NC/ MD51
A86 eSE 33 TX MA 11 B86 TX NC/ MD52
A87 eSE 33 TX MA 12 B87 TX NC/ MD53
A88 TX Ground B88 TX NC/ MD54
A89 TX MD24 B89 TX NC/ MD55
A90 TX MD25 B90 TX GROUND
A91 TX MD26 B91 TX NC/ MD56
A92 TX MD27 B92 TX NC/ MD57
A93 TX MD28 B93 TX NC/ MD58
A94 TX MD29 B94 TX NC/ MD59
A95 TX MD30 B95 TX NC/ MD60
A96 TX MD31 B96 TX NC/ MD61
A97 TX GROUND B97 TX NC/ MD62
A98 TX MD32 B98 TX NC/ MD63
A99 TX MD33 B99 TX GROUND
A100 TX MD34 B100 eSe 33 PIIX4 SIDE – DACK
A101 TX MD35 B101 iPD1k/0V PIIX4 SIDE – DRQ
A102 TX MD36 B102 eSE 33 PIIX4 SIDE – IRQ
A103 TX MD37 B103 iPU1k/5V PIIX4 SIDE – RDY
A104 TX MD38 B104 eSE 33 PIIX4 SIDE – A0
A105 TX MD39 B105 eSE 33 PIIX4 SIDE – A1
A106 TX GROUND B106 eSE 33 PIIX4 SIDE – A2
A107 TX MD40 B107 eSE 10 TX BA0
A108 TX MD41 B108 LT1232 WDOG Strobe
A109 TX MD42 B109 LT1232 WDOG ENABLE
A110 TX MD43 B110 eSE 10 TX BA1
A111 TX MD44 B111 PIIX4 KM-P10/ XD0
A112 TX MD45 B112 PIIX4 KM-P11/ XD1
A113 TX MD46 B113 PIIX4 KM-P12/ XD2
A114 TX MD47 B114 PIIX4 KM-P13/ XD3
A115 eSE 10 TX RAS0# / (S0 @ SDRAM) B115 PIIX4 KM-P14/ XD4
A116 eSE 10 TX RAS1# / (S1 @ SDRAM) B116 PIIX4 KM-P15/ XD5
A117 eSE 10 TX RAS2# / (internally used) B117 PIIX4 KM-P16/ XD6
A118 eSE 10 TX RAS3# / (free) B118 PIIX4 KM-P17/ XD7
A119 eSE 10 TX MWEA# B119 PIIX4 KM-WRMTRX/ XD CS#
A120 eSE 10 TX MWEB# B120 RES KM-RDMTRX/ VCC (+5V)

*) ePU = external required resistor

iPU = internal placed resistor
eSE = external serial resistor needed
iSE = internal serial resistor
iPD = internal pulled down

3) Internal with 10k to 5V pullup, for ISA-Bus application an external 1k pullup resistor is recommended
• Shaded resistors must be placed externally on the motherboard as close as possible to the module
• PIIX4 treat also as SOUTHBRIDGE
• TX treat also as NORTHBRIDGE

28
DIGITAL-LOGIC AG SM480 Integration manual V1.6

SM480BUS pullup/down-resistor, connector J2 Pin 1-40

(Vers. 2.2 SM586PC, SMGXPC, SMP5/3PC)

Pin Pull: *) Chipt Description Pin Pull: *) Chip Description

A1 iPU1k/5V 37C672 strobe# B1 37C672 DCD1
A2 iPU1k/5V 37C672 auto# B2 37C672 DSR1
A3 iPU1k/5V 37C672 error# B3 37C672 RXD1
A4 iPU1k/5V 37C672 init# B4 37C672 RTS1
A5 iPU1k/5V 37C672 slctin# B5 37C672 TXD1
A6 ePU1k/5V 37C672 PRINTER data 0 B6 37C672 CTS1
A7 ePU1k/5V 37C672 PRINTER data 1 B7 37C672 DTR1
A8 ePU1k/5V 37C672 PRINTER data 2 B8 37C672 RI1
A9 ePU1k/5V 37C672 PRINTER data 3 B9 37C672 DCD2
A10 ePU1k/5V 37C672 PRINTER data 4 B10 37C672 DSR2
A11 ePU1k/5V 37C672 PRINTER data 5 B11 37C672 RXD2
A12 ePU1k/5V 37C672 PRINTER data 6 B12 37C672 RTS2
A13 ePU1k/5V 37C672 PRINTER data 7 B13 37C672 TXD2
A14 iPU1k/5V 37C672 acknowledge# B14 37C672 CTS2
A15 iPU1k/5V 37C672 busy B15 37C672 DTR2
A16 iPU1k/5V 37C672 paper end# B16 37C672 RI2
A17 iPU1k/5V 37C672 Select# B17 iPU1k/5V 37C672 Index#
A18 iPU1k/5V 37C672 keyboard data B18 37C672 Drive select 1#
A19 iPU1k/5V 37C672 keyboard clock B19 iPU1k/5V 37C672 Disk change#
A20 iPU1k/5V 37C672 MOUSE clock B20 37C672 Motor on 1
A21 iPU1k/5V 37C672 MOUSE data B21 37C672 Direction#
A22 Ground B22 37C672 Step impulse#
A23 eSE 10 PIIX4 PIDE HD 0 B23 37C672 Write data#
A24 eSE 10 PIIX4 PIDE HD 1 B24 37C672 Write gate#
A25 eSE 10 PIIX4 PIDE HD 2 B25 iPU1k/5V 37C672 Track zero#
A26 eSE 10 PIIX4 PIDE HD 3 B26 iPU1k/5V 37C672 Write protected#
A27 eSE 10 PIIX4 PIDE HD 4 B27 iPU1k/5V 37C672 Read data#
A28 eSE 10 PIIX4 PIDE HD 5 B28 37C672 Head select#
A29 eSE 10 PIIX4 PIDE HD 6 B29 37C672 Drive select 0
A30 eSE 10 PIIX4 PIDE HD 7 B30 37C672 Motor on 0
A31 eSE 10 PIIX4 PIDE HD 8 B31 iPU10k/3V PIIX4 PWRBTN#
A32 eSE 10 PIIX4 PIDE HD 9 B32 eSE 10 PIIX4 IDE RESET#
A33 eSE 10 PIIX4 PIDE HD 10 B33 iPU10k/3V PIIX4 LID#
A34 eSE 10 PIIX4 PIDE HD 11 B34 extern PIIX4 USB-P0+
A35 eSE 10 PIIX4 PIDE HD 12 B35 extern PIIX4 USB-P0-
A36 eSE 10 PIIX4 PIDE HD 13 B36 eSE 10 PIIX4 P-IDE-A 0
A37 eSE 10 PIIX4 PIDE HD 14 B37 eSE 10 PIIX4 P-IDE-A 1
A38 eSE 10 PIIX4 PIDE HD 15 B38 eSE 10 PIIX4 P-IDE-A 2
A39 eSE 10 PIIX4 PIDE CS0# (1Fx) B39 eSE 10 PIIX4 P-IDE-IORDY
A40 eSE 10 PIIX4 PIDE CS1# (3Fx) B40 69000 LCD D32

*) ePU = external required resistor

iPU = internal placed resistor
eSE = external serial resistor needed
iSE = internal serial resistor
iPD = internal pulled down

4) Internal with 10k to 5V pullup, for ISA-Bus application an external 1k pullup resistor is recommended
• Shaded resistors must be placed externally on the motherboard as close as possible to the module
• PIIX4 treat also as SOUTHBRIDGE
• TX treat also as NORTHBRIDGE

29
DIGITAL-LOGIC AG SM480 Integration manual V1.6

SM480BUS pullup/down-resistor, connector J2 Pin 41-80

(Vers. 2.2 SM586PC, SMGXPC, SMP5/3PC)

Pin Pull: *) Chip: Description Pin Pull: *) Chip Description

A41 eSE 10 PIIX4 PDACK# B41 SIO IrDA TX
A42 iPD1k/0V PIIX4 PREQ B42 SIO IrDA RX
A43 eSE 10 PIIX4 PIDE IRQ B43 69000/30 LCD D33
A44 eSE 10 PIIX4 PIDE IOR# B44 69000/30 LCD D34
A45 eSE 10 PIIX4 PIDE IOW# B45 69000/30 LCD D35
A46 VCC (5V) B46 Battery 3.0V for RTC
A47 PCI AD0 B47 PCI AD16
A48 PCI AD1 B48 PCI AD17
A49 PCI AD2 B49 PCI AD18
A50 PCI AD3 B50 PCI AD19
A51 PCI AD4 B51 PCI AD20
A52 PCI AD5 B52 PCI AD21
A53 PCI AD6 B53 PCI AD22
A54 PCI AD7 B54 PCI AD23
A55 PCI AD8 B55 PCI AD24
A56 PCI AD9 B56 PCI AD25
A57 PCI AD10 B57 PCI AD26
A58 PCI AD11 B58 PCI AD27
A59 PCI AD12 B59 PCI AD28
A60 PCI AD13 B60 PCI AD29
A61 PCI AD14 B61 PCI AD30
A62 PCI AD15 B62 PCI AD31
A63 PCI C-BE0# B63 iPU10k/3V PIIX4 PIRQA#
A64 PCI C-BE1# B64 iPU10k/3V PIIX4 PIRQB#
A65 PCI C-BE2# B65 iPU10k/3V PIIX4 PIRQC#
A66 PCI C-BE3# B66 iPU10k/3V PIIX4 PIRQD#
A67 VCC (5V) B67 VCC (5V)
A68 iSE 33 CLK PCI-CLK1 B68 iSE 33 CLK PCI-CLK2
A69 iPU10k/3V PIIX4 REQ0# B69 iPU1k/3V PIIX4 GNT0#
A70 iPU10k/3V PIIX4 REQ1# B70 iPU1k/3V PIIX4 GNT1#
A71 iPU10k/3V PIIX4 REQ2# B71 iPU1k/3V PIIX4 GNT2#
A72 iPU10k/3V PIIX4 REQ3# B72 iPU1k/3V PIIX4 GNT3#
RES. –function 5/ SDRAM_SEL
A73 RES B73 VCC (5V)
A74 iPU10k/3V PIIX4 FRAME# B74 iPU10k/3V PIIX4 IRDY#
A75 iPU10k/3V PIIX4 TRDY# B75 iPU10k/3V PIIX4 STOP#
A76 iPU10k/3V PIIX4 DEVSEL# B76 iPU10k/3V PIIX4 PAR#
A77 iPU10k/3V PIIX4 SERR# B77 iPU10k/3V PIIX4 LOCK#
A78 RES FKT 4 B78 iPU10k/3V PIIX4 PCI-RESET#
A79 iPU1k/5V LT1232 resetinput / POW- B79 iPD1k/0V PIIX4 DRQ7
A80 iPU1k/3.3V PIIX4 RES FKT 6 B80 PIIX4 DACK7

*) ePU = external required resistor

iPU = internal placed resistor
eSE = external serial resistor needed
iSE = internal serial resistor
iPD = internal pulled down

5) Internal with 10k to 5V pullup, for ISA-Bus application an external 1k pullup resistor is recommended
• Shaded resistors must be placed externally on the motherboard as close as possible to the module
• PIIX4 treat also as SOUTHBRIDGE
• TX treat also as NORTHBRIDGE

30
DIGITAL-LOGIC AG SM480 Integration manual V1.6

SM480BUS pullup/down-resistor, connector J2 Pin 81-120

(Vers. 2.2 SM586PC, SMGXPC, SMP5/3PC)

Pin Pull: *) Chip Description Pin Pull: Chip Description

A81 69000/30 LCD D24 B81 extern PIIX4 USB-P1+
A82 69000/30 LCD D25 B82 extern PIIX4 USB-P1-
A83 69000/30 LCD D26 B83 extern PIIX4 USB-OC0
A84 69000/30 LCD D27 B84 extern PIIX4 USB-OC1
A85 69000/30 LCD D28 B85 iPU10k/5V PIIX4 S/LA22
A86 69000/30 LCD D29 B86 iPU10k/5V PIIX4 S/LA23
A87 69000/30 LCD D30 B87 iPU10k/3V PIIX4 PERR-
A88 69000/30 LCD D31 B88 RES FKT1 RES FKT1
A89 RES-FKT2 37C672 DRVDEN1 (IrDA-SEL) B89 iPU10k/3V PIIX4 SMB-DATA
A90 RES-FKT3 37C672 DRVDEN0 (IrDA-SEL) B90 iPU10k/3V PIIX4 SMB-CLOCK
A91 3.3V B91 3.3V
A92 Option 82C559 INTERN TX100+ B92 iPU1k/5V PIIX4 MASTER#
A93 Option 82C559 INTERN TX100- B93 iPU1k/5V PIIX4 IOCHCK
A94 Option 82C559 INTERN RX100+ B94 ICP TCK
A95 Option 82C559 INTERN RX100- B95 ICP TDI
A96 PIIX4 SUS-STAT2 B96 ICP TDO
A97 POWER VCC-SUSPEND B97 ICP TMS
A98 PIIX4 SUSA- B98 69000 VESA: DDA
A99 PIIX4 SUSB- B99 69000 VESA: DDC
A100 PIIX4 SUSC- B100 iPU10k/3V PIIX4 SUS-STAT1
A101 iPD 75 69000/30 analog green B101 VGA Analog ground VIDEO
A102 iPD 75 69000/30 analog blue B102 69000/30 VSynch
A103 iPD 75 69000/30 analog red B103 69000/30 HSynch
A104 69000/30 LCD ENAVEE B104 69000/30 LCD ENAVDD
A105 69000/30 GROUND B105 69000/30 LCD SHCLK
A106 69000/30 LCD FLM/VS B106 69000/30 LCD LP/HS
A107 69000/30 LCD D12 B107 69000/30 LCD D0
A108 69000/30 LCD D13 B108 69000/30 LCD D1
A109 69000/30 LCD D14 B109 69000/30 LCD D2
A110 69000/30 LCD D15 B110 69000/30 LCD D3
A111 69000/30 LCD D16 B111 69000/30 LCD D4
A112 69000/30 LCD D17 B112 69000/30 LCD D5
A113 69000/30 LCD D18 B113 69000/30 LCD D6
A114 69000/30 LCD D19 B114 69000/30 LCD D7
A115 69000/30 LCD D20 B115 69000/30 LCD D8
A116 69000/30 LCD D21 B116 69000/30 LCD D9
A117 69000/30 LCD D22 B117 69000/30 LCD D10
A118 69000/30 LCD D23 B118 69000/30 LCD D11
A119 69000/30 LCD ENABKL B119 69000/30 LCD M
A120 POWER LCD VCC (3,3V) B120 CPU CPU CORE output

*) ePU = external required resistor

iPU = internal placed resistor
eSE = external serial resistor needed
iSE = internal serial resistor
iPD = internal pulled down

6) Internal with 10k to 5V pullup, for ISA-Bus application an external 1k pullup resistor is recommended
• Shaded resistors must be placed externally on the motherboard as close as possible to the module
• PIIX4 treat also as SOUTHBRIDGE
• TX treat also as NORTHBRIDGE

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DIGITAL-LOGIC AG SM480 Integration manual V1.6

4.2.1 Differences between the smartModules

SM486PCX SM586PC SMP5PC SMP3PC SMGXPC

EXT. MEMORY
Type: EDO SDRAM SDRAM SDRAM SDRAM
Width 32Bit 32Bit 64Bit 64Bit 64Bit
MD00 – MD31 yes yes yes yes Yes
MD32 – MD63 n.c. n.c. yes yes Yes
PCI-BUS no yes yes yes Yes

EXTERNAL BIOS
BIOSCSin/out yes yes (XD bus) yes (XD bus) yes (XD bus) yes (XD bus)

S-IDE / SDRAM no yes yes yes Yes

J1-B48 – B67 PCMCIA S-IDE S-IDE S-IDE S-DIE
J1 B68 – B79 PCMCIA SDRAM SDRAM SDRAM SDRAM

Option LAN Yes Yes no no Yes

J1 B100 – B107 Base-T10 n.c. n.c. n.c.
J2 A89 – A90 Base-2 n.c. IrDA-Select. IrDA-Select Audio
J2 A91 – A95 Base-2 Base-T100 n.c. n.c. Base-T100
J1 B107 & B110 LAN-LED Ext.SDRAM Ext.SDRAM Ext.SDRAM Ext.SDRAM

COM3/LCD 24Bit 36Bit 36Bit 36Bit 18Bit

J2 A81 – A88 COM3 LCD D24-31 LCD D24-31 LCD D24-31 n.c.
J2 B40 n.c. LCD D32 LCD D32 LCD D32 n.c.
J2 B43 – B45 n.c. LCD D33-35 LCD D33-35 LCD D33-35 n.c.

USB:
J2 B34 – B35 n.c. USB 0 USB 0 USB 0 USB 0
J2 B81 – B84 n.c. USB 1 USB 1 USB 1 USB 1

Specials / APM
J1 – B80 1.8MHz/ BL0 24MHz 24MHz 24MHz 24MHz
J2 – A96 BL2 n.c. SUS-STAT2 SUS-STAT2 n.c.
J2 – A97 FL_IN 5V-SUS 5V-SUS 5V-SUS 5V-SUS
J2 – A98 LAN0 GPIO0 SUSA# SUSA# n.c.
J2 – A99 LAN1 GPIO1 SUSB# SUSB# n.c.
J2 – A100 LAN2 GPIO2 SUSC# SUSC# SUSC#
J2 – B31 Sus/Resume n.c. PWRBTN# PWRBTN# n.c.
J2 – B33 Sleep Input GPIO4 LID# LID# SLEEP#
J2 – B100 BL1 GPIO3 SUS-STAT1 SUS-STAT1 n.c.
J2 – A80 AC Input PWM SMI# SMI# SMI#
J2 – B98 ROMWR DDA DDA DDA DDA
J2 – B99 ROMRD DDC DDC DDC DDC
J2 B94 – B96 CF n.c. JTAG JTAG. JTAG
J2 – B88 n.c. RES1 RES1 RES1 Audio AC97
J2 B89 – B90 I2C I2C SMB SMB I2C
J2 – A97, B97 FLASH n.c. JTAG JTAG JTAG
J2 – A89 LAN RES2 DEN1 (IrDA**) DEN1 (IrDA**) Audio AC97
J2 – A90 LAN RES3 DEN0 (IrDA**) DEN0 (IrDA**) Audio AC97
J2 – B120 3.3V 2.5V 1.8V 1.3V 2.0V
J1 B110 – B120 Keymatrix - IC-BIOS XD IC-BIOS XD IC-BIOS XD
J2 – A73 n.c. SDRAM_SEL SDRAM_SEL SDRAM_SEL Audio AC97
J2 - A78 n.c. RES4 RES4 PCS0# Audio AC97
*) Only for in-circuit test in the production
**) IrDA mode select of the SMC37C672 (Fast IrDA)

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DIGITAL-LOGIC AG SM480 Integration manual V1.6

4.2.2 Signal lines

Signal or CPU Typ Current Volt Pullup Group Description

Group e [mA] [V]
A0 – A25 E 3o 8 3.3 none corebus addressbus from elan400 for vesa extension
AD0-AD31 P 3 i/o 8 3.3 none PCI not used on the ELAN400, not connected pins
D0 – D32 E 3 i/o 20 3.3 none corebus 32bit databus for dram and vesa extension
MA0- EP 3 o 20 3.3 none dram dram memory address lines for dram extension
MA12
MWE EP 3 o 20 3.3 none dram dram write enable
RAS 0-3 EP 3 o 8 3.3 none dram row adress for dram extension
CASH 0-3 EP 3 o 8 3.3 none dram column adress for dram extension
CASL 0-3 EP 3 o 8 3.3 none dram column adress for dram extension
KB dat/clk EP 5 o 8 5 1k kbd keyboard interface
MS dat/clk EP 5 o 8 5 1k mouse mouse interface
COM E 5o 8 5 none uart COM1 if internal ELAN400 uart is enabled
IrDA E 5o 8 5 none IrDA Infrared datalines of the ELAN400
IRQx EP 5 o 8 5 10k ISA interrupt request lines
DMAx EP 5 o 4 5 none ISA DMA acknowledge
DRQx EP 5 i 5 1k ISA DMA request signals
MEMW EP 3 o 4 3.3 none dram/IS write signal for dram and ISA**
A
MEMR EP 3o 4 3.3 none dram/IS read signal for dram and ISA**
A
IOR, IOW EP 5o 8 5 none ISA I/O control lines for ISA bus
SD0-SD15 EP 5 i/o 8 5 10k ISA ISA datalines
SA0-SA25 EP 5o 8 5 none ISA ISA adresslines
LA17- EP 5o 8 5 none ISA ISA latched adresslines, equal to SA17-SA19***
LA19
BIOS & FLASHDISK control lines
from ELAN400
BIOSC- E 5o 4 5 1k core Chipselect for the BIOS device
Sout must be connected to the BIOSCSin
BIOSCSin E 5i 5 1k core 29F040 biosdevice chipselect
must be connected to the BIOSCSout
FLASHCS E 5o 4 5 1k core Chipselect for the FLASHDISK device
out must be connected to the FLASHCSin
FLASHCSin E 5i 5 1k core 29F016 biosdevice chipselect
must be connected to the FLASHCSout

SLEEP E 5o 4 5 none core/PM Power for peripherals: 1 = sleep / 0 = powered

(B32) ex. MAX211, VGA chip, others, this signal is con-
trolled from the bios powermanagement.
RUN (A33) EP 5o 4 5 none core/PM invers signal of SLEEP: 1= full powered
BLx E 3i 10k core/PM Battery Level sense inputs
SMC37C6XX Super I/O controller
IDExx E 5o 8 5 none ide peripheral control lines
needs 2 x 74HCT245 buffer to control
LPT EP 5 i/o 20 5 10k printer printer data and control lines,
signals pullup resistors only on the controllines
FD signals EP 5 i/o 20 5 1k floppy floppydisk data and control lines
COM1 EP 5 i/o 8 5 none uart COM1 EXT
COM2 EP 5 i/o 8 5 none uart COM2 EXT
IrDA P 5 i/o 5 none IrDA Fast IrDA

33
DIGITAL-LOGIC AG SM480 Integration manual V1.6

Signal or CPU Type Current Volt Pullup Group Description ELAN400

Group [mA] [V]
LAN E 3o 2 5.0 none LAN 10-Base-T and 10-BASE-2 from 91C94/96 SMC
controller, The transformator must be placed ex-
ternally in both interface cases.
LCD EP 3/5 o 8 5.0 none LCD VGA digital signals from the VGA Controller
VGA EP var - 5.0 none VGA CRT output for a VGA Monitor
CF EP 5 i/o 8 5.0 none CF CompactFlash control lines
DDA,DDC EP 3 i/o 2 3.3 none VGA VESA: Digital Display Control
LAN-LED1 E 3i 10 3.3 none LAN ACTIVITY LED (Cathode)
LED-Anode over serial resistor to 3.3V con-
nected.
LAN-LED2 E 3i 10 3.3 none LAN LINK LED (Cathode)
LED-Anode over serial resistor to 3.3V con-
nected.
DX-Bus EP 3 i/o 8 3.3 none PIIX4 Bus for BIOS-Flashdevice (ext/int)
BIOSCS controlls the devices-select.
MEMR- and MEMW- controls the datadirection.

AUDIO G 3 i/o 8 3.3 none GEODE AC97 codec interface

The CPU colon is a hint for which smartModule the signals are refered to:
E = ELAN400
P = PENTIUM
EP = ELAN400 and PENTIUM
G = GEODE

Remarks:
** Must be buffered with 74HCT244 to receive 5V MEMW/MEMR
*** The LA17-LA19 lines are only available to be compatible with ISA busses. On the SMxxPC they are in-
ternally connected to the SA17-SA19 signals.

• Please note, that when 3.3/5 signal are mentioned, that this does not mean that both supplies are
available on one single board.
It is rather meant, that 5V are for the SM486PCX and all new smartModule are 3.3V signals.
Check always the appropriate smartManual for details or ask DLAG if you are uncertain.

34
DIGITAL-LOGIC AG SM480 Integration manual V1.6

4.2.3 LCD interface signaldefinition, only for C&T 69000 / 69030 (not for GEODE)

Pin LCD Mono Mono Mono TFT TFT TFT HR STN STN TFT
480BUS Line SS 8Bit DD 8Bit DD 16Bit 9/12/16Bit 18/24Bit 18/24Bit DD 8Bit DD 36Bit
16Bit

B107 D0 - UD3 UD7 B0 B0 B00 R1 UR0 O-B0

B108 D1 - UD2 UD6 B1 B1 B01 G1 UG0 O-B1
B109 D2 - UD1 UD5 B2 B2 B02 B1 UB0 O-B2
B110 D3 - UD0 UD4 B3 B3 B03 R2 UR1 O-B3
B111 D4 - LD3 UD3 B4 B4 B10 G2 LR0 O-B4
B112 D5 - LD2 UD2 G0 B5 B11 B2 LG0 O-B5
B113 D6 - LD1 UD1 G1 B6 B12 R3 LB0 E-B0
B114 D7 - LD0 UD0 G2 B7 B13 G3 LR1 E-B1

B115 D8 P0 - LD7 G3 G0 G00 B3 UG1 E-B2

B116 D9 P1 - LD6 G4 G1 G01 R4 UB1 E-B3
B117 D10 P2 - LD5 G5 G2 G02 G4 UR2 E-B4
B118 D11 P3 - LD4 R0 G3 G03 B4 UG2 E-B5
A107 D12 P4 - LD3 R1 G4 G10 R5 LG1 O-G0
A108 D13 P5 - LD2 R2 G5 G11 G5 LB1 O-G1
A109 D14 P6 - LD1 R3 G6 G12 B5 LR2 O-G2
A110 D15 P7 - LD0 R4 G7 G13 R6 LG2 O-G3

A111 D16 - - - - R0 R00 - - O-G4

A112 D17 - - - - R1 R01 - - O-G5
A113 D18 - - - - R2 R02 - - E-G0
A114 D19 - - - - R3 R03 - - E-G1
A115 D20 - - - - R4 R10 - - E-G2
A116 D21 - - - - R5 R11 - - E-G3
A117 D22 - - - - R6 R12 - - E-G4
A118 D23 - - - - R7 R13 - - E-G5
-
A81 D24 O-R0
A82 D25 O-R1
A83 D26 O-R2
A84 D27 O-R3
A85 D28 O-R4
A86 D29 O-R5
A87 D30 E-R0
A88 D31 E-R1
B40 D32 E-R2
B43 D33 E-R3
B44 D34 E-R4
B45 D35 E-R5

A106 VS/FLM FRAME S FLM VSYN VSYN VSYN YD YD VS

B106 HS/LP LOAD CP1 CL1 HSYN HSYN HSYN LP LP HS
B105 SHFCLK CP CP2 CL2 CK CK CK XCKL XCK SH-Clk
B119 M DF - M ENAB ENAB - - - M

PANEL Generic LM64P80 LCM-5491 LQ9D011 LQ10D31 LQ10DX0 LM64C03 LM64C0

SHARP SANYO SHARP 1 1 1 8
SHARP SHARP SHARP Sharp

35
DIGITAL-LOGIC AG SM480 Integration manual V1.6

4.2.4 CRT monitor signaldefinition

Pin: Name: Function:

A101 green analog output green
A102 blue analog output blue
A103 red analog output red
B101 gnd analog ground
B102 vsynch vertical synchron signal to the CRT
B103 hsynch horizontal synchron singla to the CRT

4.2.5 Power lines signaldefinition, SM486PCX

Signal or I/O Current Volt [V] Toler- Group Description

Group [mA] ance
VCC i 950 5.0 +/- 5% power Main power supply for CPU and peripheral.
From this supply, the onboard switch mode con-
verter generates the 3.3V supply, available on
the 3.3V out pins.
VCC_SUS i 30mA 5.0V +/- 5% power Main power to supply the 3.3V_SUS plane in the
module. In powermanagement solutions, this
voltage must be ON, even when the main 5V are
switched off.

GND i 0.0 power Ground

3.3V Out o max. 100 3.3 +/- 2% power Output of the 3.3V generator of the module,
used to supply external 3.3V devices

RTC backup i <5 uA 3.0 + 20% power RTC backup supply (3.0V – 3.6V Li-battery).
NOT CHARGEABLE !!!
This supply must be powered anytime, other-
wise the RTC information will be lost.
With the onboard battery option, this pin is not
connected. Do never charge a Lithium battery !
CORE-VCC o max.1mA Core +/-3% power This voltage output is for controlling purposes in
Sense pin the production process only, do not use this pin.

* Normally connected directly to the 3.3V Out power lines.

** May be powered with 3.3V or with 5V supply (depending on the LCD voltage)

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DIGITAL-LOGIC AG SM480 Integration manual V1.6

4.3 Power supply of the smartModule-480Bus

Supply.: Voltage / direction: Current Tolerance and ripple

VCC 5.0V Input 0.1 – 2Amp +-5% / 50mV

VCC_SUSPEND 5.0V Input max. 0.2 Amp +-5% / 50mV
VCC3 3.3V Output max. 1 Amp. +-5% / 50mV
for external DRAM and
PCI-devices
VBAT 3.6V 0.1 – 2µA for RTC-backup

VCC2, VCCCORE 1.1V to 2.0V output for tests only +-5% / 30mV

4.3.1 Connector specifications

The DIGITAL LOGIC AG smartModule- SMxxPC module connectors are surface mount 0.635mm pitch,
240pin connectors.

Parameter: Condition: Specification:

Material: Contact: Beryllium Copper
Housing: Thermoplast Molded
Electrical: Current: 0.5 Amp
Voltage: 100 VAC
Termination Resistance: 20mOhms
Insulation Resistance: 500MOhm
Mechanical: Mating Cycles: 50
Connector Mating Force: 1N per contact
Connector Unmating Force: 0.4N per contact
Pitch: 0.635mm
Number of pins: 240

The manufacturer of the connector is:

Source on SMxxPC module *: Part-Name: Part-Number:
On customers board to hold a SMxxPC
h=5mm
MOLEX 240pin (53475-2409 *)
Alternatives:
h=6mm (PCB-PCB) (53467-2409 *)
h=7mm (PCB-PCB) (53481-2409 *)

SMxxPC connector h=5mm

MOLEX 240pin Mating connector 52760-2409
* Only as a reference.

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DIGITAL-LOGIC AG SM480 Integration manual V1.6

4.3.2 Suspend mode description

Power state SUSSTATx SUSA- SUSB- SUSC-

Normal ON 1 1 1 1
Power On Suspend 0 0 1 1
Suspend to RAM 0 0 0 1
Suspend to disk 0 0 0 0
OFF 0 0 0 0

Suspend events:
- LID
- Power button
- SMI
- Timer

Resume events:
- LID
- Power button
- SMI
- Timer

Signal description:
- SUSA- Control of clock PLL supply (currently not used)
- SUSB- Control of CPU supply, DRAM, RTC, TX
- SUSC- Control of all Vcc exept of the PIIX VCCSUS

4.4 Thermal specifications

Each product will undergo a BurnIn-Test of 10 cycles of 30 min. between the operating temperatures of
–25°C to +70°C or higher if extended ranges are required.

The critical point is to meet the max. Tcase temperature of the CPU.

This temperature is specified by 110°C for the SQFP case. The tables show the allowable ambient tempera-
ture at various airflows and with different heatsink configurations.

CPU: T (case) = 90°C Power consumption:

CPU frequency Air temperature T case T case T case
no Airflow Airflow Airflow
0 m/sec 3 m/sec 6 m/sec
166MHz 70°C
266MHz 60°C

These values have to be definitely defined when having series status. See the appropriate manual.

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DIGITAL-LOGIC AG SM480 Integration manual V1.6

5 PCI ASSIGNMENTS

5.1 Onmodule PCI assignments

Device: ID-select on address IRQ-assignments REQ/GNT-assignments

PIIX4 Southbridge AD_18 PCI: none none

ISA-IRQ’s:
USB, IDE0, IDE1
VGA 69000/030 AD_31 none none
Option LAN 82C559 /ER (AD_29) (PIRQA) (GNT1/REQ1)

5.2 PC/104plus PCI assignments

From the BIOS assigned resources:
Device: ID-select on address IRQ-assignments REQ/GNT-assignments

SLOT1 / MODULE1 AD_20 PIRQA 0

SLOT2 / MODULE2 AD_21 PIRQB 1
SLOT3 / MODULE3 AD_22 PIRQC 2
SLOT4 / MODULE4 AD_23 PIRQD 3

5.3 CompactPCI assignments

From the BIOS assigned resources:
Device: ID-select on address IRQ-assignments REQ/GNT-assignments

PER-SLOT2 AD_31 0
PER-SLOT3 AD_30 1
PER-SLOT4 AD_29 2
PER-SLOT5 AD_28 3
PER-SLOT6 AD_27 4
PER-SLOT7 AD_26 5
PER-SLOT8 AD_25 6

One additional PCI device is allowed on the CompactPCI SystemSlotBoard and uses ID-selects in the range
of AD11 to AD24. Also PCI devices on a segment behind a PCI2PCI bridge uses the ID-Select AD11 to
AD24.

5.4 ATX-board PCI-BUS assignments

From the BIOS assigned resources:
Device: ID-select on address IRQ-assignments REQ/GNT-assignments

PER-SLOT1 AD_ PIRQ-A 0

PER-SLOT2 AD_ PIRQ-B 1
PER-SLOT3 AD_ PIRQ-C 2
PER-SLOT4 AD_ PIRQ-D 3
(not defined yet)

39
DIGITAL-LOGIC AG SM480 Integration manual V1.6

6 DESIGNIN BLOCK SCHEMATICS

ATTENTION:

Very important information for smartModule integrators.

1. The minimum schematics to operate with the smartModule-P5PCX is described further on.
Place on the 5Volt line 10x 100nF capacitors nearest possible at the powerpins.
2. Place on the 5Volt line 4 x 100µF/16V and 2 x 330µF tantal capacitors.
3. Use a separate ground and 5Volt plane in the OEM PCB.
4. If 3.3V DRAM extension are used, integrate a 3.3V powerplane to supply the DRAMs and other 3.3V
parts.
The 3.3V supply may be loaded with max. 300mA.
Place also on the 3.3V plane 5 to 10 x 100nF and 2 x 100µF capacitors, nearest possible to the supply
pins of each components.
Place the DRAMs directly under the smartModule.
5. To meet all EMI/EMC parameters, place on every peripheral line (go to external cables) a ferrite (TDK)
and a 47pF capacitor to ground.
6. All generic pullup resistor should be 10k typ
7. All generic buffers are recommended to be 74HCT245/244 or 74ABT245/244 type.
8. If using SODIMM's, please refer to our overview list, which is also on our CD. Cleaning the contacts on
the SODIMM and the socket with e.g. pure alcohol is highly recommended to may eliminate memory er-
rors.
9. For any questions, we are providing a DesignIn support. Please fill out the form in chapter 1.5 to initialize
a DesignIn support.

40
DIGITAL-LOGIC AG SM480 Integration manual V1.6

6.1 Samples Schematics

SMP5PC- DK and SM486PCX- EK

On the following pages, one will see the schematics for the SMP5PC- (V2.1) and
SM486PCX- development kit .

41
DIGITAL-LOGIC AG SM480 Integration manual V1.6

6.2 Application to use the downloadtool for the external VGA BIOS.

Vcc
smartModule External circuit
(Since SMP5PC V2.2)
DLAG download application
internal f lashdevice
To be defined

XD-BUS
1=disabled D13
DISB
CS¯

Vcc
Vcc

CLK
D
EXT enabled R¯
1 2 3

J88
INT enabled external f lashdevice
74HCT74
Q

XD-B US

NRESDRV
CS¯
P IIX4 BIOSCS BIOSEXT1 1 2
WR
J97 MEMW

Vcc
D11

external f lashdevice
1 2
internal f lashdevice

1 2
WR
SD-B US J98 SMEMW
open = EXT BIOS
closed = INT BIOS

CE¯ CE¯
DISV D12
J95

A16...A19 A16...A19
Vcc

VGAENA 1=disabled 1=disabled

74HCT138 74HCT138
TTL

1 2 3
EXT enabled
INT enabled
J87

designed with GRIDS V1.0.5

42
DIGITAL-LOGIC AG SM480 Integration manual V1.6

6.3 Application for external DRAM (SODIMM 144pins)

signal signal

MD (0...63) Resistor 10- 33Ω MD SDA I2D

MA (0...13) Resistor 10- 33Ω MA SCL I2C

Resistor 10- 33Ω BA0 CKE0 CKE0

Resistor 10- 33Ω BA1 CKE1 CKE1

MWEB- Resistor 10- 33Ω WE- CK0 SCK0

DQM (0...7) Resistor 10- 33Ω DQM CK1 SCK1

GND OE- SCAS SCAS

SCS2- S0 SRAS SRAS
SCS3- S1
SODIMM

signal signal

MA (0...13) Vcc3
SCS (0..3) GND
WEx
DQMB (0...7)
TERMINATIONS
PACDN005

43
DIGITAL-LOGIC AG SM480 Integration manual V1.6

6.4 Application for external IDE’s

smart IDE- IDE- PRIMARY PORT

MASTER SLAVE

PIDE_D (0...15) Resistor 10- 33Ω

PIDE_A (0...2) Resistor 10- 33Ω

PIDE_CS (0...1) Resistor 10- 33Ω

PIDE_IOW Resistor 10- 33Ω

PIDE_IOR Resistor 10- 33Ω

PIDE_INT = IRQ14 Resistor 10- 33Ω

PIDE_DACK Resistor 10- 33Ω

PIDE_DRQ Resistor 10- 33Ω

NC Pin 34 PDIAG
NC Pin 39 PDASP

smart IDE- IDE- SECONDARY

MASTER SLAVE PORT

SIDE_D (0...15) Resistor 10- 33Ω

SIDE_A (0...2) Resistor 10- 33Ω

SIDE_CS (0...1) Resistor 10- 33Ω

SIDE_IOW Resistor 10- 33Ω

SIDE_IOR Resistor 10- 33Ω

SIDE_INT = IRQ15 Resistor 10- 33Ω

SIDE_DACK Resistor 10- 33Ω

SIDE_DRQ Resistor 10- 33Ω

NC Pin 34 PDIAG
NC Pin 39 PDASP

44
DIGITAL-LOGIC AG SM480 Integration manual V1.6

6.5 Application for the ATX power supply

5V= operating mode

0V= suspend mode
VccSUS Vcc

Power supply +5V

SI4425DY External
Vcc devices
FET

VCCSUS

SUSC-

VCC

External
VCC3 Vcc3 devices
(e.g. LAN,
SDRAM, etc)

PWRBTN Power button

LID LID

VBAT Battery

External
3.3V/5V LCD logic
LCD_VCC LCD display

CORE_VCC
Testpoint for
CPU voltages

45
DIGITAL-LOGIC AG SM480 Integration manual V1.6

6.6 Application AC97 CODEC for the SMGXPC

Is now part of the smartModule (optional).

46
 8 7 6 5 4 3 2 1

|LINK RPACK3 RPACK4 R269 VCC -IOR

|a3.sch 1K OPTIONAL -IOR
HDA0 1 16 HDA0R HD0S 8 9 HD0T DISB R550 DISV 1K R551 MEMWX -IOW P1D1 ALL VCC3 ARE 3.3V OUTPUTS
0603 -IOW P1D1
|a5.SCH HDA1 2 15 HDA1R HD1S 7 10 HD1T FOR TEST 1K AEN P1D0
AEN P1D0
HDA2 3 14 HDA2R HD2S 6 11 HD2T WITH MAX. CURRENT OF 1.0Amp
RPACK1 HDWR 4 13 HDWRR HD3S 5 12 HD3T U114 VGA-BIOS U63 CORE-BIOS J14 UTILITY
HD0 1 16 HD0R HDRD 5 12 HDRDR HD4S 4 13 HD4T VCC A1 B1 X6 J15
HD1 HD1R HCS0 HCS0R HD5S HD5T SA0 SD0 SA0 XD0 RESDRV VCC IRQ1 IRQ9 SPK STR1 DCD1
2 15 6 11 3 14 12 A0 D00 13 12 A0 D00 13 A2 RESDRV IRQ9 B2 1 A1 P_STROBE- DCD1 B1
HD2 3 14 HD2R HCS1 7 10 HCS1R HD6S 2 15 HD6T SA1 11 14 SD1 SA1 11 14 XD1 SBHE A3 B3 IRQ3 WDOG AUTO1 A2 B2 DSR1
HD3 HD3R HDRDY HDRDYR HD7S HD7T SA2 A1 D01 SD2 SA2 A1 D01 XD2 MCS16 SBHE- IRQ3 IRQ4 XRESET 2 ERROR1 P_AUTO- DSR1 RXD1
4 13 8 9 1 16 10 A2 D02 15 10 A2 D02 15 A4 MEMCS16- IRQ4 B4 A3 B3
HD4 HD4R SA3 SD3 SA3 XD3 IOC16 IRQ5 3 INIT1 P_ERROR- RXD1 RTS1
5 12 YC24 9 A3 D03 17 9 A3 D03 17 A5 IOCS16- IRQ5 B5 VCC A4 B4
HD5 HD5R SA4 SD4 SA4 XD4 -IOW IRQ6 KBDAT 4 SLCTIN1 P_INIT- RTS1 TXD1
6 11 8X33 8X33 8 18 8 18 A6 B6 A5 B5
HD6 HD6R SA5 A4 D04 SD5 SA5 A4 D04 XD5 -IOR IOW- IRQ6 IRQ7 KBCLK 5 P1D0 P_SLCTIN- TXD1 CTS1
7 10 RPACK6 RPACK5 7 19 7 19 A7 B7 A6 B6
HD7 HD7R HDA0S HDA0T HD8S HD8T SA6 A5 D05 SD6 SA6 A5 D05 XD6 SYSCLK IOR- IRQ7 IRQ10 6 P1D1 P_DATA0 CTS1 DTR1
8 9 1 16 1 16 6 A6 D06 20 6 A6 D06 20 A8 SYSCLK IRQ10 B8 GND A7 B7
HDA1S HDA1T HD9S HD9T SA7 SD7 SA7 XD7 TC IRQ11 7 P1D2 P_DATA1 DTR1 RI1
YC24 2 15 2 15 5 A7 D07 21 5 A7 D07 21 A9 TC IRQ11 B9 VCCBB A8 B8
HDA2S HDA2T HD10S HD10T SA8 SA8 BALE IRQ12 MSCLK 8 P1D3 P_DATA2 RI1 DCD2
8X33 3 14 3 14 27 27 A10 B10 A9 B9
HDWRS HDWRT HD11S HD11T SA9 A8 SA9 A8 SD7 BALE IRQ12 IRQ14 MSDAT 9 P1D4 P_DATA3 DCD2 DSR2
RPACK2 4 13 4 13 26 26 A11 B11 A10 B10
HD8 HD8R HDRDS HDRDT HD12S HD12T SA10 A9 SA10 A9 SD6 SD7 IRQ14 IRQ15 10 P1D5 P_DATA4 DSR2 RXD2
1 16 5 12 5 12 23 A10 23 A10 A12 SD6 IRQ15 B12 A11 P_DATA5 RXD2 B11
HD9 2 15 HD9R HCS0S 6 11 HCS0T HD13S 6 11 HD13T SA11 25 SA11 25 DOWNLOAD SD5 A13 B13 BIOSDIS CON10 P1D6 A12 B12 RTS2
HD10 HD10R HCS1S HCS1T HD14S HD14T SA12 A11 SA12 A11 SD4 SD5 COREBIOS_DIS VBIOSDIS P1D7 P_DATA6 RTS2 TXD2
3 14 7 10 7 YC24 10 4 4 A14 B14 5X2HEAD A13 B13
HD11 HD11R HDRDYS HDRDYT HD15S HD15T SA13 A12 SMEW SA13 A12 MEMWX SD3 SD4 VGABIOS_DIS LA21 ACK1 P_DATA7 TXD2 CTS2
4 13 8 9 8 9 28 A13 WE 31 28 A13 WE 31 A15 SD3 SA21 B15 A14 P_ACK CTS2 B14
D HD12 HD12R SA14 SMEMR SA14 MEMR SD2 LA20 BUSY1 DTR2 D
5 12 YC24 YC24 29 A14 OE 24 29 A14 OE 24 A16 SD2 SA20 B16 A15 P_BUSY DTR2 B15
HD13 6 11 HD13R 8X33 8X33 SA15 3 22 VGAEX SA15 3 22 BIOSEX SD1 A17 B17 LA19 PE1 A16 B16 RI2
HD14 HD14R SA16 A15 CE SA16 A15 CE SD0 SD1 LA19 LA18 SCLT1 P_PE RI2 INDEX
7 10 CFLASH IDE-SEC 2 A16 2 A16 A18 SD0 LA18 B18 A17 P_SELECT F_INDEX B17
HD15 8 9 HD15R X1 X17 SA17 30 32 VCC SA17 30 32 VCC IOCHRDY A19 B19 LA17 KBDAT A18 B18 DRV1
NRESDRV SA18 A17 VCC SA18 A17 VCC AEN IOCHRDY LA17 SD8 KBCLK KEY_DATA F_DRV1 DSKCHG
YC24 GND 1 GND 1 1 VPP/A18 1 VPP/A18 A20 AEN SD8 B20 A19 KEY_CLOCK F_CHNG B19
8X33 IDE-PRIM HD3R 2 16 GND 16 GND SA19 A21 B21 SD9 MSCLK A20 B20 MTR1
HD4R D3 HD7T 2 GND GND SA18 SA19 SD9 SD10 MSDAT MS_CLOCK F_MOT1 DIR
X8 3 J98 A22 B22 A21 B21
NRESDRV HD5R D4 HD8T 3 SMEW SA17 SA18 SD10 SD11 MS_DATA F_DIR STEP
4 29F040 29F040 A23 B23 GND A22 B22
1 HD6R D5 HD6T 4 SMEMW 1 SA16 SA17 SD11 SD12 HD0 GND F_SETP WDATA
X7 5 PLCC32R PLCC32R A24 B24 A23 B23
HD7R 2 HD7R D6 HD9T 5 2 SA15 SA16 SD12 SD13 HD1 PIDE_D0 F_WDATA WGATE
GND 6 U111 WR_ENA A25 B25 A24 B24
1 HD8R 3 HCS0R D7 HD5T 6 SA16 SA14 SA15 SD13 SD14 HD2 PIDE_D1 F_WGATE TRK0
VCCSUS 7 1 15 CON2 D11 A26 B26 FLOPPY A25 B25
2 HD6R 4 CS0 HD10T 7 SA17 A Y0 JUMPER2 SA13 SA14 SD14 SD15 HD3 PIDE_D2 F_TRK00 WRPT
8 2 14 1 2 DISB WR_ENA A27 B27 A26 B26
3 HD9R 5 (A10) HD4T 8 SA18 B Y1 SA12 SA13 SD15 DRQ0 HD4 PIDE_D3 F_WP RDATA
+12V GND 9 3 13 1206 J97 A28 B28 SELECT A27 B27
RX5V 4 HD5R 6 ATA/OE HD11T 9 C Y2 MEMWX SA11 SA12 DRQ0 DRQ1 HD5 PIDE_D4 F_RDATA HDSEL
10 12 1N4148 A29 B29 A28 B28
TX5V 5 HD10R 7 (A9) HD3T 10 Y3 VGAEX MEMW 1 SA10 SA11 DRQ1 DRQ2 HD6 PIDE_D5 F_HEAD DRV0
DIGITAL-LOGIC AG

11 11 D12 A30 B30 J11 A29 B29

6 HD4R 8 (A8) HD12T 11 SA19 Y4 INTERNBIO 2 SA9 SA10 DRQ2 DRQ3 DRV1 HD7 PIDE_D6 F_DRV0 MTR0
GND 12 6 10 1 2 DISV A31 B31 A30 B30
7 HD11R 9 (A7) HD2T 12 AEN G1 Y5 SA8 SA9 DRQ3 DRQ5 DRVSEL 1 HD8 PIDE_D7 F_MOT0 PWRBTN
VCCSUS VCC 13 4 9 1206 CON2 A32 B32 A31 B31 PWRBTN
8 HD3R 10 VCC HD13T 13 DISV G2A Y6 JUMPER2 SA7 SA8 DRQ5 DRQ6 DRV0 2 HD9 PIDE_D8 RESU/PWBTN# NRESDRV
14 5 7 1N4148 A33 B33 A32 B32
HD12R 11 (A6) HD1T 14 G2B Y7 SA6 SA7 DRQ6 OSC 3 HD10 PIDE_D9 IDE_RESET- LID
CON8 15 INT A34 B34 A33 B33 LID
4X2HEAD HD2R 12 (A5) HD14T 15 SA5 SA6 OSC 14M HD11 PIDE_D10 SLEEP/LID# U_P0+
16 74HCT138 J95 J87 J88 A35 B35 -DACK0 CON3 A34 B34
HD13R 13 (A4) HD0T 16 16SOP150 VBIOSDIS BIOSDIS SA4 SA5 DACK0- HD12 PIDE_D11 USB_P0+ U_P0-
17 LPT A36 B36 -DACK1 A35 B35
VCC HD1R 14 HDA2R (A3) HD15T 17 1 1 EXT 1 EXT SA3 SA4 DACK1- HD13 PIDE_D12 USB_P0-
POWER 18 X5 VCC VCC VCC A37 B37 -DACK2 J12 A36 B36 HDA0
HD14R 15 HDA1R A2 18 SCLT1 2 DISV 2 INT DISB 2 INT SA2 SA3 DACK2- MTR1 HD14 PIDE_D13 PIDE_A0
19 GND 13 A38 B38 -DACK3 A37 B37 HDA1
HD0R 16 HDA0R A1 19 3 3 SA1 SA2 DACK3- MOTON 1 HD15 PIDE_D14 PIDE_A1
INPUT 20 25 GND CON2 A39 B39 -DACK5 A38 B38 HDA2
HD15R 17 HD0R A0 HDRQS 20 PE1 JUMPER2 SA0 SA1 DACK5- MTR0 2 HCS0 PIDE_D15 PIDE_A2 HDRDY
21 12 CON3 CON3 A40 B40 -DACK6 A39 B39
R251 18 HD1R D0 21 DQMB0 SA0 DACK6- SPKR 3 HCS1 PIDE_CS0- IDE_RDY P32
GND 22 GND 24 GND JUMPER3 JUMPER3 A41 B41 A40 B40 P32
470K 19 HD2R D1 HDWRT 22 BUSY1 DQMB1 CAS0-/DQM0 SPEAKER 0WS HDACK PIDE_CS1- LCD_D32 TX5V
23 11 U112A A42 B42 CON3 A41 B41 TX5V
0603 HDRQ 20 D2 23 DISB VGABIOS COREBIOS DQMB2 CAS1-/DQM1 ZWS- REF HDRQ PIDE_DACK- IR_TX RX5V
24 GND 23 GND 1 A43 B43 A42 B42 RX5V
UOC1 21 IO16 HDRDT 24 ACK1 BIOSEX DQMB3 CAS2-/DQM2 REF- MEMR HDIRQ PIDE_DRQ IR_RX P33
GND 25 10 3 A44 B44 A43 B43 P33
0603 HDWRR 22 CD2 25 BIOSEX1 BIOSDIS DQMB4 CAS3-/DQM3 MEMR- SMEMR HDRD PIDE_IRQ LCD_P33 P34
26 GND 22 2 A45 B45 A44 B44 P34
R250 23 HD11R CD1 HDRDYT 26 P1D7 DQMB5 CAS4-/DQM4 SMEMR- MEMW HDWR PIDE_IOR- LCD_P34 P35
GND 27 9 14SOP150 D13 A46 B46 A45 B45 P35
560K HDRDR 24 HD12R D11 27 VCC DQMB6 CAS5-/DQM5 MEMW- SMEMW PIDE_IOW- LCD_P35
28 21 74HCT32 1 2 A47 B47 VCC A46 B46 VCCB
VCC 25 HD13R D12 HDACKS 28 P1D6 DQMB7 CAS6-/DQM6 SMEMW- HD0S A_D0 VCC BATTERY_IN A_D16
GND 29 8 U113A 1206 A48 B48 A47 B47 A_D16
HDRDYR 26 HD14R D13 29 MD0 CAS7-/DQM7 SIDE_D0 HD1S A_D0 A_D1 PCI_AD0 PCI_AD16 A_D17
30 GND 20 1N4148 J80 A49 B49 A48 B48 A_D17
27 HD15R D14 HDIRQS 30 P1D5 DISB BIOSDI MD1 MD0 SIDE_D1 HD2S A_D1 A_D2 PCI_AD1 PCI_AD17 A_D18
31 7 1 2 A50 B50 A_D2 A49 B49 A_D18
HDACK 28 HCS1R D15 HDIOC16 31 1 MD2 MD1 SIDE_D2 HD3S A_D3 PCI_AD2 PCI_AD18 A_D19
32 19 33 R217SPK A51 B51 A50 B50 A_D19
R249 29 CS1 HDA1T 32 P1D4 2 MD3 MD2 SIDE_D3 HD4S A_D3 A_D4 PCI_AD3 PCI_AD19 A_D20
GND 33 6 14SOP150 A52 B52 A_D4 A51 B51 A_D20
470K HDIRQ 30 HDRDR VS1 PDIAGS 33 MD4 MD3 SIDE_D4 HD5S A_D5 PCI_AD4 PCI_AD20 A_D21
34 18 74HCT04 STAR-7DQMB-111P A53 B53 A52 B52 A_D21
0603 HDIOC16 31 HDWRR IORD HDA0T 34 P1D3 MD5 MD4 SIDE_D5 HD6S A_D5 A_D6 PCI_AD5 PCI_AD21 A_D22
35 5 U113B SPEAKER A54 B54 A53 B53 A_D22
UOC0 HDA1R 32 IOWR HDA2T 35 SLCTIN1 MD6 MD5 SIDE_D6 HD7S A_D6 A_D7 PCI_AD6 PCI_AD22 A_D23
VCC 36 17 A55 B55 A_D7 A54 B54 A_D23
PDIAG 33 HDIRQ (WE) HCS0T 36 P1D2 DISV VBIOSDIS MD7 MD6 SIDE_D7 HD8S A_D8 PCI_AD7 PCI_AD23 A_D24
37 4 3 4 R5 A56 B56 A55 B55 A_D24
R248 HDA0R 34 IRQ HCS1T 37 INIT1 SPKR 1K Q1 MD7 SIDE_D8 HD9S A_D8 A_D9 PCI_AD8 PCI_AD24 A_D25
C VCC 38 16 GND A57 B57 A_D9 A56 B56 A_D25 C
560K HDA2R 35 CARDS VCC DASP-S 38 P1D1 NPNSOT MD32 GND SIDE_D9 HD10S A_D10 PCI_AD9 PCI_AD25 A_D26
39 3 14SOP150 A58 B58 A_D10 A57 B57 A_D26
0603 HCS0R 36 CSEL 39 ERROR1 VCC SOT23 MD33 MD8 SIDE_D10 HD11S A_D11 PCI_AD10 PCI_AD26 A_D27
40 GND 15 74HCT04 R552 A59 B59 A58 B58 A_D27
HCS1R 37 NRESDRV VS2 40 P1D0 SMEW MD34 MD9 SIDE_D11 HD12S A_D11 A_D12 PCI_AD11 PCI_AD27 A_D28
41 2 0603 A60 B60 A_D12 A59 B59 A_D28
DASP- 38 HDRDYR RESET- VCC 41 AUTO1 MD35 MD10 SIDE_D12 HD13S A_D13 PCI_AD12 PCI_AD28 A_D29
42 14 1K A61 B61 A_D13 A60 B60 A_D29
VCC 39 IORDY 42 STR1 MD36 MD11 SIDE_D13 HD14S A_D14 PCI_AD13 PCI_AD29 A_D30
GND 43 GND 1 A62 B62 A_D14 A61 B61 A_D30
40 INPACK- 43 MD37 MD12 SIDE_D14 HD15S A_D15 PCI_AD14 PCI_AD30 A_D31
L11 VCC 44 A63 B63 A62 B62 A_D31
VCCHD 41 DASP- (REG) 44 GND GND MD38 MD13 SIDE_D15 HCS0S A_D15 C_BE0- PCI_AD15 PCI_AD31 PIRQA-
45 DB25 OPTIONAL A64 B64 A63 B63 PIRQA-
42 PDIAG DASP- MD39 MD14 SIDE_CS0- HCS1S C_BE0- C_BE1- PCI_CBE0 PCI_INTA PIRQB-
GND 46 IDE44 DB25F A65 B65 A64 B64 PIRQB-
43 HD8R PDIAG- MD15 SIDE_CS1- HDRDS C_BE1- C_BE2- PCI_CBE1 PCI_INTB PIRQC-
15uH 47 EXT-SDRAM GND A66 B66 A65 B65 PIRQC-
IND5 44 HD9R D8 GND MD8 GND SIDE_IOR- HDWRS C_BE2- C_BE3- PCI_CBE2 PCI_INTC PIRQD-
48 D9 A67 MD16 SIDE_IOW- B67 C_BE3- A66 PCI_CBE3 PCI_INTD B66 PIRQD-
C112 IDE44 HD10R 49 GND 2.SOCKET MD9 A68 B68 VCC A67 B67 VCC
100nF D10 C118 C117 MD10 MD17 SD_CLK2 CKE0 PCI_CLK0 VCC VCC PCI_CLK1
GND 50 GND
USB A69 MD18 SD_CKE0 B69 PCI_CLK0 A68 PCI_CLK0 PCI_CLK1 B68 PCI_CLK1
47pF 47pF MD11 A70 B70 CKE1 REQ0- A69 B69 GNT0-
0603 0603 MD19 SD_CKE1 REQ0- PCI_REQ0 PCI_GNT0 GNT0-
J86 GND U108 MD12 A71 B71 REQ1- A70 B70 GNT1-
MD20 SD_CASA REQ1- PCI_REQ1 PCI_GNT1 GNT1-
J85 COMPCARD GND C116 GND MD13 A72 B72 SCAS REQ2- A71 B71 GNT2-
1 CLOSE=486 47pF MD21 SD_CASB REQ2- PCI_REQ2 PCI_GNT2 GNT2-
HDIOC16 COMPCARD X12 C115 X13 23 DQMB0 MD14 A73 B73 REQ3- A72 B72 GNT3-
2 1 OPEN=P5 0603 47pF CAS0/DQMB0 MD22 SD_RASA REQ3- PCI_REQ3 PCI_GNT3 GNT3-
IOC16 R243 R247 25 DQMB2 MD15 A74 B74 SRAS RES5 A73 B73 VCC
2 VCC 4 0603
U_P0+ 4 U_P1+ MD0 CAS1/DQMB1 DQMB3 MA0 MD23 SD_RASB RES5 FRAME- RES5 VCC IRDY-
CON2 J82 3 115 A75 B75 A74 B74 IRDY-
JUMPER2 MMC 3 0603 3 0603 MD1 DQ0 CAS2/DQMB2 DQMB4 MA1 MA0 RAS4(TX) FRAME- TRDY- PCI_FRAME- PCI_IRDY STOP-
CON2

47
33 5 117 A76 B76 TRDY- A75 B75 STOP-
JUMPER2 CARDS 1 MASTER 2 U_P0- 2 U_P1- MD2 DQ1 CAS3/DQMB3 DQMB1 MA2 MA1 RAS5(TX) MA13 DEVSEL- PCI_TRDY PCI_STOP PAR
33 7 24 A77 B77 A76 B76 PAR
VCC 2 SLAVE 1 1 MD3 DQ2 CAS4/DQMB4 DQMB6 MA3 MA2 MA13 SCK0 DEVSEL- SERR- PCI_DEVSEL PCI_PAR LOCK
U113C 9 26 A78 B78 A77 B77 LOCK
3 MD4 DQ3 CAS5/DQMB5 DQMB7 MA4 MA3 SD_CLK0 SCK1 SERR- RES4 PCI_SERR PCI_LOCK PCIRST-
CON4 R242 CON4 R246 13 116 A79 B79 A78 B78 PCIRST-
1K 1K MD5 DQ4 CAS6/DQMB6 DQMB5 MA5 MA4 SD_CLK1 RES4 XRESET RES4 PCI_RESET DRQ7
5 6 CON3 4SIP100 4SIP100 15 118 A80 B80 A79 B79
JUMPER3 0603 0603 MD6 DQ5 CAS7/DQMB7 MA6 MA5 (1.8M)24M RES6 RESET_IN DRQ7 -DACK7
R554 R555 17 DQ6 A81 MA6 GND B81 GND RES6 A80 B80
NSETINT MD7 MA7 MD40 P24 RES6/SMI/AC DACK7 U_P1+
14SOP150 33 33 19 A82 B82 A81 B81
C144 R240 R241 R244 DQ7 MA0 MA8 MA7 MD48 MD41 P24 P25 LCD_D24/CD3 USB_P1+ U_P1-
74HCT04 29 A83 B83 A82 B82
1K SETINT 47pF VCC 22K 22K VCC 22K MD8 A0 MA1 MA9 MA8 MD49 MD42 P25 P26 LCD_D25/DS3 USB_P1- UOC0
R30 37 31 A84 B84 A83 B83
DASP- HDLED 0603 0603 0603 0603 MD9 DQ8 A1 MA2 MA10 MA9 MD50 MD43 P26 P27 LCD_D26/RX3 USB_OC0 UOC1
HDLED R553 L12 L13 39 33 A85 B85 A84 B84
MD10 DQ9 A2 MA3 MA11 MA10 MD51 MD44 P27 P28 LCD_D27/RT3 USB_OC1 LA22
1 2 1 2 41 DQ10 A3 30 A86 MA11 MD52 B86 P28 A85 B85
GND C145 MD11 MA4 MA12 MD45 P29 LCD_D28/TX3 S/LA22 LA23
1 43 32 A87 B87 A86 B86
47pF R245 MD12 DQ11 A4 MA5 MA12 MD53 MD46 P29 P30 LCD_D29/CT3 S/LA23 PERR-
J2 FB FB 47 34 GND A88 B88 A87 B87 PERR-
MOLEX26 FLOPPY 1206 GND GND 0603 1206 GND 22K MD13 DQ12 A5 MA6 MD16 GND MD54 MD47 P30 P31 LCD_D30/DT3 PERR- RES1
GND GND 49 103 A89 B89 P31 A88 B88 RES1
RESDRV B1 C0 SBHE VCC 0603 MD14 DQ13 A6 MA7 MD17 MD24 MD55 RES2 LCD_D31/RI3 RES1 I2D
X4 51 104 A90 B90 GND A89 B89
B2 C1 LA23 GND MD15 DQ14 A7 MA8 MD18 MD25 GND MD48 RES2 RES3 RES2 I2C_D I2C
VCC VCC 53 105 A91 B91 RES3 A90 B90
IRQ9 B3 C2 LA22 1 INDEX DQ15 A8 MA9 MD19 MD26 MD56 MD49 RES3 I2C_C
109 A92 B92 VCC3 A91 B91 VCC3
B4 C3 LA21 2 MD16 A9 MA10 MD20 MD27 MD57 MD50 INT_LTX+ 3.3V 3.3V MASTER#
VCC 83 111 A93 B93 INT_LTX+ A92 B92
DRQ2 B5 C4 LA20 3 DRVSEL INTERNBIO GND MD17 DQ16 A10 BA0 MD21 MD28 MD58 MD51 INT_LTX- LAN_TX+ MASTER- IOCHK#
U115A 85 106 A94 B94 A93 B93

4
B6 C5 LA19 4 MD18 DQ17 A11/BA0 BA1 MD22 MD29 MD59 MD52 INT_LTX- INT_LRX+ LAN_TX- IOCHK TCK
VCC 87 110 A95 B95 INT_LRX+ A94 B94
0WS B7 C6 LA18 5 DSKCHG MD19 DQ18 A12/BA1 MA13 MD23 MD30 MD60 MD53 INT_LRX- LAN_RX+ (DASP)TCK TDI
2 5 89 112 A96 B96 INT_LRX- A95 B95
B8 C7 6 D Q DQ19 NC/A13 MD31 MD61 LAN_RX- (DIAG)TDI

PR
+12V LA17 MD20 93 70 MA12 GND A97 B97 MD54 SSTAT2 A96 B96 TDO
B9 C8 MEMR 7 C21 MD21 DQ20 NC/A12 MA13 MD24 GND MD62 MD55 SSTAT2 VCCSUS SSTAT2 (SEL)TDO TMS
3 470nF 95 72 A98 B98 VCCSUS A97 B97
SMEMW B10 C9 MEMW 8 CLK VCC MD22 DQ21 NC/A13 MD25 MD32 MD63 LAN0 VCC_SUS TMS VDDA
B 97 A99 B99 GND A98 B98 B
B11 C10 9 DQ22 MD33 GND LAN0 SUSA(LAN0) VESA-DDA VDDA
SMEMR SD8 MOTON 6 J24 MD23 99 73 GND MD26 A100 B100 HDACKS LAN1 A99 B99 VDDC
VDDC

CL
-IOW B12 C11 SD9 10 C152 Q C20 MSDAT DQ23 OE# MD27 MD34 SIDE_DACK- LAN1 SUSC- SUSB(LAN1) VESA-DDC SSTAT1
A101 B101 HDRQS SUSC- A100 B100 SSTAT1
-IOR B13 C12 SD10 11 DIR CER22uF 74HCT74 470nF 1 MD24 WEB MD28 MD35 SIDE_DRQ VGAG SUSC(LAN2) SSTAT1
GND 121 67 A102 B102 HDIRQS VGAG A101 B101 AGND
B14 C13 12 14SOP150 2 DQ24 WE# MD36 SIDE_IRQ VGA_GREEN VGA_GND

1
-DACK3 SD11 1206 MD25 123 57 MD29 A103 B103 HDRDYS VGAB A102 B102 VGAV
B15 C14 13 GND 3 DQ25 DLAG_S3# MD37 SIDE_IORDY- VGAB VGA_BLUE VGA_VSY VGAV
DRQ3 SD12 STEP GND U20 MD26 125 58 MD30 A104 B104 HDA0S VGAR A103 B103 VGAH

11
13
12
14
B16 C15 14 VCC 4 DQ26 DLAG_S2# MD38 SIDE_A0 VGAR VGA_RED VGA_HSY VGAH
-DACK1 SD13 GND NRESDRV MSCLK MD27 127 71 SCS3 MD31 A105 B105 HDA1S ENAVEE A104 B104 ENAVDD
B17 C16 15 5 DQ27 NC/S1# MD39 SIDE_A1 ENAVEE LCDVEEENA LCDVDDENA ENAVDD
DRQ1 SD14 WDATA GND MD28 131 69 SCS2 GND A106 B106 HDA2S GND A105 B105 SHFCLK
B18 C17 16 6 DQ28 RAS0#/S0# GND SIDE_A2 GND LCD_SHFCLK SHFCLK

V+
REF SD15 RESET-FF MD29 MD56 BA0 FLM LP

C1-
133 A107 B107 A106 B106

C1+
GND LP

VCC
SYSCLK B19 C18 17 WGATE WITH POWERON TXD2 TXDV2 MD30 DQ29 SRAS MD57 MD40 SD_BA0- WDOG FLM P12 LCD_FLM LCD_LP P0
7 2 CON6 135 65 A108 B108 A107 B107 P0
IRQ7 B20 C19 18 RTS2 TI1 TO1 RTSV2 MD31 DQ30 NC/RAS# SCAS MD58 MD41 WDOG_STROBE P12 P13 LCD_D12 LCD_D0 P1
GND 6 3 PS2CON 137 66 A109 B109 A108 B108 P1
IRQ6 B21 19 TRK0 DTR2 TI2 TO2 DTRV2 DQ31 NC/CAS# MD59 MD42 WDOG_ENABLE BA1 P13 P14 LCD_D13 LCD_D1 P2
20 1 A110 B110 P14 A109 B109 P2
IRQ5 B22 20 TI3 TO3 MD32 CKE0 MD60 MD43 (MKLED)SD_BA1- P15 LCD_D14 LCD_D2 P3
GND 21 28 4 62 A111 B111 XD0 P15 A110 B110 P3
IRQ4 B23 21 WRPT RXD2 TI4 TO4 RXDV2 MD33 DQ32 NC/CKE0 CKE1 MD61 MD44 XD0 P16 LCD_D15 LCD_D3 P4
8 9 MOUSE 6 68 A112 B112 XD1 P16 A111 B111 P4
IRQ3 B24 22 CTS2 RO1 RI1 CTSV2 MD34 DQ33 NC/CKE1 MD62 MD45 XD1 P17 LCD_D16 LCD_D4 P5
GND 5 4 8 A113 B113 XD2 P17 A112 B112 P5
-DACK2 B25 23 RDATA DSR2 RO2 RI2 DSRV2 MD35 DQ34 SCK0 MD63 MD46 XD2 P18 LCD_D17 LCD_D5 P6
26 27 10 61 A114 B114 XD3 P18 A113 B113 P6
TC B26 24 DCD2 RO3 RI3 DCDV2 MD36 DQ35 NC/CK0 SCK1 MD47 XD3 P19 LCD_D18 LCD_D6 P7
GND 22 23 14 74 A115 B115 XD4 P19 A114 B114 P7
BALE B27 25 HDSEL RI2 RO4 RI4 RIV2 MD37 DQ36 NC/CK1 RAS0-/S0 XD4 P20 LCD_D19 LCD_D7 P8
19 18 16 A116 B116 XD5 P20 A115 B115 P8
B28 26 RO5 RI5 MD38 DQ37 SCS2 RAS1-/S1 XD5 P21 LCD_D20 LCD_D8 P9
VCC 18 A117 B117 XD6 A116 B116 P9

GND
EN
V-
SD
C2+
C2-
OSC B29 MD39 DQ38 I2D SCS3 RAS2-/S2 XD6 P21 P22 LCD_D21 LCD_D9 P10
CON26 20 141 A118 B118 XD7 A117 B117 P10
B30 MAX211 DQ39 SDA I2C RAS3-/S3 XD7 P22 P23 LCD_D22 LCD_D10 P11
GND R270 KEYBOARD 142 A119 B119 BIOSEX1 A118 B118 P11
B31 SCL MWEA- (WRMK)BIOSCS- P23 LCD_D23 LCD_D11

10
24
17
25
15
16
GND DASP-S HDLED2 SSOP28 MD40 38 WEB A120 B120 ENABKL A119 B119 M
B32 HDLED2 DQ40 MWEB- (RDMK)VCC ENABKL LCDBKLENA LCD_M M
COM2 J23 MD41 40 64 VCC3 VCC A120 B120
IOCHK# KBDAT MD42 DQ41 3.3V LCD_SUPPLY LCD_VCC CORE_VCC
GND X2 1 42 11 VCC3
SD7 A1 D0 MCS16 DCDV2 GND C18 1 MD43 DQ42 3.3V OUTPUT
22K R45 GND 44 27 VCC3 S480A S480B TP10
SD6 A2 D1 IOC16 1 DSRV2 470nF 2 MD44 DQ43 3.3V ONLY FOR EXT.SDRAM OPTION OF 3.3V CON240X0635S CPU-CORE
GND 48 45 VCC3 CON240X0635S 1
SD5 A3 D2 IRQ10 2 RXDV2 C19 3 MD45 DQ44 3.3V X VOLTAGE
VCC 50 63 VCC3 U109 U110
SD4 A4 D3 IRQ11 3 RTSV2 470nF KBCLK 4 MD46 DQ45 3.3V DQMB0 MA0
52 12 VCC3 24 VCC3 2 24 VCC3 TP TP
A5 D4 4 5 DQ46 3.3V
2 D0 VDD D0 VDD
SD3 IRQ12 TXDV2 GND MD47 54 28 VCC3 DQMB1 19 VCC3 MA1 3 19 VCC3 TESTOUTPUT
A6 D5 5 6 DQ47 3.3V
3 D1 VDD D1 VDD
SD2 IRQ15 CTSV2 GND 46 VCC3 DQMB2 12 VCC3 MA2 4 12 VCC3
SD1 A7 D6 IRQ14 6 DTRV2 C17 MD48 3.3V DQMB3
4 D2 VDD MA3 D2 VDD
470nF CON6 84 81 VCC3 5
A8 D7 7 DQ48 3.3V
5 D3 D3
SD0 -DACK0 RIV2 VCC PS2CON MD49 86 82 VCC3 DQMB4 MA4 7 X18
A9 D8 8 DQ49 3.3V
7 D4 D4
IOCHRDY DRQ0 GND J84 MD50 88 101 VCC3 SA25 SD15 DQMB5 MA5 8 TCK
A10 D9 9 DQ50 3.3V
8 D5 D5 1
AEN -DACK5 SSTAT1 C16 X15 MD51 90 102 VCC3 SA24 SD14 DQMB6 MA6 9 GND
A11 D10 10 1 DQ51 3.3V
9 D6 D6 2
SA19 DRQ5 5X2HEAD 470nF SSTAT1 MD52 94 113 SA23 SD13 DQMB7 MA7 10 TDO
A12 D11 GND 2 1 DQ52 3.3V VCC3 10 D7 D7 3
SA18 -DACK6 CON10 SSTAT2 SSTAT2 MD53 96 114 VCC3 SA22 SD12 MA8 11 VCCSUS
A13 D12 3 2 DQ53 3.3V
11 D8 D8
SA17 DRQ6 LID MD54 SA21 SD11 MA9 TMS 4
U19 98 129 14

11
13
12
14
A14 D13 3 DQ54 3.3V VCC3 14 D9 D9 5
SA16 -DACK7 CON3 PWRBTN MD55 100 130 VCC3 SA20 SD10 SRAS MA10 15
A15 D14 4 DQ55 3.3V
15 D10 D10
SA15 DRQ7 JUMPER3 LAN0 SA19 SD9 SCAS MA11 XRESET 6
143 VCC3 16
A16 D15 5 3.3V
16 D11 D11 7

V+
SA14 LAN1 MD56 SA18 SD8 MA12

C1-
COM1 122 144 17

C1+
VCC VCC3

VCC
A17 D16 6 DQ56 3.3V
17 D12 D12
SA13 MASTER# TXD1 TXDV1 LAN2 MD57 SA17 SD7 MA13 TDI 8
X3 7 2 124 120 GND 18
A18 D17 TI1 TO1 7 DQ57 GND
18 D13 D13
SA12 DCDV1 RTS1 RTSV1 MD58 SA16 SD6 SCS3 BA0 9
GND 10 1 6 3 126 1 GND 20 GND
A19 D18 TI2 TO2 8 DQ58 GND
20 D14 D14
A SA11 DSRV1 DTR1 DTRV1 MD59 SA15 SD5 SCS2 BA1 10 A
GND 11 6 20 1 128 2 GND 13 GND 21 13 GND
A20 D19 TI3 TO3 DQ59 GND
21 D15
SA10 RXDV1 MD60 SA14 SD4 GND WEB D15 GND
2 21 28 CON8 132 21 GND 6 GND 22 6 GND 5X2_HEADER
A21 TI4 TO4 DQ60 GND
22 D16 GND D16 GND
SA9 7 RTSV1 RXD1 8 9 RXDV1 4X2HEAD MD61 134 22 GND SA13 SD3 1 GND 23 1 GND 5X2HEAD
A22 RO1 RI1 DQ61 GND
23 D17 GND D17 GND
SA8 3 TXDV1 CTS1 5 4 CTSV1 MD62 136 35 GND SA12 SD2
SA7 A23 CTSV1 DSR1 RO2 RI2 DSRV1 MD63 DQ62 GND SA11 SD1
GND 8 26 27 138 36 GND PACDN005 PACDN005
SA6 A24 E1 DTRV1 DCD1 RO3 RI3 DCDV1 DQ63 GND SA10 SD0
GND 4 22 23 PWM 55 GND SSOP24QSC SSOP24QSC JTAG
SA5 A25 E2 RIV1 RI1 RO4 RI4 RIV1 GND SA9
GND 9 19 18 56 GND
SA4 A26 E3 RO5 RI5 GND SA8
GND 5 GND 75 GND J90 DIGITAL-LOGIC AG

GND
EN
V-
SD
C2+
C2-
SA3 A27 E4 GND SA7 MA11 BA0
76 GND
SA2 A28 EMI/EMC VCC MAX211 BIOSCS GND SA6
DB9M BIOSCS 91 GND
A29 GND HAEL EGAERTLISTR.10

10
24
17
25
15
16
SA1 SHIELDS DB9M SSOP28 ROMCS 92 GND SA5 SD[0..15] JUMPER
A30 ROMCS GND SD[0..15] CH-4515 OBERDORF
SA0 AND HOLES X16 RX5V 107 GND SA4 FOR TEST SMDJUMP2
A31 RX5V GND
GND TX5V 108 GND SA3 SA[0..25] J89
A32 1 TX5V GND SA[0..25]
I2D 22K R44 GND C14 NRESDRV 139 GND SA2 MA12 BA1 Title
2 470nF NRESDRV GND
PC104LP I2C SMBBUS ROMRD 140 GND SA1 SMP5PCDK
3 ROMRD GND
PC104LP C15 ROMWR 119 GND SA0 JUMPER
4 470nF ROMWR GND
RESDRV SMDJUMP2 Size Document Number Rev
RESDRV
CON4 SODIMM144 C SMART P5 DEVELOPME NT KIT
PC/104BUS 4SIP100 GND SODIMM144 2.1

Date: Tuesday,May 22, 2001 Sheet 2 of 4

8 7 6 5 4 3 2 1
SM480 Integration manual V1.6
 8 7 6 5 4 3 2 1

VCC VCC VCC

1
1
1
D6 D7 D8
LED-GRUEN LED-GRUEN LED-GRUEN VCC VCC VCC VCC VCC
SOD80 SOD80 SOD80

2
2
2
IrDA VCC
+ C139
22uF
+ C140
22uF
+ C141
22uF
+ C142
22uF
+ C143
22uF
R264 R265 R266 5534 5534 5534 5534 5534
470 470 470 C111
D 0603 0603 0603 100nF D

VCC
R135 R133 R134 VCCSUS
L10 22 22 22
0603 0603 0603

1
1
1
D U56 D U57 D U58 FB U44 + C146
2N7002 2N7002 2N7002 1206 C110 22uF
SOT23 SOT23 SOT23 22uF 1 5534
SD
2 NC
LAN0 2 LAN1 2 SUSC- 2 3
LAN0 LAN1 SUSC- VCC
G S G S G S 4 RXD
RX5V
RX5V

3
3
3
DIGITAL-LOGIC AG

SUSA SUSB SUSC

5 GND
TX5V 6
TX5V TXD
7 LEDC
8 LEDA VCC3
VCC VCC R136
1K HSDL1001 VCC VCC VCC VCC
0603
HSDL1001
C78
100nF

1
1
PLEASE REFER THE D10 D9 C85 C86 C87 C88
LED-GRUEN LED-GRUEN 100nF 100nF 100nF 100nF
SOD80 SOD80

2
2
INTEL DATASHEET
VCC3

FOR THE PIIX-DEVICE VCC VCC VCC VCC

R268 R267
470 470 C79
(SOUTHBRIDGE FOR tx/bx) 0603 0603 100nF
C89 C90 C91 C92
100nF 100nF 100nF 100nF

VCC3

1
1
MAIN POWER INPUT
D U60 D U59
C C
2N7002 2N7002 VCCSUS
SOT23 SOT23 C80
VCCSUS 100nF
SSTAT1 2 SSTAT2 2 J48 V6 V5
SSTAT1 SSTAT2
G S G S D5 LOCH LOCH
1 SUPPLY LOCH35 LOCH35
X
X

2 1 2

3
3
SUSSTAT1 SUSSTAT2 VCC3
1N5817 CON2
1
1

MELF TB2POL

VERPOLUNGSSCHUTZ C81
100nF

V4 V3
LOCH LOCH
POWER-STATE SUSSTATX SUSA- SUSB- SUSC- LOCH35 LOCH35
X
X

VCC3
NORMAL-ON 1 1 1 1
1
1

POWER ON SUSPEND 0 0 1 1

48
SUSPEND TO RAM 0 0 0 1 BACKUP BATTERY
SUSPEND TO DISK 0 0 0 0 C82
OFF 0 0 0 0 100nF

POWER CONTROL V2 V1
LOCH LOCH
LOCH35 LOCH35
X
X

SUSPEND EVENTS: LID VCCB VCC3

PWRBTN
1
1

SMI B1
TIMER 2 1
R137 VCCBB C83
LIBAT3V 100nF
RESUME EVENTS: LID LIBAT2040
POWERMANAGEMENT PWRBTN 1K V7 V8
SMI LOCH LOCH
TIMER LOCH35 LOCH35
X
X

VCC3
1
1

CLOSE FOR LID EVENT SUSA- CONTROL OF CLOCK PLL SUPPLY

NOT USED CURRENTLY
(MONITOR THE OPEN/CLOSE OF THE NOTEBOOK-LCD) C84
B SUSB- CONTROL OF CPU SUPPLY 100nF B
DRAM, RTC, TX ARE POWERED TP7 TP4
1 1
SUSC- CONTROL OF ALL VCC EXCEPT X X
J81
LID OF THE PIIX-VCCSUS TP TP
LID 1 SMD2 SMD2
GND 2
PWRBTN TP8 TP5
PWRBTN 3
1 1
X X
CON3
JUMPER3 TP TP
SMD2 SMD2 R
TP9 TP6
1 1
CLOSE FOR POWER DOWN/UP X X
TP TP
SMD2 SMD2

SMT ASSEMBLY
CENTER MARKS DIGITAL-LOGIC AG SECRET
CONFIDENTAL DOCUMENT
DO NOT LEAVE THIS
NO ELECTRICAL FUNCTION$
POWER CONTROL OVERVIEW DOCUMENT UNATTENDED !
DO NOT REPRODUCE ANY PORTIONS OF IT
THIS DOCUMENT IS ISSUED TO YOU ALONE.
DO NOT TRANSFER IT TO OTHER PERSON.
STORE THIS DOCUMENT IN A LOCKED CABINET.
SIGNALS DIR ELAN400 ZF-MACH GEODE INTEL-P5/P3 FUNCTION THIS DOCUMENT IS THE PROPERTY OF DIGITAL-LOGIC AG
AND MAY BE REQUIRED TO RETURN IT AT ANY TIME.
SM486PCX SM586PC SMGXPC SMP5SC POWER-MODES
DIGITAL-LOGIC TAKES NO RESPONIBILITY FOR
THE FUNCTION AND RELIABILITY OF THIS DESIGN
THIS DESIGN IS ONLY A PROPOSITION.
SUSA- OUT NO GPIO0 NO YES POS R

SUSB- OUT NO GPIO1 NO YES SUSPEND TO RAM

A
RECIPIENT: A
SUSC- OUT NO GPIO2 YES YES SUSPEND TO DISK
COMPANY:
PWRBTN- IN NO NO YES YES POWER BUTTON
DATE/VIS:
DESIGN by Felix Kunz VIS: Date:
LID- (SLEEP-) IN SLEEP/RESUME GPIO4 NO YES (LID) LID OR SLEEP INPUT DIGITAL-LOGIC AG
DESIGNCHECK: VIS: Date: NORDSTR.4F
CH-4543 LUTERBACH
CLOCK MHz 66 133 300 166 - 600 RELEASED by: VIS: Date:
Title
SMP5PC-DK

Size Document Number Rev

C SMART-P5PC DEVELOPME NT KIT 2.1

Date: Tuesday,May 22, 2001 Sheet 3 of 4

8 7 6 5 4 3 2 1
SM480 Integration manual V1.6
 8 7 6 5 4 3 2 1

U50
P0 2 18 P0X
P1 A0 Y0 P1X
4 A1 Y1 16
P2 6 14 P2X LCD & VGA INTERFACE
P3 A2 Y2 P3X
8 A3 Y3 12
P4 11 9 P4X
P5 A4 Y4 P5X
13 A5 Y5 7
J94 P6 15 5 P6X
TDP INT_LTX+ P7 A6 Y6 P7X VCCLCD VCC3
ATX-POWERSWITCH INT_LTX+ 17 3 J83
VCCSUS A7 Y7
R 1
JUMPER 1 20 3.3V LCD PANEL
GND G1 VCC VCCLCD 2
SMDJUMP2 19 10 5.0V LCD PANEL
GND G2 GND GND VCC 3
J93 74LV244 CON3
MAIN SUPPLY VCC TDN INT_LTX- SSOP20 JUMPER3
ON ALSO IN INT_LTX-
U107 U51
THE SUSPENDED R549 JUMPER P8 2 18 P8X
MODE 100K SMDJUMP2 P9 A0 Y0 P9X
1 S D 8 4 A1 Y1 16
0603 2 7 SUPPLY FOR P10 6 14 P10X
S D OPERATING P11 A2 Y2 P11X
3 6 J92 8 12
D DIGITAL-LOGIC AG SECRET S D MODE ONLY RDP INT_LRX+ P12 A3 Y3 P12X D
4 G 5 INT_LRX+ 11 9
D P13 A4 Y4 P13X
13 7 X11
IN THE SMART P14 A5 Y5 P14X MX
CONFIDENTAL DOCUMENT JUMPER 15 5
R548 ALSO THE SMDJUMP2 P15 A6 Y6 P15X FLMX 1
SI4425DY 17 3
10K 8SOP150 VCC3 SUPPLY A7 Y7 VBBX 2
DO NOT LEAVE THIS U116A

14
0603 IS GENERATED LPX 3
J91 GND 1 20 VCCLCD
DOCUMENT UNATTENDED ! FROM THE VCC RDN INT_LRX- G1 VCC P0 4
INT_LRX- GND 19 G2 GND 10 GND P0 VCCLCD
DO NOT REPRODUCE ANY PORTIONS OF IT SUSC- SUSCC P1 5
SUSC- 1 2 P1 GND
THIS DOCUMENT IS ISSUED TO YOU ALONE. P2 ENAVEE 6
J63 JUMPER 74LV244 P2
DO NOT TRANSFER IT TO OTHER PERSON. SMDJUMP2 SSOP20 P3 SHFCLKX 7
1 P3 8
STORE THIS DOCUMENT IN A LOCKED CABINET. 74HCT04X 1K MANUAL U52 P4 VDDX
14SOP150 2 P4 9

7
THIS DOCUMENT IS THE PROPERTY OF DIGITAL-LOGIC AG R556 POWER ON P16 2 18 P16X P5 P0X
A0 Y0 P5 10
AND MAY BE REQUIRED TO RETURN IT AT ANY TIME. SUSC CON2 FOR SMARTMODULES P17 4 16 P17X P6 P1X
WITHOUT SUSC- A1 Y1 P6 11
JUMPER2 ONLY FOR SMART-PC INTERNAL P18 6 14 P18X P7 P2X
A2 Y2 P7 12
DIGITAL-LOGIC TAKES NO RESPONIBILITY FOR P19 P19X P8 P3X
DIGITAL-LOGIC AG

8 A3 Y3 12 P8
THE FUNCTION AND RELIABILITY OF THIS DESIGN ETHERNET OF SMGXPC AND P20 P20X P9 P4X 13
11 A4 Y4 9 P9
THIS DESIGN IS ONLY A PROPOSITION. NEW IN V2.1 P21 P21X P10 P5X 14
13 A5 Y5 7 P10
SM586PC P22 P22X P11 P6X 15
15 A6 Y6 5 P11
P23 P23X P12 P7X 16
17 A7 Y7 3 P12
CLOSE THIS JUMPERS, IF U46 P13 P8X 17
P13 18
GND 1 20 VCCLCD P14 P9X
G1 VCC P14 19
RECIPIENT: IS NOT ASSEMBLED ONLY ! GND 19 10 GND P15 P10X
G2 GND P15 20
P16 P11X
P16 21
EXTERNAL 100/10BASE-LAN 74LV244 P17 P12X
SSOP20 P17 22
COMPANY: P18 P13X
P18 23
U53 P19 P14X
P19 24
SHFCLK 2 18 SHFCLKX P20 P15X
A0 Y0 P20 25
DATE/VIS: U47 M 4 16 MX P21 GND
A1 Y1 P21 26
LP 6 14 LPX P22 P16X
A2 Y2 P22 27
FLM 8 12 FLMX P23 P17X
A3 Y3 P23 28
FA15 2 3 FA13 ENAVEE 11 9 ENAVEEX P24 P18X
SK DI A4 Y4 P24 VCCLCD 29
EECS 1 4 FA14 13 7 P25 P19X
CS DO A5 Y5 P25 30
VCC3 VGAH 15 5 VGAHX P26 P20X
A6 Y6 P26 31
5 8 VGAV 17 3 VGAVX P27
GND VCC A7 Y7 P27 32
VCC3 P28 P21X
P28 33
GND 6 GND 1 20 VCCLCD P29 P22X
16B G1 VCC P29 34
100BASE-T GND 19 10 GND P30 P23X
G2 GND P30 35
P31 P24X
P31 36
HY93LC46 RJ45 74LV244 P32 P25X
SSOP20 P32 37
U46 P33 P26X
P33 38
P34 P27X
P34 39
C
A_D0 N7 A12 LILED U45 U61 P35 P28X C
AD0 LILED P35 40
A_D[0..31] A_D1 M7 C11 ACLED P24 2 18 P24X P29X
A_D[0..31] A_D2 AD1 ACTLED SPLED P25 A0 Y0 P25X P30X 41
P6 AD2 SPEEDLED B11 16 TXP RJTXP 10 4 A1 Y1 16
A_D3 R230 P26 P26X SHFCLK P31X 42
P5 X9 6 14 SHFCLK
A_D4 AD3 TDP 120 P27 A2 Y2 P27X M 43
N5 AD4 TDP C13 14 TXCT RJTXC 12 8 12 M GND
A_D5 TDN 1 P28 A3 Y3 P28X LP P32X 44
M5 AD5 TDN C14 2 11 A4 Y4 9 LP
A_D6 RDP P29 P29X FLM P33X 45
P4 AD6 RDP E13 15 TXN RJTXN 11 13 7 FLM
A_D7 RDN 3 P30 A5 Y5 P30X ENAVDD P34X 46
N4 AD7 RDN E14 15 5 ENAVDD
A_D8 4 P31 A6 Y6 P31X ENAVEE P35X 47
P3 AD8 17 3 ENAVEE
A_D9 5 A7 Y7 ENABKL 48
N3 AD9 FA16 P9 1 RXP RJRXP 7 ENABKL VCC
A_D10 FA15 6 VGAR 49
N2 AD10 FA15 M10 GND 1 20 VCCLCD VGAR
A_D11 FA14 R229 7 G1 VCC VGAG 50
M1 AD11 FA14 N10 RJRXC 5 GND 19 10 GND VGAG
A_D12 FA13 120 H1012 8 G2 GND VGAB
M2 P10 VGAB CON50
A_D13 AD12 FA13 VGAH
M3 M11 2 6 Connector 8pin 74LV244 VGAH 25X2RM2
A_D14 AD13 FA12 RXN RJRXN SSOP20 VGAV
L1 AD14 FA11 M12 RJ45 VGAV
A_D15 L2 N13 U62
A_D29 A_D16 AD15 FA10 P32 P32X
K1 P13 H1012 2 18
A_D17 AD16 FA9 P33 A0 Y0 P33X
E3 N14 R231 R232 R235 R234 4 16 X10
A_D18 AD17 FA8 P34 A1 Y1 P34X VGAR
D1 AD18 FA7 M13 75 75 75 75 6 A2 Y2 14 1
A_D19 P35 P35X VGAG

49
D2 AD19 FA6 M14 8 A3 Y3 12 2
A_D20 D3 L12 11 9 VGAB
R233 A_D21 AD20 FA5 A4 Y4 3
C1 AD21 FA4 L13 13 A5 Y5 7
0 A_D22 4
B1 AD22 FA3 L14 15 A6 Y6 5
A_D23 +12V 5
B2 AD23 FA2 K14 17 A7 Y7 3
A_D24 6
B4 AD24 FA1 J12
A_D25 ASSENBLY WITH 0OHM V1.0A 7
A5 AD25 FA0 J13 GND 1 G1 VCC 20 VCCLCD
A_D26 ONLY FOR 91C96 8
B5 GND 19 10 GND J96
A_D27 AD26 G2 GND AGND 9
B6 AD27 FD7 J14
A_D28 NB 1 +12V BACKLIGHT 10
C6 H12 74LV244
A_D29 AD28 FD6 SSOP20 2 +5V BACKLIGHT 11
C7 H13 R262
A_D30 AD29 FD5 LETX 3 VGAHX 12
A8 H14 R258
A_D31 AD30 FD4 LETX 4FACH-LED VGAVX 13
B8 G12 CON3
AD31 FD3 NB JUMPER3 14
FD2 F12 0603
VCC 15
F13 R263 U48 100K
C_BE0- FD1 LERX LILED
M4 F14 330 VCC3 R260 CON15
C_BE0- C_BE1- CBE0 FD0 LERX ACLED 1 2 R236 ENABKL Q2
L3 330 VCC3 U55 DB15VGA
C_BE1- C_BE2- CBE1 EECS HDLED 3 4 NPNSOT
C_BE2- F3 CBE2 EECS P7 HDLED 330 VCCR239 0603 1
C_BE3- 5 6 R237 SOT23 S1 VBBX
C4 N9 330 VCC 1K 2 8
C_BE3- CBE3 FLCS/AEN 1K 7 8 R238 VCCLCD G1 DD1
M8 7 J68
DEVSEL- FLOE D1
H3 M9 R228 CON8A
DEVSEL- FRAME- DEVSEL FLWE TEST LED4 LAN0 1
F2 A13 GND R259 5
FRAME- GNT1- FRAME TEST D2 VDDX LAN0 2
GNT1- J3 GNT# 4 6
LANIDSEL HDLED2 G2 DD2
B A4 0603 3 VCCLCD CON2 B
IRDY- IDSEL VIO HDLED2 S2
F1 G2 VCC 100K JUMPER2
IRDY- PAR IRDY# VIO
J1 R261 SI9933DY J69
PAR PCI_CLK0 PAR ENAVDD Q3 8SOP150
G1 E12 VCC3 62K
PCI_CLK0 REQ1- PCLK VCC R227 NPNSOT LAN1 1
REQ1- C3 PREQ# VCC J11 VCC3 0603 LAN1 2
PCIRST- 1K SOT23
PCIRST- C2 RST# VCC L10 VCC3
SERR- A2 L9 VCC3 CON2
SERR-
STOP- SERR# VCC
H1 L5 VCC3 JUMPER2
STOP- TRDY- STOP# VCC RESERVED FUNCTIONS
G3 L4 VCC3 J70
TRDY- PIRQA- TRDY# VCC SCGX P5/P3 SM586PCX
PIRQA- PERR- H2 IRQA# VCC K11 VCC3 1
J2 K4 VCC3 X19 SUSC-
PERR- PERR# VCC RES1 AUD_DO SUSC- 2
VCC G5 VCC3 RES1 1
G13 H8 RES2 SMI- SMI- CON2
VCC3 CVCC VCC VCC3 RES2 2
K13 J5 RES3 AUD_CK JUMPER2
VCC3 CVCC VCC VCC3 RES3 3
VCC3 N8 J6 VCC3 RES4 AUD_SY ONLY FOR FACTORY
CVCC VCC RES4 RES5 4 AUD_DI TEST, DO NOT
VCC3 P12 CVCC VCC J7 VCC3 RES5 5 ASSEMBLY THIS COMPONENTS
VCC3 A11 CVCC VCC J8 VCC3 6
VCC3 A3 CVCC VCC J9 VCC3 7
VCC3 A7 SVCC VCC J10 VCC3 8
VCC3 E1 SVCC VCC K5 VCC3 VCC 9
VCC3 K3 SVCC VCC K6 VCC3 10
VCC3 N6 SVCC VCC K7 VCC3
VCC3 G6 K8 VCC3 CON10
PVCC VCC
VCC3 H5 PVCC VCC K9 VCC3 5X2HEAD
VCC3 H6 PVCC VCC K10 VCC3
VCC3 H7 VCC VCC VCC VCC VCC
PVCC
GND F7 GND
GND C10 CGND GND F8 GND R
GND G14 CGND GND F9 GND
GND K12 CGND GND F10 GND
GND N12 G7 GND + C134 + C135 + C136 + C137 + C138
CGND GND 33uF/6V 33uF/6V 33uF/6V 33uF/6V 33uF/6V
GND P8 CGND GND G8 GND
B3 G9 3528 3528 3528 3528 3528
GND CGND GND GND
GND B7 CGND GND G10 GND
GND E2 SGND GND H9 GND
VCC3 GND K2 SGND GND H10 GND
GND M6 D4 GND VCC VCC VCC VCC VCC
SGND GND
10K GND N1 D5 GND C113
R220 SGND GND X1OSC
GND E5 SGND GND D6 GND DESIGN by Felix Kunz VIS: Date:
VCC3 GND E6 SGND GND D7 GND
GND E7 D8 GND Y1 22pF GND
SGND GND 25MHZ C129 C130 C131 C132 C133
10K GND E8 D11 GND C114 + + + + + DESIGNCHECK: VIS: Date:
A R221 PGND GND X2OSC 33uF/6V 33uF/6V 33uF/6V 33uF/6V 33uF/6V A
GND E9 PGND GND E4 GND
E10 E11 3528 3528 3528 3528 3528
VCC3 GND PGND GND GND
GND F5 F4 GND 22pF GND RELEASED by: VIS: Date:
PGND GND
330 GND F6 F11 GND
R222 PGND GND
GND L6 GND GND G11 GND
GND L11 H11 GND VCC3 VCC3 VCC3 VCC3 VCC3
WAKE ON LAN GND GND
R226 DIGITAL-LOGIC AG
OPTION X1OSC N11 B14 RBIAS10 GND
X2OSC X1OSC RBIAS10 0603
P11 X2OSC RBIAS100 B13 MICROSPACE DIVISION
560
R219 VCC3 R223 IOSLATE B9 C8 LANRUN- + C149 + C148 + C147 C150 C151 SWITZERLAND
LID ALTRST ISOLATE# CLKRUN# 33uF/6V 33uF/6V 33uF/6V 100nF 100nF
A9 C12 R225
LID 0603 0603 PME# ALTRST# VREF RBIAS100 3528 3528 3528 0603 0603 CONFI DENTAL SCHEMATIC
A6 P2 GND
WOL PME# VCCPP 0603 Title
NB 10K C5 WOL
R224 680 SMP5PCDK
82559_YBGA
BGA196 0603
VCC3 Size Document Number Rev
10K C SMART DEVELOP MENT KIT 2.1

Date: Tuesday,May 22, 2001 Sheet 4 of 4

8 7 6 5 4 3 2 1
SM480 Integration manual V1.6
DIGITAL-LOGIC AG SM480 Integration manual V1.6

6.7 SM486PCX- EK

On the following pages are the schematics for the SM486PCX- EK.

50
 |LINK
|a3.sch
|a8.sch P1D1 WDOG 1

TP
TP
TP1
X

VCC
|a5.SCH P1D0

P1D1
P1D0
LPT A1 B1
FLASHDISK VCC IRQ1

VCC
PE1 13 SCLT1 RESDRV A2 B2 IRQ5 STR1 A1 B1 DCD1

J13
BUSY1 25 AUTOCS SBHE A3 RESDRV IRQ9 B3 IRQ3 AUTO1 A2 STROBE- DCD1 B2 DSR1

DB25
J75
SBHE- IRQ3 AUTO- DSR1

DB25F
ACK1 SA0 12 13 SD0 12 PE1 BIOSCS 1 AUTO BIOS SWITCH MCS16 A4 B4 IRQ4 ERROR1 A3 B3 RXD1

CON3
A0 D00 MEMCS16- IRQ4 ERROR- RXD1

AUTOCS
STR1 SA1 11 14 SD1 24 ROMCS 2 SMART BIOS ONLY IOC16 A5 B5 IRQ5 INIT1 A4 B4 RTS1

R39
SCLT1 SA2 10 A1 D01 15 SD2 11 BUSY1 3 -IOW A6 IOCS16- IRQ5 B6 IRQ6 SLCTIN1 A5 INIT- RTS1 B5 TXD1

R40
JUMPER3
A2 D02 IOW- IRQ6 SLCTIN- TXD1

VCC
SA3 9 17 SD3 23 -IOR A7 B7 IRQ7 P1D0 A6 B6 CTS1

R41
A3 D03 IOR- IRQ7 PDATA0 CTS1

GNDGNDGND
RDATA SA4 8 18 SD4 10 ACK1 SYSCLK A8 B8 IRQ5 P1D1 A7 B7 DTR1

R42
A4 D04 SYSCLK IRQ10 PDATA1 DTR1

1k 1k 1k 1k 1k
SA5 7 19 SD5 22 TC A9 B9 IRQ12 P1D2 A8 B8 RI1
A5 D05 TC IRQ11 PDATA2 RI1

VCC
SLCTIN1 SA6 6 20 SD6 9 P1D7 BALE A10 B10 IRQ12 P1D3 A9 B9 DCD2
INIT1 SA7 5 A6 D06 21 SD7 21 SD7 A11 BALE IRQ12 B11 IRQ14 P1D4 A10 PDATA3 DCD2 B10 DSR2

1K
J77
ERROR1 SA8 27 A7 D07 8 P1D6 EPSK SELECT1 1 SD6 A12 SD7 IRQ14 B12 IRQ5 P1D5 A11 PDATA4 DSR2 B11 RXD2

CON3
AUTO1 SA9 26 A8 EXTDOS 20 2 SD5 A13 SD6 IRQ15 B13 BIOSCS P1D6 A12 PDATA5 RXD2 B12 RTS2

R43 R208R31
J36
DSKCHG SA10 23 A9 DOSCS 1 EXT. 7 P1D5 3 SD4 A14 SD5 BIOSCSIN- B14 ROMCS P1D7 A13 PDATA6 RTS2 B13 TXD2

R32
JUMPER3

CON3
INDEX SA11 25 A10 FLACS 2 INT. 19 SD3 A15 SD4 BIOSCSOUT- B15 SA21 ACK1 A14 PDATA7 TXD2 B14 CTS2

1K

R33
A11 3 SD3 SA21 PACKNOW CTS2

R215
TRK0 SA12 4 6 P1D4 SD2 A16 B16 SA20 BUSY1 A15 B15 DTR2

R34
JUMPER3
A12 SD2 SA20 PBUSY DTR2

VCC
WRPT SA13 28 31 ROMWR 18 SD1 A17 B17 SA19 PE1 A16 B16 RI2

R35
SA14 29 A13 WE 24 ROMRD 5 P1D3 SD0 A18 SD1 LA19 B18 SA18 SCLT1 A17 PPAPEREND RI2 B17 INDEX

R36
J78
SA15 3 A14 OE 22 EXTDOS 17 SLCTIN1 EPDI SELECT2 1 IOCHRDY A19 SD0 LA18 B19 SA17 KBDAT A18 PSELECT F_INDEX B18 DRV1

R37
CON3
A15 CE 2 IOCHRDY LA17 KEY_DATA F_DRV1

VCC

1k 1k 1k 1k 1k 1k 1k 1k
SA16 2 4 P1D2 AEN A20 B20 SD8 KBCLK A19 B19 DSKCHG

R38
A16 3 AEN SD8 KEY_CLOCK F_CHNG

VCC
SA17 30 32 16 INIT1 SA19 A21 B21 SD9 MSCLK A20 B20 MTR1

JUMPER3
IDE SA18 1 A17 VCC 3 P1D1 SA18 A22 SA19 SD9 B22 SD10 MSDAT A21 MOUSE_CLOCK F_MOT1 B21 DIR

1K
R216
VPP/A18 SA18 SD10 MOUSE_DATA F_DIR

J9
NRESDRV 16 EXTDOS 15 ERROR1 SA17 A23 B23 SD11 A22 B22 STEP
1 GND SA17 SD11 GND F_SETP

GND
2 P1D0 SA16 A24 B24 SD12 HD0 A23 B23 WDATA

IDE44
2 SA16 SD12 IDE_D0 F_WDATA

VCC
IDE7 14 AUTO1 SA15 A25 B25 SD13 HD1 A24 B24 WGATE
HD8 3 1 STR1 SA14 A26 SA15 SD13 B26 SD14 HD2 A25 IDE_D1 F_WGATE B25 TRK0

U16
GND
10K
R127
HD6 4 SA13 A27 SA14 SD14 B27 SD15 HD3 A26 IDE_D2 F_TRK00 B26 WRPT
HD9 5 INTEGRATE ONLY AS ALTERNATIV TO THE SA12 A28 SA13 SD15 B28 HD4 A27 IDE_D3 F_WP B27 RDATA

J80
6 SMART INTERNAL FLASHDISK. IN THIS CASE, A DOC2000 1 SA12 DRQ0 IDE_D4 F_RDATA

32DIP600
DOC2000
HD5 SPK SA11 A29 B29 DRQ1 HD5 A28 B28 HDSEL
HD10 7 FLASHDISK FROM M-SYSTEMS 4M TO 72M MAY BE USED 2 SA10 A30 SA11 DRQ1 B30 DRQ2 HD6 A29 IDE_D5 F_HEAD B29 DRV0
HD4 8 SA9 A31 SA10 DRQ2 B31 IDE7 A30 IDE_D6 F_DRV0 B30 MTR0

SPEAKER
9 SA9 DRQ3 IDE_D7 F_MOT0

33
HD11 SA8 A32 B32 HD8 A31 B31 RESU
10 SA8 DRQ5 IDE_D8 RESU/PWBTN#

R217
HD3 SD0 SPKR SA7 A33 B33 HD9 A32 B32 NRESDRV

Q1
DIGITAL-LOGIC AG

11 SA7 DRQ6 IDE_D9 IDE_RESET-

VCC
HD12 SD1 SA6 A34 B34 OSC HD10 A33 B33 SLEEP
12 SA6 OSC 14M IDE_D10 SLEEP/LID#

SOT23

VCC
HD2 SD2 SA5 A35 B35 HD11 A34 B34

STAR-7DQMB-111P
SLEEP

13 SA5 DACK0- IDE_D11 USB_P0+

R5
NPNSOT

VCC
HD13 SD3 SA4 A36 B36 -DACK1 HD12 A35 B35

1K

R14

10K
14 SA4 DACK1- IDE_D12 USB_P0-

VCC
HD1 SD4 SA3 A37 B37 -DACK2 HD13 A36 B36 HDA0

R15

10K
15 SA3 DACK2- IDE_D13 IDE_A0

VCC
HD14 SD5 SA2 A38 B38 HD14 A37 B37 HDA1

R16

10K
16 SA2 DACK3- IDE_D14 IDE_A1

VCC
HD0 SD6 P10X 3 2 KSOA BRST SA1 A39 B39 HD15 A38 B38 HDA2

R17

10K
17 D0 Q0 SA1 DACK5- IDE_D15 IDE_A2

VCC
HD15 SD7 P11X 4 5 KSOB BMCL SA0 A40 B40 HCS0 A39 B39

BRST

R18

10K
18 D1 Q1 SA0 DACK6- IDE_PCS0- IDE_RDY

VCC
SD8 P12X 7 6 KSOC BMCH A41 B41 SPKR HCS1 A40 B40

R19
BMCL

10K
19 D2 Q2 CAS0- SPEAKER IDE_PCS1- LCD_D32

VCC

GND
SD9 P13X 8 9 KSOD BWP A42 B42 A41 B41 TX5V

R20
BMCH

10K
20 D3 Q3 CAS1- ZWS- IDE_PDACK- IR_TX

VCC
BWP
SD10 P14X 13 12 LEDS BCD A43 B43 REF A42 B42 RX5V
TX5V

R21

10K
21 D4 Q4 CAS2- REF- IDE_PDRQ IR_RX

VCC
BCD
SD11 P15X 14 15 LEDN BRDY A44 B44 MEMR IRQ14 A43 B43
RX5V

R22

10K
22 D5 Q5 CAS3- MEMR- IDE_PIRQ LCD_P33

VCC
-IOW SD12 P16X 17 16 LEDC ABOE A45 B45 SMEMR -IOR A44 B44

R23
BRDY

10K
23 D6 Q6 CAS4- SMEMR- IDE_PIOR- LCD_P34

VCC
SD13 P17X 18 19 LEDP BREG A46 B46 MEMW -IOW A45 B45

R24
ABOE

10K
24 D7 Q7 CAS5- MEMW- IDE_PIOW- LCD_P35

VCC
-IOR SD14 BBVD1 A47 B47 SMEMW A46 B46

R25
BREG

10K
25 CAS6- SMEMW- VCC BATTERY

VCC
GND
VCC
SD15 1 BBVD2 A48 B48 ICDIR A47 B47

R26
VCCB

BBVD1

10K
26 OC CAS7- SIDE_D0 PCI_AD0 PCI_AD16

GNDGNDGND
VCC
IOCHRDY WRMTRX 11 BVCC A49 B49 ABWE A48 B48

R27
BBVD2

10K
27 G MD0 SIDE_D1 PCI_AD1 PCI_AD17

J5
SPK BVPP1 A50 B50 ABOE A49 B49

R28
BVCC

10K
28 RESU 1 BVPP2 A51 MD1 SIDE_D2 B51 ACD A50 PCI_AD2 PCI_AD18 B50

R29
BVPP1

10K
29 2 MD2 SIDE_D3 PCI_AD3 PCI_AD19

CON10
XRESET BVCC3EN A52 B52 ARDY A51 B51

U14
BVPP2
30 3 MD3 SIDE_D4 PCI_AD4 PCI_AD20

GND
IRQ14 DCD DRV1 A53 B53 ABVD1 A52 B52

5X2HEAD

J38
J11
31 1 1 4 MD4 SIDE_D5 PCI_AD5 PCI_AD21

VCC
IOC16 DSR DRVSEL KBDAT KSI0 2 18 P10X

BVCC3EN
ARST A54 B54 ABVD2 A53 B53

CON3
32 2 2 5 1A1 1Y1 MD5 SIDE_D6 PCI_AD6 PCI_AD22

CON10
HDA1 RXD DRV0 KBCLK KSI1 4 16 P11X AREG A55 B55 AWP A54 B54

ARST

74ABT373
PDIAG 33 3 RTS 3 6 KSI2 6 1A2 1Y2 14 P12X ABVD1 A56 MD6 SIDE_D7 B56 ABWAIT A55 PCI_AD7 PCI_AD23 B55

5X2HEAD
AREG
34 4 7 1A3 1Y3 MD7 SIDE_D8 PCI_AD8 PCI_AD24

GND
HDA0 TXD KSI3 8 12 P13X ABVD2 A57 B57 ARST A56 B56

ABVD1
35 5 8 1A4 1Y4 GND SIDE_D9 PCI_AD9 PCI_AD25

GND
HDA2 CTS MSCLK KSI4 11 9 P14X ABWAIT A58 B58 AREG A57 B57

ABVD2

VCCBB
HCS0 36 6 DTR MSDAT 9 KSI5 13 2A1 2Y1 7 P15X ABWE A59 MD8 SIDE_D10 B59 AMCH A58 PCI_AD10 PCI_AD26 B58

ABWAIT
HCS1 37 7 RING0 MTR1 10 KSI6 15 2A2 2Y2 5 P16X ARDY A60 MD9 SIDE_D11 B60 AMCL A59 PCI_AD11 PCI_AD27 B59

ABWE

J12
DASP- 38 8 MOTON 1 KSI7 17 2A3 2Y3 3 P17X ACD A61 MD10 SIDE_D12 B61 AVCC A60 PCI_AD12 PCI_AD28 B60

ARDY

CON3
39 9 2 2A4 2Y4 MD11 SIDE_D13 PCI_AD13 PCI_AD29

VCC
GND
ACD
MTR0 A62 B62 AVPP1 A61 B61
40 10 3 MD12 SIDE_D14 PCI_AD14 PCI_AD30

GND
VCC
RDMTRX 1 A63 B63 AVPP2 A62 B62
41 1G MD13 SIDE_D15 PCI_AD15 PCI_AD31

J3
VCCHD KSO0 RDMTRX 19 A64 B64 ICDIR A63 B63
42 KSO1 1 2G A65 MD14 SIDE_SCS0- B65 EPSK A64 PCI_CBE0 PCI_INTA B64
43 2 MD15 SIDE_SCS1- PCI_CBE1 PCI_INTB

GND
CON30
KSO2 KSO0 13 3 A66 B66 EPDI A65 B65
44 3 X0 X GND SIDE_SIOR- PCI_CBE2 PCI_INTC

VCC

15x2RM2
GND

L11
KSO3 KSO1 14 A67 B67 BCD A66 B66

U13
MOLEX26 FLOPPY KSO4 4 KSO2 15 X1 A68 MD16 SIDE_SIOW- B68 BRDY A67 PCI_CBE3 PCI_INTD B67

IND5
15uH
5 X2 MD17 SDCLK2 VCC VCC
VCC
VCC

KSO5 KSO3 12 16 A69 B69 BBVD1 A68 B68

C112
GND

J10
SSOP20

100nF
1 INDEX KSO6 6 KSOD 1 2 KSOE KSO4 1 X3 VCC 8 A70 MD18 CKE0 B70 BBVD2 A69 PCI_CLK0 PCI_CLK1 B69

74ABT244
2 7 X4 GND MD19 CKE1 PCI_REQ0 PCI_GNT0

CON26
KSO7 KSO5 5 7 A71 B71 BWP A70 B70

GND
3 DRVSEL KSO8 8 KSO6 2 X5 VEE A72 MD20 SCASA B72 ABWAIT A71 PCI_REQ1 PCI_GNT1 B71

GND
4 KSO9 9 KSO7 4 X6 A73 MD21 SCASB B73 BRST A72 PCI_REQ2 PCI_GNT2 B72
5 10 X7 MD22 SRASA PCI_REQ3 PCI_GNT3

VCC VCC VCC

DSKCHG KSO10 A74 B74 BREG A73 B73

U3A
6 11 MD23 SRASB PGP1_OUT VCC
VCC

KSO11 KSOD 6 A75 B75 BMCH A74 B74

51
7 KSO12 12 KSOA 11 INH A76 MA0 RAS4(TX) B76 BMCL A75 PCI_FRAME- PCI_IRDY B75

GND
8 13 A MA1 RAS5(TX) PCI_TRDY PCI_STOP

VCC
74HCT04
KSO13 KBLED 1 2 LED KSOB 10 A77 B77 BVCC A76 B76
DASP- 9 MOTON KSO14 14 KSOC 9 B A78 MA2 MA13 B78 BVPP1 A77 PCI_DEVSEL PCI_PAR B77
2 1 10 KSO15 15 C A79 MA3 SDCLK0 B79 BVPP2 PGP0 A78 PCI_SERR PCI_LOCK B78
11 DIR KSI0 16 A80 MA4 SDCLK1 B80 BL0 XRESET A79 PGP0_OUT PCI_RESET B79
12 17 MA5 1.8MHZ RESET_IN DRQ7

D1
U5
KSI1 A81 B81 ACIN A80 B80

R30
U4A

330
13 18 MA6 GND AC_INPUT DACK7
GND

7406
STEP KSI2 LEDS LEDSCR KSO8 13 3 A82 B82 DCD A81 B81
14 19 X0 X MA7 MD48 LCD_D24/CD3 USB_P1+

VCC
KSI3 LEDN LEDNUM KSO9 14 A83 B83 DSR A82 B82
15 WDATA KSI4 20 LEDC LEDCAP KSO10 15 X1 A84 MA8 MD49 B84 RXD A83 LCD_D25/DS3 USB_P1- B83

74HC4051
16SOP150
16 KSI5 21 LEDP LEDPAD KSO11 12 X2 16 A85 MA9 MD50 B85 RTS A84 LCD_D26/RX3 OC0 B84

LED GREEN
GND

330
17 WGATE KSI6 22 KSO12 1 X3 VCC 8 A86 MA10 MD51 B86 TXD A85 LCD_D27/RT3 OC1 B85 SA22

330
18 KSI7 23 KSO13 5 X4 GND 7 A87 MA11 MD52 B87 CTS A86 LCD_D28/TX3 S/LA22 B86 SA23

GND

330
19 24 X5 VEE MA12 MD53 LCD_D29/CT3 S/LA23

R1R2R3R4
TRK0 KSI0 KSO14 2 A88 B88 DTR A87 B87 SA24

330
20 25 X6 GND MD54 LCD_D30/DT3 SA24/PERR-

VCC

GND
GND
LED KSI1 KSO15 4 A89 B89 RING0 A88 B88 SA25
B1 C0 21 26 X7 MD24 MD55 LCD_D31/RI3 SA25

GND
VCC
RESDRV SBHE WRPT LEDPAD KSI2 A90 B90 COCOP A89 B89 EPDO
B2 C1 22 27 MD25 GND LAN_CD+ I2C_DATA

VCC
GND

SA23 LEDCAP KSI3 KSOE 6 BIOSCS A91 B91 COCON A90 B90 EPCS
COCOP

B3 C2 23 28 INH MD26 MD56 LAN_CD- I2C_CLOCK

GND VCC
VCC
IRQ9 SA22 RDATA LEDNUM KSI4 KSOA 11 ROMCS A92 B92 A91 B91
COCON

BIOSCS
B4 C3 24 29 A MD27 MD57 3.3V 3.3V

VCC
SA21 LEDSCR KSI5 KSOB 10 RX5V A93 B93 COTXP A92 B92
VCC3
VCC3

ROMCS
B5 C4 25 30 B MD28 MD58 LAN_TX+ MASTER-

GNDGNDGNDGNDGNDGND
VCC
DRQ2 SA20 HDSEL KSI6 KSOC 9 TX5V A94 B94 COTXN A93 B93

RX5V
COTXP

B6 C5 26 C MD29 MD59 LAN_TX- IOCHK

VCC
SA19 KSI7 NRESDRV A95 B95 CORXP A94 B94 DASP-

TX5V

R6R7R8R9R10
KEYMATRIX
COTXN

B7 C6 MD30 MD60 LAN_RX+ MCC_DASP

VCC
SA18 ROMRD A96 B96 CORXN A95 B95 PDIAG

R11
CORXP

B8 C7 MD31 MD61 LAN_RX- MCC_DIAG

U6
SA17 ROMWR A97 B97 BL2 A96 B96 CARDSEL

NRESDRV

R12
CORXN

ROMRD
B9 C8 GND MD62 SSTAT2/BL2 MCC_SELE

V12
GND
MEMR RESDRV A98 B98 FLACS A97 B97 DOSCS

1K1K1K1K1K1K1K1K
R13
B10 C9 MD32 MD63 FLACS_IN FLACS_OUT

ROMWR

VCC
VCC
SMEMW MEMW A99 B99 LAN0 A98 B98 ROMWR
FLACS
DOSCS

B11 C10 MD33 GND SUSA/LAN0 RES3/VDDA

RESDRV
GND

SMEMR SD8 MMC A100 B100 TXP LAN1 A99 B99 ROMRD
LAN0

74HC4051
16SOP150

J79

C21
B12 C11 1 MD34 SIDE_SDACK- SUSB/LAN1 RES4/VDDC
ROMWR

TXP

-IOW SD9 CARDSEL MASTER A101 B101TXN LAN2 A100 B100 BL1
LAN1

CON3

470nF
ROMRD

C20
B13 C12 2 MD35 SIDE_SDRQ SUSC/LAN2 SSTAT1/BL1
TXN

SLAVE V1.1

J4
-IOR SD10 A102 B102TXDP VGAG A101 B101
LAN2

B14 C13 3 1 MD36 SIDE_IRQ VGA_GREEN VGA_GND

GND
SD11 A103 B103 TXDN VGAB A102 B102 VGAV
TXDP

JUMPER3
AGND

VGAG

CON8
B15 C14 SD12 ACIN 2 A104 MD37 SIDE_SIORDY- B104RXP VGAR A103 VGA_BLUE VGA_VS B103 VGAH
TXDN
VGAB
VGAV

11
13
12
470nF 14
B16 C15 3 MD38 SIDE_A0 VGA_RED VGA_HS
RXP

-DACK1 SD13 A105 B105 RXN ENAVEE A104 B104 ENAVDD

4X2HEAD
VGAR
VGAH

B17 C16 4 MD39 SIDE_A1 LCD_VEE LCD_VDD

VCC V12
RXN

DRQ1 SD14 RXD A106 B106LETX A105 B105 SHFCLK

V+
B18 C17 5 GND SIDE_A2 GND LCD_SHFCLK
ENAVEE
ENAVDD

GND
GND

C1-
LETX

REF SD15 TXD A107 B107 LERX FLM A106 B106 LP

C1+

VCC
SHFCLK

B19 C18 6 MD40 RES LCD_FLM LCD_LP

FLM

SYSCLK TXD2 7 2 TXDV2 IF NO IDE, THE IRQ14 A108 B108 WDOG P12 A107 B107 P0
LERX

B20 C19
COM2 TI1 TO1 7 MD41 WDOG_STROBE LCD_D12 LCD_D0
P12

GND
IRQ7 RTS2 6 3 RTSV2 MAY BE REMAPPED TO 11 OR 9 A109 B109 P13 A108 B108 P1
B21 TI2 TO2 8 MD42 WDOG_ENABLE LCD_D13 LCD_D1
P13

VCC
IRQ6 10 1 DCDV2 DTR2 20 1 DTRV2 A110 B110 KBLED P14 A109 B109 P2
B22 TI3 TO3 MD43 KBLED LCD_D14 LCD_D2
P14

IRQ5 11 6 DSRV2 21 28 RESU A111 B111 P10X P15 A110 B110 P3

J81

B23 TI4 TO4 1 MD44 P10X LCD_D15 LCD_D3

P15

IRQ4 2 RXDV2 RXD2 8 9 RXDV2 IRQ14 A112 B112 P11X P16 A111 B111 P4

J50
CON3

B24 RO1 RI1 1 2 MD45 P11X LCD_D16 LCD_D4

P16

GND
IRQ3 7 RTSV2 CTS2 5 4 CTSV2 IRQ9 ACIN A113 B113 P12X P17 A112 B112 P5

CON2
B25 RO2 RI2 2 3 MD46 P12X LCD_D17 LCD_D5

VCC
P17

-DACK2 3 TXDV2 DSR2 26 27 DSRV2 A114 B114 P13X P18 A113 B113 P6
JUMPER3

B26 RO3 RI3 MD47 P13X LCD_D18 LCD_D6

P18

TC 8 CTSV2 DCD2 22 23 DCDV2 A115 B115 P14X P19 A114 B114 P7

B27 RO4 RI4 1 J37 RAS0- P14X LCD_D19 LCD_D7
P19

BALE 4 DTRV2 RI2 19 18 RIV2 A116 B116 P15X P20 A115 B115 P8

CON8
B28 RO5 RI5 2 RAS1- P15X LCD_D20 LCD_D8
P20

9 RIV2 BL0 A117 B117 P16X P21 A116 B116 P9

GND
C2-

EN
SD
C2+

V-
B29 3 RAS2- P16X LCD_D21 LCD_D9
P21

OSC 5 IRQ14 SLEEP A118 B118 P17X P22 A117 B117 P10
4X2HEAD

J49
J82

B30 1 4 1 RAS3- P17X LCD_D22 LCD_D10

P22
LPP0P1P2P3P4P5P6P7P8P9P10

GND
IRQ11 BL1 A119 B119 WRMTRX P23 A118 B118 P11

CON2
CON3

B31 2 5 2 MWEA- WRMKEY/BIOSCS LCD_D23 LCD_D11

10
24
17
25
15
16
P23

VCCGND
GND

SSOP28 PGP0 A120 B120 RDMTRX ENABKL A119 B119 M

U20
P11M

J8
B32 6 3 MWEB- RDMKEY LCD_BLK LCD_M

GND
BL2 VCCPAN A120 B120
JUMPER3

7 LCD_VCC CORE_VCC
ENABKL

IOCK
VCC3

MAX211

DB9M
DB9M
A1 D0 8
VCCPAN

GND
SD7 MCS16 GNDGNDGND
A2 D1

C18
J14
J15

SD6 IOC16

GND
470nF
SD5 A3 D2 IRQ10
A4 D3

C19
S480A
S480B

SD4 IRQ11 IF IRQ5 NOT USED, REMAPPABLE

R45
470nF

22K
SD3 A5 D4 IRQ12 TO USE AS IRQ11 OR IRQ15 KBDAT
J23

SD2 A6 D5 IRQ15 1
CON6

A7 D6 2
GND

SD1 IRQ14

GND
A8 D7 3 R
CON240X0635S
CON240X0635S

PS2CON

VCC
GND

SD0 IRQ5

J41
IOCHRDY A9 D8 IRQ11 1 KBCLK 4

CON2

C17
AEN A10 D9 2 5 SA25 SD15

470nF
C16
A11 D10 6
VCCGND

SA19 SA24 SD14

SA18 A12 D11 SA23 SD13
SA17 A13 D12 SA22 SD12

11
13
12
470nF 14
SA16 A14 D13 SA21 SD11
SA15 A15 D14 IRQ5 SA20 SD10 -IOR
J45

A16 D15

V+
1
-IOR

C1-
SA14 IRQ15 MSDAT SA19 SD9 -IOW

C1+
COM1

VCC
J24

CON2
A17 D16 2 1
-IOW

SA13 TXD1 7 2 TXDV1 SA18 SD8 AEN

CON6

A18 D17 TI1 TO1 2

AEN

GND

SA12 10 1 DCDV1 RTS1 6 3 RTSV1 SA17 SD7 DESIGN by Felix Kunz VIS: Date:
A19 D18 TI2 TO2 3
PS2CON

VCCGND
GND

SA11 11 6 DSRV1 DTR1 20 1 DTRV1 SA16 SD6

A20 D19 TI3 TO3 4

GND
SA10 2 RXDV1 21 28 MSCLK SA15 SD5
SA9 A21 7 RTSV1 RXD1 8 TI4 TO4 9 RXDV1 5 SA14 SD4
A22 RO1 RI1 6 DESIGNCHECK: VIS: Date:
VCC GND

SA8 3 TXDV1 CTS1 5 4 CTSV1 SA13 SD3

SA7 A23 8 CTSV1 DSR1 26 RO2 RI2 27 DSRV1 IF NO PS2 MOSUE USED SA12 SD2
A24 E1 RO3 RI3

GND
SA6 4 DTRV1 DCD1 22 23 DCDV1 IRQ12 MAY BE USED AS IRQ10 SA11 SD1 RELEASED by: VIS: Date:
A25 E2 RO4 RI4

GND
SA5 9 RIV1 RI1 19 18 RIV1 SA10 SD0
A26 E3 RO5 RI5

GND
SA4 5 AWP SA9

GND
EN
SD
C2-
DIGITAL-LOGIC AG

C2+

V-
A27 E4

GND
GND
AWP

SA3 IRQ10 AMCL SA8

J40

SA2 A28 IRQ12 1 AMCH SA7

AMCL

J7
CON2

A29 2

10
24
17
25
15
16
SA1 SSOP28 AVCC SA6 HAELEGAERTLISTR.10

U19
AMCH

SA0 A30 AVPP1 SA5 SD[0..15] CH-4515 OBERDORF

AVCC

DB9M
DB9M
A31 AVPP2 SA4
AVPP1

MAX211
A32
SD[0..15]

GND
ROMCS AVCC3EN SA3 SA[0..25] Title
AVPP2

C14
ICDIR SA2

GND
S486EKX

J2
470nF
SA[0..25]

1.0
SM480 Integration manual V1.6

AVCC3EN

SA1
ICDIR

C15
SA0

R44
Size Document Number Rev

470nF

22K
5

PC104LP
PC104LP
A0 SMART 486 EVALUATION KIT 2

GND
Date: Sheet of
Wednesday, December 06, 2000
 R

J66
1

CON4
2

4SIP100
3
4
DIGITAL-LOGIC AG SECRET TXP 1 8
TXDP 2 TX60R+ TX100R+ 6
CONFIDENTAL DOCUMENT TX400R+ TX100R-
TXN 3
TXP TXDN 4 TX60R-
DO NOT LEAVE THIS TX400R-

TXP
TXN 5 10BASE-T
TX

TXN
DOCUMENT UNATTENDED ! TXDP
DO NOT REPRODUCE ANY PORTIONS OF IT TXDN RXP 16 9

TXDP
THIS DOCUMENT IS ISSUED TO YOU ALONE. RXP 15 RX+ RX100R+ 11
RJ45

TXDN
RXCOM RX100R-

RXP
DO NOT TRANSFER IT TO OTHER PERSON. RXN RXN 14
RX-

RXN
STORE THIS DOCUMENT IN A LOCKED CABINET. 12
THIS DOCUMENT IS THE PROPERTY OF DIGITAL-LOGIC AG RX
AND MAY BE REQUIRED TO RETURN IT AT ANY TIME.

DIGITAL-LOGIC TAKES NO RESPONIBILITY FOR

THE FUNCTION AND RELIABILITY OF THIS DESIGN

U66
THIS DESIGN IS ONLY A PROPOSITION.

PE65467
C106
10nF

VCC
RECIPIENT: 5V TO -9V

jumper2

VEE
1M
R198
COMPANY:
DIGITAL-LOGIC AG

J67
1 10 1

EGNDE
CON2
VCC VEE 2

BNC90
DATE/VIS: 12 11
+

10uF
C101
GND VGG

GND

GND
2 1

U64
EGNDE
D11
10BASE-2

DC5DC9
VEE
1N4148
M

J17
FLM 1
P18 2
LP 3 +

10uF
C100
P0 4

CON40 (LCD)
5

VCC
P1
6

GND
P2 ENAVDD
7
VEE

P3 SHFCLK
P4 ENABKL 8
P5 P3 9
1K

EGNDE
R192

P6 P2 10 HBE=OFF
P7 P17 11
P8 P1 12
1

P9 P16 13
16
15
14
12
11
9

14
R200

P10 P0
15

P0P1P2P3P4P5P6P7P8P9P10
P11 P7 HBE=ON

EGNDE
16

P11
RXI

P12 ENAVEE
RR-
RR+
HBE

TXO
CDS
17

P12
P13 P6 13
18 VEE

P13
P14 VCCPAN 5
NB

19 VEE
R201

P14
P15 P5 4 10
20 VEE GND

P15
P16 P4
EGNDE

21

P16
P17 P19
EGNDE

22

P17
P18 P8
23

P18
P19 P9
CD-
CD+
RX-
RX+

24
TX-
TX+

P19

52
VEE

P20 P10
25

P20
P21 P11 V2.3
1
2
3
6
7
8

26

P21
75
P22 P12
U65

27

P22
P23 P13 RepPro
R197
8392B

SHFCLK P14 28
M P15 29
30

SHFCLK
LP

P23 M LP
31

GND
FLM VGAR
32

FLM
ENAVDD P20
ENAVEE VGAG 33
34

ENAVDD
ENABKL P21 COCOP 16 1
35 CDB+ CDA+

ENAVEE
VGAR VGAB COCON 15 2

COCOP
36 CDB- CDA-

ENABKL
VGAG P22 CORXP 13 4

VGAR
COCON
VGAB VGAH 37 CORXN 12 RXB+ RXA+ 5

VGAG
CORXP
VGAH VGAV 38 COTXP 10 RXB- RXA- 7

VGAB
CORXN
VGAV P23 39 COTXN 9 TXB+ TXA+ 8

VGAH
COTXP
VCCPAN 40 TXB- TXA-

VGAV
COTXN

VCCPAN
U67
1.5K
1.5K
1.5K
1.5K

R193
R194
R195
R196

PE65728

VGAR 1 2

J25
J68
VGAG 1 2 1 LAN0 1

CON2
2 2

CON15
VGAB 1 2

LAN0

L5
3

DB15VGA

FB
JUMPER2

L6
4

1206
FB
L7
5

1206
LETX

FB
6

1206
LETX

LERX

J69
V1.0A 7 1
VEE
VEE
VEE
VEE

LAN1
LERX

CON2
8 2

LAN1
9

JUMPER2
10
11

AGND
VGAH 1 2 12

J70
330
330

VGAV 1 2 13 LAN2 1
R205
R206

CON2
14 2

LAN2

L9
15

FB
JUMPER2

L8

1206
FB
1206
2
2

D14
D15

1206
1206

LEDSMD
LEDSMD

1
1

R
VCC
VCC

DESIGN by Felix Kunz VIS: Date:

DESIGNCHECK: VIS: Date:

RELEASED by: VIS: Date:

DIGITAL-LOGIC AG

MICROSPACE DIVISION
SWITZERLAND

CONFIDENTAL SCHEMATIC
Title
S486EKX 1.0
SM480 Integration manual V1.6

Size Document Number Rev

5
A0 S486EKX 5
Date: Sheet of
Wednesday, December 06, 2000
 ONLY FOR THE EVALUATIONKIT

IMPLEMENT ONLY

VCC
ON THE EVAL BOARD EXTERNAL BIOS P1D0 EE0
SA[0..25] SA0 12
A0 O0
13 SD0
IrDA 2 1

VCC
SA1 11 14 SD1
A1 O1

D3

SA[0..25]
SA2 10 15 SD2

470
A2 O2

R129
VCC
SA3 9 17 SD3
SA4 8 A3 O3 18 SD4 P1D1 EE1

C111

100nF
A4 O4 2 1

LED RED
SA5 7 19 SD5
A5 O5

VCC
SA6 6 20 SD6
A6 O6

D4

22
22
22
SA7 5 21 SD7

470
A7 O7

R130

0603
0603
0603
SA8 27 SD[0..15] P1D1

R135
R133
R134
SA9 26 A8 P1D0

P1D1
A9

SD[0..15]
LED RED
SA10 23

P1D0
SA11 25 A10
A11

L10
SA12 4

FB
A12

U44

1206
SA13 28 1

22uF
C110
SA14 29 A13 2 SD
TROUGH TABLE SA15 3 A14 3 NC

HSDL1001
HSDL1001
INPUT OUTPUT SA16 2 A15 4 VCC
RESDRV SLEEP FORCESMART BIOSCS EXTCS A16 RX5V RXD
EXTCS 22
_-_ x 0 1 ROMCS ROMRD 24 CE 5
SA18 1 OE TX5V 6 GND

ROMRD
0 x 0 1 ROMCS ROMWR 31 VPP 7 TXD

RX5V TX5V
SA17 30 A18/PGM 8 LEDC
VCC3

A17/VCC LEDA

ROMWR
0 _-_ 0 ROMCS 1

1K

U7
VCC
VCC
VCC
X X 1 ROMCS 1 VCC

0603
R136
DIGITAL-LOGIC AG

C78

VCC

PLCC32R
100nF

ONLY FOR EVALUATION KIT

C85
C86
C87
C88

VCC
100nF
100nF
100nF
100nF

J48
VCC3

CON2
FORCESMART
2 1 2

TB2POL
VCC
VCC
VCC
VCC

32PLCC SOCKET & 29F040

D5

VCC
6 13 SLEEP
4 11

MELF

SLEEP
C79

12 NRESDRV

1N5817
100nF

BIOS IN SMART

J35
1

C89
C90
C91
C92

NRESDRV
CON2

470
100nF
100nF
100nF
100nF

R212

U71B
0603
0603

C108

100nF
U33D
1K
JUMPER2
VCC3

74HCT32
0603
R213

14SOP150
74HCT08
14SOP150
C80

SETFF 2
100nF

1 EXTBIO 9 1 1

TP
TP
X X

TP7
TP4
3 V1.2 8 AUTOCS

SMD2
8 10 SMD2
V6
V5

X
X
VCC3

AUTOCS
10 SMART MODUL BIOS CHIP
LOCH
LOCH

9
1
1

LOCH35
LOCH35

U43A
7402
1 1

TP
TP

X X

TP8
TP5

U71C
SMD2
SMD2

VCC

14SOP150
C81

U43C
74HCT32

7402
5 SMBIO 1
100nF

4 V1.2 3 EXTCS EXTCS

RESDRV 6 2 1 TP 1
TP

0.9A

14SOP150
X X
TP9
TP6

EXTERNAL BIOS CHIP SMD2

SMD2

RESDRV
V4
V3

10K
X
X
VCC3

R126
LOCH
LOCH

U43B
U71A

7402
1
1

LOCH35
LOCH35

74HCT32
ROMCS BACKUP BATTERY

14SOP150

ROMCS
C82

53
MAIN BIOS SELECT
100nF

V2
V1
VCC3

X
X

VCCB
LOCH
LOCH

1
1

LOCH35
LOCH35

VCCBB
2 1
C83

100nF

B1
1K

LIBAT3V
R137
V7
V8

LIBAT2040
VCC3

X
X

LOCH
LOCH

1
1

LOCH35
LOCH35
C84

100nF

DIGITAL-LOGIC AG SECRET
CONFIDENTAL DOCUMENT
DO NOT LEAVE THIS
DOCUMENT UNATTENDED !
DO NOT REPRODUCE ANY PORTIONS OF IT
THIS DOCUMENT IS ISSUED TO YOU ALONE.
DO NOT TRANSFER IT TO OTHER PERSON.
STORE THIS DOCUMENT IN A LOCKED CABINET.
THIS DOCUMENT IS THE PROPERTY OF DIGITAL-LOGIC AG
AND MAY BE REQUIRED TO RETURN IT AT ANY TIME.

DIGITAL-LOGIC TAKES NO RESPONIBILITY FOR

THE FUNCTION AND RELIABILITY OF THIS DESIGN
THIS DESIGN IS ONLY A PROPOSITION.
R

RECIPIENT:
COMPANY:
DATE/VIS:
DESIGN by Felix Kunz VIS: Date:
DIGITAL-LOGIC AG

DESIGNCHECK: VIS: Date: NORDSTR.4F

CH-4543 LUTERBACH
RELEASED by: VIS: Date:
Title
S486EKX 1.0
SM480 Integration manual V1.6

Size Document Number Rev

5
A0 SMART486EKX 4
Date: Sheet of
Wednesday, December 06, 2000
 5 ACD1
AINPA ACD 6

VCC
ACD
ARST 4 ACD2

VCC VCC

ARST
1K

1K
R95
1K
R83 R84

U33B
AREG ARDY

VCC
VCC
2 BCD1

ARDY

AREG
74HCT08
BCD 3

BCD
1 BCD2

1K
1K

R80
R72
VCC VCC

1K
ABVD1

VCC
1K
R69 R70

ABVD1
U33A
AVCC
AVPP1 10 AWAIT

1K
R75
AVCC
74HCT08
ABWAIT 8

AVPP1
ABVD2 9 BWAIT

ABWAIT

VCC
VCC VCC

ABVD2
J20
1

1K
1K 1K

R76
R92 R93
J19
GND

U33C
GND
AD3 2 1

JEIDA41
D3 GND

GND
AWP AD4 3 BD3 2

JEIDA41
D4 D3

74HCT08

VCC

AWP
AD5 4 BD4 3
AD6 5 D5 BD5 4 D4
AD7 6 D6 BD6 5 D5

1K
R67
AMCL 7 D7 BD7 6 D6
ABOE AMCL SD0 2 18 AD0 SA10 8 CE1 BMCL 7 D7
A1 B1 A10 CE1

VCC
SD1 3 17 AD1 ABOE 9 SD0 2 18 BD0 SA10 8

ABOE
AMCL
SD2 4 A2 B2 16 AD2 SA11 10 OE SD1 3 A1 B1 17 BD1 ABOE 9 A10
SD3 5 A3 B3 15 AD3 SA9 11 A11 SD2 4 A2 B2 16 BD2 SA11 10 OE

1K
R81
SD4 6 A4 B4 14 AD4 SA8 12 A9 SD3 5 A3 B3 15 BD3 SA9 11 A11
AMCH SD5 7 A5 B5 13 AD5 SA13 13 A8 SD4 6 A4 B4 14 BD4 SA8 12 A9
SD6 8 A6 B6 12 AD6 SA14 14 A13 SD5 7 A5 B5 13 BD5 SA13 13 A8

AMCH
SD7 9 A7 B7 11 AD7 ABWE 15 A14 SD6 8 A6 B6 12 BD6 SA14 14 A13
A8 B8 ARDY 16 WE/PGM SD7 9 A7 B7 11 BD7 ABWE 15 A14
AMCL 19 AVCCX 17 RDY/IRQ A8 B8 BRDY 16 WE/PGM
BRST BMCL ICDIR 1 G AVPP 18 VCC BMCL 19 BVCCX 17 RDY/IRQ
DIR VPP1 G VCC
DIGITAL-LOGIC AG

ICDIR
SA16 19 ICDIR 1 BVPP 18

BRST
BMCL
SA15 20 A16 DIR SA16 19 VPP1
SA12 21 A15 SA15 20 A16

U30
ABWE SA7 22 A12 SA12 21 A15

U28
A7 A12

VCC
BMCH SA6 23 SA7 22

ABWE
SSOP20
SD8 2 18 AD8 SA5 24 A6 SA6 23 A7

74ABT245

BMCH
SSOP20
SD9 3 A1 B1 17 AD9 SA4 25 A5 SD8 2 18 BD8 SA5 24 A6

1K
R82
74ABT245
SD10 4 A2 B2 16 AD10 SA3 26 A4 SD9 3 A1 B1 17 BD9 SA4 25 A5
BREG BWP SD11 5 A3 B3 15 AD11 SA2 27 A3 SD10 4 A2 B2 16 BD10 SA3 26 A4
A4 B4 A2 A3 B3 A3

VCC
VCC

BWP
SD12 6 14 AD12 SA1 28 SD11 5 15 BD11 SA2 27

BREG
SD13 7 A5 B5 13 AD13 SA0 29 A1 SD12 6 A4 B4 14 BD12 SA1 28 A2
SD14 8 A6 B6 12 AD14 AD0 30 A0 SD13 7 A5 B5 13 BD13 SA0 29 A1

1K
1K

R79
R68
SD15 9 A7 B7 11 AD15 AD1 31 D0 SD14 8 A6 B6 12 BD14 BD0 30 A0
BBVD1 A8 B8 AD2 32 D1 SD15 9 A7 B7 11 BD15 BD1 31 D0
D2 A8 B8 D1

VCC
AMCH 19 AWP 33 BD2 32

BBVD1
BVCC ICDIR 1 G 34 WP/IOIS16 BMCH 19 BWP 33 D2
DIR GND G WP/IOIS16

GND
BVPP1 35 ICDIR 1 34

1K
R73
BVCC
GND DIR GND

GND
GND
ACD1 36 35

BVPP1
CD1 GND

GND
BBVD2 AD11 37 BCD1 36

U31
D11 CD1

VCC
AD12 38 BD11 37

U29

BBVD2
HI=A>B=WRITE AD13 39 D12 BD12 38 D11

SSOP20
AD14 40 D13 BD13 39 D12

1K
R74
74ABT245
SSOP20
AD15 41 D14 BD14 40 D13

74ABT245
AMCH 42 D15 BD15 41 D14
BRDY 43 CE2 BMCH 42 D15
REF CE2

VCC
AVPP2 -IOR 44 43

BRDY
-IOW 45 RFU/IORD -IOR 44 REF

AVPP2
SA17 46 RFU/IOWR -IOW 45 RFU/IORD

1K
R71
AVPP2 1 BINPA SA18 47 A17 SA17 46 RFU/IOWR

TP
TP
X A18 A17

TP2
VCC
SA19 48 SA18 47
SA20 49 A19 SA19 48 A18
SA21 50 A20 SA20 49 A19

1K
R94
AVCCX 51 A21 SA21 50 A20
AVPP 52 VCC BVCCX 51 A21
SA22 53 VPP2 BVPP 52 VCC
BVPP2 1 SA23 54 A22 SA22 53 VPP2

TP
TP
X

TP3
SA24 55 A23 SA23 54 A22
SA25 56 A24 SA24 55 A23
BVPP2 A5VDET 57 A25 SA25 56 A24
ARST 58 RFU B5VDET 57 A25

BVPP2
AWAIT 59 RES BRST 58 RFU
AINPA 60 WAIT BWAIT 59 RES

54
AREG 61 RFU/INPACK BINPA 60 WAIT
ABVD2 62 REG BREG 61 RFU/INPACK
ABVD1 63 BVD2/SPKR BBVD2 62 REG
AD8 64 BVD1/STAT BBVD1 63 BVD2/SPKR
SA25 SD15 AD9 65 D8 BD8 64 BVD1/STAT
SA24 SD14 AD10 66 D9 BD9 65 D8
SA23 SD13 ACD2 67 D10 BD10 66 D9
SA22 SD12 68 CD2 BCD2 67 D10
GND CD2

GND
SA21 SD11 68
GND
GND

SA20 SD10 -IOR

-IOR
SA19 SD9 -IOW

-IOW
SA18 SD8 AEN

AEN
SA17 SD7
SA16 SD6
SA15 SD5
SA14 SD4
SA13 SD3
SA12 SD2 1 AVCCX R
SA11 SD1 ADRV3 2 S1 8
SA10 SD0 G1 DD1 7

VCC3
SA9 D1
SA8 5
SA7 BDRV3 4 D2 6 ADRV3
SA6 G2 DD2 3 BVCCX
SA5 SD[0..15] S2
SA4 ADRV5

R91

VCC

SD[0..15]
SA3 SA[0..25]

100K

U47
NB
SA2

SA[0..25]
SA1 BDRV3

R90
SA0 1 AVCCX
DIGITAL-LOGIC AG SECRET
ADRV5 2 S1 8 + CONFIDENTAL DOCUMENT
G1 DD1

C43
7 BDRV5

10uF
R89
D1

VCC
100K 100K
DO NOT LEAVE THIS

L4
5
BDRV5 4 D2 6

R88
G2 DD2 3 BVCCX
DOCUMENT UNATTENDED !
DO NOT REPRODUCE ANY PORTIONS OF IT

100K
S2 THIS DOCUMENT IS ISSUED TO YOU ALONE.

GND
INDUCTOR
DO NOT TRANSFER IT TO OTHER PERSON.
STORE THIS DOCUMENT IN A LOCKED CABINET.

U32
THIS DOCUMENT IS THE PROPERTY OF DIGITAL-LOGIC AG
V12XX AND MAY BE REQUIRED TO RETURN IT AT ANY TIME.

VCC
SI9955DY
AVCC3 SLEEPN 2 13 DIGITAL-LOGIC TAKES NO RESPONIBILITY FOR
SHD LX 12 THE FUNCTION AND RELIABILITY OF THIS DESIGN
LX

VCC

SLEEPN
16 11 THIS DESIGN IS ONLY A PROPOSITION.

1K
1 2 +
VCC LX

R87

R86
C109

14

100K
VO

D2
22uF/16V

1N5818
C44
7 6 CCCC
GND

100nF
GND CC

VCC
8 R
BVCC3 9 GND 3 CCC
GND VREF 5
SS

R85
100K
GND
U36
C48
C46

AVPP1 9 8 AVPP1N
2.2nF

100nF

MAX732
1 24
C2 GND

GND
2 DESIGN by Felix Kunz VIS: Date:
C1 23
GND
GND

U3D
VPPIN
C47

3 22
10nF

V1.1 WR VCCIN

GND GND
VCC
AVPP1N 4 21 AVPP DESIGNCHECK: VIS: Date:
AVPP1 AVPP

74HCT04
AVPP1 5 20 BVPP

14SOP150
BVPP1 11 10 BVPP1N BVPP1N 6 AVPP0 BVPP 19
BVPP1 7 BVPP1 VREF 18 SLEEPN VPP
GND

BVPP0 SHDN RELEASED by: VIS: Date:

AVCC3 8 17 AGPI
AVCC 9 AVCC1 AGPI 16 BGPI
BVCC3 10 AVCC0 BGPI

U3E
BVCC 11 BVCC1 15 ADRV3 DIGITAL - LOGIC AG
BVCC0 ADRV3 14 ADRV5
ADRV5

74HCT04
BDRV5 12 13 BDRV3

14SOP150
BDRV5 BDRV3 HAELEGAERTLISTR.10
CH-4515 OBERDORF
Title
S486V-EK
U35
1.0
SM480 Integration manual V1.6

Size Document Number Rev

MAX780

5
A0 SMART 486 EVALUATION KIT 3
Date: Sheet of
Wednesday, December 06, 2000
DIGITAL-LOGIC AG SM480 Integration manual V1.6

7 INDEX

A I
AC97 CODEC 46 IDE interface 13
ATX 45 interfaces 13
IrDA 24, 30, 31, 32

B
M
BUS 13
Mechanical dimensions 15, 18, 19

C
P
Coprocessor 12
PCI Assignments 39
Power Supply 13
D
DesignIn 15 S
Dog 13
schematics 50
Schematics 40, 41
E Signal Lines 33
Signaldefinition 35, 36
EMI / EMC 14 SM480BUS 26
external DRAM 43 smart480 bus 20
external IDE 44 SODIMM 40
Specifications 12, 14, 37
Suspend mode 38
F
Fast IrDA 33
Floppy disk 13

55