5810 IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 66, NO.

8, AUGUST 2019

Robust Analytic Design of

Power-Synchronization Control
Lennart Harnefors , Fellow, IEEE, Marko Hinkkanen , Senior Member, IEEE,
Usama Riaz , F. M. Mahafugur Rahman , and Lidong Zhang, Senior Member, IEEE

Abstract—This paper addresses robust design of the is ineffective. This is because the active power is controlled
active-power and dc-link control loops of power- by injecting a current component in phase with the point-
synchronization control. Robustness is obtained by analytic of-common-coupling (PCC) voltage, whose angle is tracked
gain selections, which give large enough stability margins.
The proposed design allows robust stability irrespective of by a PLL. This works well as long as the PCC voltage is
the grid strength and of the operating point, the latter with reasonably stiff, but not when the grid is very weak and
one exception. The proposed design is compared to design the PCC voltage varies to a great extent with the injected
based on the principle virtual synchronous machine. Ex- current [8].
periments show that the time-domain results correlate well The active-power control loop of PSC is often cascaded with
with the frequency-domain results.
an outer control loop for the dc-link voltage (or, equivalently,
Index Terms—Grid-connected converters, robustness, for the stored dc-link energy). Clearly, the selections of the
stability analysis, voltage-source converters. active-power and dc-link control gains are critical for obtaining
I. INTRODUCTION satisfactory performance in terms of bandwidth and stability
margins. Even though since its conception, PSC has received
OWER-SYNCHRONIZATION control (PSC) of grid-
P connected voltage-source converters belongs to a family
of control schemes where the dynamics of a synchronous ma-
significant attention in the scientific community [5], [9]–[13],
design recommendations for the mentioned two gains are, to the
best knowledge of the authors, so far missing. Selection is often
chine are emulated. The principle is believed first to be suggested made by trial and error. This is undesirable, since robustness of
in [1], there called a virtual synchronous machine (VSM). The the closed-loop system is not guaranteed. Analytic gain selection
PSC variant first appeared in [2] and [3], followed a year later whereby robustness is achieved is preferable, which is the main
by the synchronverter [4]. focus of the paper.
The three variants of synchronous-machine emulating con- The contributions and outline of the paper are as follows.
trol share the main features, fundamentally that the active power After setting the stage in Section II, in Section III the converter–
is controlled—as in a synchronous machine—by adjusting the grid interaction analysis for a purely inductive grid impedance
converter-voltage angle [3]–[7]. A phase-locked loop (PLL) made in [3] is revisited and slightly amended. The principal
does not have to be used, at least not during normal operation result thereof is an analytic selection recommendation for the
[3], [6]. active-power control gain, whereby adequate stability margins
Yet, the objectives are different. While the VSM and the of the active-power control loop always are obtained. This gives
synchronverter were conceived mainly for the purpose of grid a robust design, which allows the same controller tuning to be
forming—including the provision of a virtual inertia—PSC used, irrespective of the short-circuit ratio (SCR) of the grid and
was conceived in order to enable a stable converter inter- of the operating conditions. Both may vary, the former perhaps
connection with a very weak grid. In such a situation, the in an unknown way. For the recommended gain selection, a
standard principle of vector current control with outer loops transfer function for the closed-loop system from the active-
power reference to the obtained active power is derived. This
Manuscript received March 28, 2018; revised June 7, 2018 and August allows the properties of the closed-loop system to be quantified,
22, 2018; accepted September 13, 2018. Date of publication October 12,
2018; date of current version March 29, 2019. This work was supported
which is useful for the design of the dc-link control loop. Under
in part by ABB, in part by the Finnish Foundation for Technology Pro- the assumption that the integral action of the dc-link controller
motion, and in part by the Walter Ahlström Foundation. (Corresponding can be kept weak, a robust design of the dc-link control gain
author: Lennart Harnefors.)
L. Harnefors and L. Zhang are with the ABB, Corporate Research,
is made, also in Section III. Robust performance with adequate
72178 Västerås, Sweden (e-mail:, lennart.harnefors@se.abb.com; bandwidth is verified, except in certain cases of high reactive-
lidong.zhang@se.abb.com). current injection.
M. Hinkkanen, U. Riaz, and F. M. Mahafugur Rahman are with
the School of Electrical Engineering, Aalto University, 02150 Es-
In Section IV, VSM design, where the active-power control
poo, Finland (e-mail:, marko.hinkkanen@aalto.fi; usama.riaz@aalto.fi; gain is selected based on a specified frequency droop and where
f.rahman@aalto.fi). virtual inertia may be included, is revisited and compared to the
Color versions of one or more of the figures in this paper are available
online at http://ieeexplore.ieee.org.
proposed design.
Digital Object Identifier 10.1109/TIE.2018.2874584 Experimental results are presented in Section V.

0278-0046 © 2018 IEEE. Personal use is permitted, but republication/redistribution requires IEEE permission.
See http://www.ieee.org/publications standards/publications/rights/index.html for more information.

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HARNEFORS et al.: ROBUST ANALYTIC DESIGN OF POWER-SYNCHRONIZATION CONTROL 5811

Fig. 1. Circuit model of a grid-connected voltage-source converter.

II. SYSTEM MODEL AND PSC PRINCIPLE

Fig. 2. Block diagram of PSC.
The traditional grid model consisting of an inductance L
behind an infinite bus is adopted [3], see Fig. 1. The series
Remark: Throughout this paper, ω1 is considered to be the
resistance R is, henceforth, neglected. L is the sum of the filter
nominal angular synchronous frequency. Particularly during
inductance of the converter, the inductance of the transformer,
grid disturbances, the local instantaneous angular grid frequency
which interfaces the converter to the grid (if such is used),
ωg = dθ/dt may differ from ω1 . Then, from (4), we have the
and the grid inductance. The circuit model shown in Fig. 1 is
following:
obtained, where vs and vgs , respectively, are the space vectors
for the converter voltage and the grid voltage, whereas is is the 1
P = Pref + (ω1 − ωg ). (6)
space vector for the converter output current. The superscript s Kp
denotes that the space vector is expressed in the stationary αβ
That is, PSC inherently adds a frequency droop, with droop gain
frame, i.e., it rotates with the angular synchronous frequency ω1 .
1/Kp , to the active-power reference [16].
The corresponding dq-frame space vector is denoted without a
Equation (3) shall not be implemented as it stands, because
superscript, e.g., i.
a poorly damped closed-loop system would result. The rem-
The grid voltage is considered stiff, i.e., its magnitude Vg
edy is to subtract a term with gain Ra —the so-called active
is constant and the space vector rotates with the synchronous
resistance—from the converter voltage [3]. The term consists of
frequency. Fig. 1 gives the following:
a high-pass filtering of the synchronous dq-frame current vector
vs − sLis = vgs = Vg ej ω 1 t (1) i = e−j θ is
s
where s = d/dt. To avoid having to split L into the grid and v = V − Ha (s)i, Ha (s) = Ra . (7)
s + ωb
converter inductances, the SCR is here defined as seen from the
converter terminals. This gives a lower value than the SCR seen The filter bandwidth ωb shall be selected smaller than ω1 , typi-
from the PCC, but has otherwise no impact on the results. With cally in the range 0.1ω1 –0.2ω1 , i.e., 0.1–0.2 p.u. [9], [12]. Vector
this definition, the SCR is the inverse per-unit (p.u.) value of L v is then αβ transformed as vs = ej θ v, still with θ given by
(4). Vector vs serves as a reference to the pulsewidth modulator,
1
SCR = . (2) whose impact (time delay and added harmonics) here is disre-
L [p.u.] garded. Fig. 2 shows the resulting block diagram. In addition
The fundamental principle of PSC is to select the converter to the algorithm described above, the block diagram includes
voltage as an embedded current controller (CC). It is transparent during
normal operation but acts to limit the current during transients
vs = V ej θ (3) when needed [2], [3]. This is particularly important for fault
ride through [15]. The CC is not impacted by the robust design
where V is the converter-voltage magnitude. V may be varied
proposed in this paper and is, therefore, not considered further.
in a closed control loop for the PCC voltage or the reactive
power [3], [14]. However, for space constraints it is assumed that
this control loop—if used—is slow enough to be disregarded, III. ANALYSIS AND ROBUST DESIGN
allowing V to be considered constant. Angle θ is governed by Based on analysis of the dynamics obtained by PSC, a robust
the control law as follows: design of the active-power control loop is made in this section,
dθ followed by a robust design of the dc-link control loop.
= ω1 + Kp (Pref − P ) (4)
dt
A. Open-Loop Dynamics
where Kp is the active-power control gain, P is the active output
power of the converter In [3], the response ΔP in the active power to an angu-
lar perturbation Δθ is derived, i.e., the open-loop response. In
3
P = κRe{vs (is )∗ } = κRe{vi∗ }, κ= (5) Appendix I, a variant of this derivation is presented. Unlike
2K 2 [3], the effect of the active resistance is accounted for from the
and Pref is the active-power reference. In (5), K is the space- beginning, whereas R is neglected. This gives a different numer-
vector scaling constant. For p.u. normalization
 of the quantities ator of the open-loop transfer function Gθ P (s) from Δθ to ΔP
or power-invariant vector scaling (K = 3/2), κ = 1. than that derived in [3]. Another difference is that the numerator

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5812 IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 66, NO. 8, AUGUST 2019

as follows:
Kp Gθ P (s) Gp (s)
Gp (s) = Gc (s) = . (12)
s 1 + Gp (s)
1) Gain Selection for Robust Stability: The stability of
Gc (s) can be analyzed by applying the Nyquist criterion to
Fig. 3. Linearized closed-loop system. Gp (s). On the one hand, for robustness, the phase and gain
margins φm and gm need to be sufficiently large; an established
recommendation is φm ≥ 45◦ and gm ≥ 2 [17]. On the other
coefficients—which are operating-point dependent—are here
hand, too large stability margins may impair the bandwidth of
expressed in the components of the steady-state dq-frame con-
the closed-loop system. A design that aims at the minimum rec-
verter current i0 = id0 + jiq 0 . As the steady-state complex out-
ommended gain margin is therefore sought. This is formulated
put power at the converter terminals is given by
as the following theorem.
κv0 i∗0 = κV (id0 − jiq 0 ) (8) Theorem 1: Selecting

it follows that id0 and −iq 0 , respectively, are proportional to the ω1 R a

Kp = (13)
active and reactive output powers. Hence, iq 0 < 0 and iq 0 > 0, κV 2
respectively, correspond to injection and absorption of reactive gives gm ≥ 2 of Gp (s) for a negligible ωb [implying Ha (s) =
current. From Appendix I, the following transfer function is Ra ], irrespective of the operating point (V, id0 , iq 0 ) and the SCR.
obtained: Proof: See Appendix II. 
κV 2 as2 + [1 + a + b(s)]ω12 The following may be noted concerning the recommended
Gθ P (s) =  2 (9) gain selection.
ω1 L
s2 + 2HLa (s) s + ω12 + H aL(s) 1) Since the desired gain margin is always obtained and (13)
is free of L, i.e., knowledge of the SCR is not needed,
where the design gives robust stability provided that the phase
 
ω1 Liq 0 Ha2 (s) iq 0 |i0 |2 margin is sufficient. That so is the case exemplified later.
a= b(s) = − + . (10) 2) Kp is selected inversely proportional to V 2 and should be
V V ω1 L V
gain scheduled with any variations in V . During normal
The following observations can be made. operation, this has a marginal effect, as V is kept at or
1) A marginally stable system is obtained for Ra = 0 ⇒ near the nominal voltage (1 p.u.). However, it is important
Ha (s) = 0. (Since, in practice, 0 < R  Ra , asymptotic during fault-ride-through situations, when V temporarily
stability is yet obtained, but with very poor damping [3].) may need to be reduced to a value much lower than the
2) As ωb → 0, the high-pass filter reduces to the pure active nominal, in order to avoid overcurrent. Keeping Kp at
resistance, i.e., Ha (s) → Ra . Consequently, (9) reduces its nominal value during such situations may give insuf-
to a second-order system. The poles of (9) are then located ficient gain.
at s = −Ra /L ± jω1 , i.e., the damping increases with 2) Closed-Loop Transfer Function: Applying (13), inter-
the SCR. esting observations of the closed-loop transfer function can be
3) The static gain Gθ P (0) is proportional to 1 + a + b(0) made. Again, assuming a negligible ωb —giving Ha (s) = Ra
and is, thus, operating-point dependent. High injection and making b independent of s—the following transfer function
of reactive current, giving a < 0, reduces the gain. This, is obtained:
in turn, reduces the bandwidth of the closed-loop system
(see Section III-B).
Ra
[as2 + (1 + a + b)ω12 ]
Gc (s) = (2+a)R a
L
(1+a+b)ω 12 R a
.
4) Equation (10) shows that the static gain is affected by the s3 + L s2 + [ω12 + ( RLa )2 ]s + L
active resistance as well, via b(s). (14)
5) For reactive-current injection, there is a right-half-plane An approximate factorization of the denominator is available
zero, giving nonminimum-phase behavior. This too has a 2 2
L [as + (1 + a + b)ω1 ]
Ra
limiting effect on the closed-loop bandwidth [3]. Gc (s) ≈ . (15)
(1+a+b)R a
[s + L ][s2 + (1−b)R
L
a
s+ ω12 ]
B. Closed-Loop Dynamics
Expanding the denominator polynomial of (15), all coefficients
The active-power control law (4) can be expressed in pertur- except that for s match those of (14). The mismatch of the
bation variables as coefficient for s is negligible for |a|  1 and |b|  1.
Kp The following observations of (15) can be made.
Δθ = (ΔPref − ΔP ). (11) 1) There is a pole pair, whose relative damping increases
s
with the SCR, as follows:
Equations (38) (see Appendix I) and (11) together form
the closed-loop system shown in Fig. 3, whose open-loop (1 − b)Ra
ζ= . (16)
and closed-loop transfer functions, respectively, are given 2ω1 L

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HARNEFORS et al.: ROBUST ANALYTIC DESIGN OF POWER-SYNCHRONIZATION CONTROL 5813

2) There is a real pole, at s = −(1 + a + b)Ra /L, which

dominates for a weak grid with Ra /L < ω1 . The min-
imum bandwidth of Gc (s) for low converter current (a
and b small) is, thus,
Ra
ωc,m in ≈ (17)
Lm ax
Fig. 4. DC-link control loop.
where Lm ax is the maximum expected grid inductance
(Lm ax = 1 p.u. if SCR ≥ 1). where Pd is dc-source power. The dc-link energy is related
3) For a strong grid with Ra /L > ω1 , the pole pair domi- to the dc-link voltage vd and the dc-link capacitance Cd as
nates. If ζ < 1, the pole pair is complex and the distance Wd = (Cd /2)vd2 . Often, Pd is known and can be fed forward,
from each pole to the origin is ω1 ; consequently, the max- possibly low-pass filtered (Pdf ), in the dc-link control law
imum obtainable bandwidth of Gc (s) is
Pref = Fd (s)(Wd − Wdref ) + Pdf (23)
ωc,m ax ≈ ω1 . (18)
where Wdref
is the reference energy and Fd (s) is the dc-link
This explains why PSC has been found to be inferior to
controller transfer function. With feedforward, the dc-link con-
vector current control for strong grids: The bandwidth of
troller can be given weak integral action, allowing Fd (s) to be
the closed-loop system is inherently limited.
approximated as a proportional controller Fd (s) = Kd . Having
4) Too large Ra may give a significant bandwidth reduction
the dimension angular frequency, gain Kd can be considered as
for weak as well as for strong grids. Suppose, for example,
the ideal dc-link control-loop bandwidth.
that Ra = 1 p.u., iq 0 = 0, and V = 1 p.u. Then, it follows
Together with the active-power control loop, (22) and (23)
from (10) that b → −1 as |id0 | → 1 p.u., i.e., the real pole
form the closed-loop system shown in Fig. 4, whose open-loop
approaches the origin and the bandwidth approaches zero.
transfer function is Gd (s) = Kd Gc (s)/s. A robust design of
As a compromise between low impact on the bandwidth
the dc-link control gain can be made in a similar fashion as
and good enough damping of the pole pair, it is suggested
of the active-power control gain. To allow for a large enough
to select
phase margin (as exemplified below), this time, a minimum gain
Ra = 0.2 p.u. (19) margin of 4 is aimed at.
Theorem 2: Selecting
Then, b may be neglected and the relative damping as 
given by (16) can be expressed as follows: ω1 1 − b
Kd ≤ (24)
ζ = 0.1 SCR. (20) 4 2+a
gives gm ≥ 4 of Gd (s) for a negligible ωb .
5) High reactive-current injection (iq 0 < 0) may signifi-
Proof: See Appendix IV. 
cantly limit the bandwidth, to
  Owing to selection recommendation (19) of Ra ,√b can be
Ra ω1 Liq 0 Ra neglected
 in (24). Yet, because of the factor 1/ 2 + a =
ωc,rci ≈ (1 + a) = 1+ . (21)
L V L 1/ 2 + ω1 Liq 0 /V , (24) requires knowledge of L, i.e., of the
This is a risk particularly in fault-ride-through situations, SCR. However, this is an issue only for high reactive current, as
where grid codes often require reactive-current injection; otherwise a can be neglected. Furthermore, if restriction is made
see [18] and the publications cited therein. The risk is to (high) reactive-current injection,1 i.e., −1 ≤ a < 0 (where
present for weak grids (L large) as well as for strong the lower limit −1 is established in Appendix III), then (24) is
grids (when V may need to be reduced to avoid overcur- fulfilled by the selection recommendation
rent). Since the lower limit for a is −1 (see Appendix III), ω1
Kd = √ ≈ 0.18ω1 . (25)
ωc,rci approaches zero in the worst of situations [but then, 4 2
however, the accuracy of the factorization in (15) deterio- Recommendation (25) for a 50-Hz grid gives an ideal bandwidth
rates, as no longer |a|  1]. Nevertheless, bandwidth re- of Kd = 56 rad/s, which should be sufficient in many cases.
duction of Gc (s) for high reactive-current injection needs Example 1: Fig. 5 shows Nyquist diagrams for the active-
to be accounted for if the PSC is cascaded with a dc-link power and dc-link control loops, all for V = ω1 = 1 p.u., κ = 1,
controller, which is considered next. ωb = 0.1 p.u., and the recommended parameter selections (13),
(19), and (25) [(12)—not the special case (14)—is used for
C. DC-Link Control Loop Gc (s) in Gd (s) = Kd Gc (s)/s]. Two operating conditions are
DC-link control can be added as an outer loop in cascade considered, both for full current (|i0 | = 1 p.u.): high active-
with the active-power control loop. If the converter losses are current injection (upper subplots) and high reactive-current in-
neglected, the dc-link dynamics can be expressed in the energy jection (lower subplots). The latter condition is characteristic
Wd stored in the dc link as 1 This restriction is relevant, as high reactive-current injection, e.g., for grid-
dWd code compliance, is more common a scenario than high reactive-current absorp-
= Pd − P (22) tion [18].
dt

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5814 IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 66, NO. 8, AUGUST 2019

Fig. 6. PSC with an added low-pass filter for virtual inertia and
damping.

Virtual inertia can be added by emulating the swing equation

of a synchronous machine
dωg dθ
M = Pg − P − KD (ωg − ωf ) = ωg (26)
dt dt
where M is the ω1 -scaled virtual inertia, ωg is the virtual ma-
chine speed (which, since θ is formed by integrating ωg , also
is the local angular grid frequency), Pg is the virtual governor
power, KD is the virtual mechanical damping constant, and ωf
is a low-pass filtering of ωg through αf /(s + αf ) [22]. Thus,
(26) can be equivalently expressed as follows:
Fig. 5. Nyquist diagrams for (solid) SCR = 10, (dashed) SCR = 3, and 1
(dashed-dotted) SCR = 1. [sM + D(s)] ωg = Pg − P ωg θ= (27)
s
where D(s) = KD s/(s + αf ). M can be expressed in the iner-
for a fault situation, when the grid voltage is depressed and tia constant H (with dimension time) and in the rated apparent
reactive current is injected to keep the converter voltage up. power of the converter Sbase as [23] and [24]
Three values of L are considered, corresponding to SCR = 10,
2Sbase H
SCR = 3, and SCR = 1, respectively, i.e., a strong, a fairly M= . (28)
weak, and a very weak grid. ω1
For Gp (s) it can be observed that gm > 2 in all cases, even Unlike the governor of a synchronous machine, Pg can be ad-
though ωb > 0, contrary to the restriction in Theorem 1. Inter- justed without lag and is set by adding a frequency droop to the
estingly, the smallest phase margin is obtained for SCR = 10. active-power reference [16], [22]
For Gd (s) some curves show slightly smaller gain margin Sbase
than the desired minimum 4, because ωb > 0, contrary to the Pg = Pref + Kg (ω1 − ωg ), Kg = (29)
σω1
restriction in Theorem 2. Yet, sufficient stability margins are
obtained in all cases but for the very-weak-grid case with high where σ is the droop in percentage of the VSM power rating.
reactive-current injection. A low phase margin in this case is Combining (27) and (29), the feedback loop formed by the
a result of the reduced bandwidth of Gc (s) according to (21). frequency droop can be resolved in a low-pass filter with unity
A similar reduction of the phase margin is obtained with high static gain

reactive-current injection for a stronger grid and a depressed 1 Kg 1
voltage magnitude (V significantly smaller than 1 p.u.). θ= ω1 + (Pref − P ) . (30)
s sM + D(s) + Kg Kg
(For KD = 0 ⇒ D(s) = 0, a first-order low-pass filter with
IV. VSM DESIGN
time constant M/Kg = 2σH is obtained.) Since ω1 is the nom-
The objective of the VSM is to provide grid forming by means inal angular synchronous frequency and thus is constant, the
of frequency droop and virtual inertia. The former is inherent in entry point of ω1 can be relocated to the output of the low-pass
PSC [see (6)], whereas the latter can be introduced by adding filter, as shown in Fig. 6. The frequency droop (29) gives the
a low-pass filter to the PSC control law [2], [16]. The purpose gain selection [which can also be obtained by comparing (6)
of this section is to compare the robust design proposed in and (29)]
Section III to typical VSM designs.
1 σω1
For a VSM, the dc-source power Pd has to be controllable to Kp = = . (31)
allow the active output power P to respond to grid-frequency Kg Sbase
variations. This requires either dc-side energy storage [19], [20] If the droop is selected similar to that of the synchronous ma-
or a dc-side power source with headroom for increased output chines in the grid, typically σ = 0.04—0.05, the VSM gives
[21]. For VSM design it is, therefore, preferable to perform a corresponding contribution to the primary frequency control.
dc-link control via Pd rather than in cascade with the active- On the one hand, with V = ω1 = 1 p.u., the proposed design
power control loop (the latter would, in fact, counteract the (13), with (19), gives Kp = 0.2 p.u. VSM design (31), on the
grid-forming property). other hand, gives Kp = σ [p.u.] for Sbase = 1 p.u., i.e., typically

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HARNEFORS et al.: ROBUST ANALYTIC DESIGN OF POWER-SYNCHRONIZATION CONTROL 5815

Fig. 7. Nyquist curves for (solid) the proposed design (13) and
(dashed) VSM design (31), in both cases with K d selected as (25).
The dashed-dotted curve shows VSM design with K d selected as 30%
of (25).
Fig. 8. Nyquist curves for VSM design with (solid) H = K D = 0,
(dashed) H = 5 s and K D = 0, and (dashed-dotted) H = 5 s, K D =
a much smaller gain. The implications thereof are studied in the 50 p.u., and α f = 1 rad/s.
following two examples.
Example 2: VSM design with H = 0 (called VSM0H [25]),
KD = 0, and σ = 0.05 is compared to the proposed design.
For completeness, cascaded dc-link control is also studied,
even though this is not recommended for VSM design. Fig. 7
shows Nyquist diagrams for the active-power and dc-link con-
trol loops, both for V = ω1 = Sbase = 1 p.u., κ = 1, and the
recommended parameter selections (19) and (25). A relatively
weak grid (SCR = 2) and relatively high active- and reactive-
current injection (id0 = −iq 0 = 0.7 p.u.) are considered. The
following can be observed.
1) Owing to a much smaller Kp , VSM design gives larger
stability margins of Gp (s) than those of the proposed de-
sign, i.e., further improved robustness of the active-power
control loop. This may explain why an active resistance
is absent in the synchronverter [4].
2) The smaller Kp of VSM design is paid for by reduced
robustness of Gd (s) in the form of a fairly small phase Fig. 9. Experimental setup.
margin. To obtain a similar phase margin as with the
proposed design, Kd needs to be reduced to 30% of (25),
see the dashed-dotted curve in Fig. 7(b). Consequently,
the dc-link capacitance has to be 3.3 times larger than for
the proposed design if similar dc-link-voltage fluctuations
during transients and disturbances are to be obtained. This
clearly shows that, with VSM design, it is preferable to
control the dc link via the dc-source power.
Example 3: A virtual inertia H = 5 s (for a synchronous
frequency of 50 Hz) is now included in the control law (30),
still with σ = 0.05. This significantly reduces the phase margin
of Gp (s) as compared to H = 0, as demonstrated by the solid Fig. 10. Schematic of the experimental setup.
and dashed curves in Fig. 8. As shown by the dashed-dotted
curve, the phase margin can be increased by introducing virtual converter system, which is illustrated in Figs. 9 and 10 and
mechanical damping. Cascaded dc-link control is effectively whose data are given in Table I. The converter is controlled by
impossible with H in the range of seconds. The lag incurred a dSPACE DS1006 processor board. Forward-difference dis-
from the low-pass filter in (30) would require Kd to be cretization of the continuous-time transfer functions is used.
much smaller than (25), for the dc-link control loop to be Peak-value space-vector scaling (i.e., K = 1) is used. The
stable. active-power control loop uses gain selection (13).

V. EXPERIMENTAL RESULTS A. Active-Power Control Only

The proposed robust PSC design is verified here exper- Pref is here set manually; the dc-link voltage is controlled
imentally on a back-to-back (grid and dc-source) two-level by the dc-source converter. Figs. 11, 12, and 13 show results
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5816 IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 66, NO. 8, AUGUST 2019

TABLE I
TEST-SYSTEM DATA

Fig. 13. Active-power control only for SCR = 10.

Fig. 11. Active-power control only for SCR = 1.

Fig. 14. Active-power control only for SCR = 10, respose to grid-
frequency transients in the active power and the phase-a current.

for four successive steps in Pref , respectively, for three SCRs,

i.e., very weak, semi-weak, and strong grids. The following
observations can be made.
1) Adequate performance is verified for all three SCRs,
showing that the design is robust.
2) For SCR = 1—owing to the (complex-conjugated) pole
pair in (15)—there is slight ringing in the step-response
transients. However, there is no overshoot, since the real
pole in (15) dominates the step response.
3) For SCR = 3, the real pole in (15) is located further from
the origin, so the rise time is shorter. Improved damping
of the pole pair in (15) reduces the ringing to a small
Fig. 12. Active-power control only for SCR = 3. overshoot.

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HARNEFORS et al.: ROBUST ANALYTIC DESIGN OF POWER-SYNCHRONIZATION CONTROL 5817

Fig. 15. Cascaded dc-link and active-power control for SCR = 1.

Fig. 17. Cascaded dc-link and active-power control for SCR = 10.

B. Cascaded DC-Link and Active-Power Control

Here, steps of ±0.2 p.u. about the nominal dc-link-voltage
reference 2 p.u. are made, again for three SCRs (see Figs. 15,
16, and 17). The best performance in terms of short rise time
and small overshoot (ringing) of the dc-link voltage is obtained
for SCR = 3. This is consistent with the Nyquist curves of
Gd (s) for id0 = 0.95 p.u. (although here id0 = 0.6 p.u.) shown
in Fig. 5. The curve for SCR = 3 has the lowest sensitivity peak,
i.e., the largest minimum distance to −1. Yet, all three cases
show satisfactory performance, verifying the robustness of (25).

VI. CONCLUSION
Robust design recommendations for the active-power and
dc-link control gains of PSC were presented in this paper. Al-
though the derivations rely on some simplifying assumptions,
robust performance irrespective of the SCR and of the operating
point (with the possible exception of very high reactive-current
injection) was verified experimentally. The proposed design was
compared to VSM design, showing that for zero virtual inertia
(VSM0H), even better robustness of the active-power control
Fig. 16. Cascaded dc-link and active-power control for SCR = 3.
loop is typically obtained than for the proposed design. With vir-
tual inertia, adding virtual mechanical damping is recommended
in order to obtain an adequate phase margin. With VSM design,
4) For SCR = 10, yet slightly shorter rise time is obtained, cascaded dc-link control is not recommended or is impossi-
but because of the reduced phase margin of Gp (s)—see ble. The proposed design recommendation for the active-power
Fig. 5—larger overshoot is obtained. control gain is, thus, particularly suitable for cascaded dc-link
In addition, Fig. 14 illustrates the effect of transients in the control.
grid frequency. In adherence with (6), for Kp = 0.2 p.u. there A suitable topic for further research is to study the impact of
is a 0.1-p.u. power increase for a 0.02-p.u. frequency drop. fast-acting PCC-voltage or reactive-power control together with

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5818 IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 66, NO. 8, AUGUST 2019

the proposed design. As shown in [14], the active- and reactive- Applying (13) yields
power control loops may have a nonnegligible interaction.
1 + ( ωR1 aL )2
gm = 2 ≥ 2. (40)
APPENDIX I 1 − ( R aV|i 0 | )2
Unlike in [3], complex transfer functions are here used, ≥1
thereby obtaining simpler expressions. To facilitate lineariza-
tion of (3) and (5), θ is expressed as follows: APPENDIX III
θ = ω1 t + θ0 + Δθ i = i0 + Δi (32) Taking the real part of (35) gives V + ω1 Liq 0 = Vg cos θ0 ,
which also can be expressed as
where the load angle is confined to −π/2 ≤ θ0 ≤ π/2. This
allows (1) to be transformed to the dq frame as ω1 Liq 0 Vg
a= = cos θ0 − 1. (41)
V V
v − [s + j (ω1 + Δ̇θ)]Li = Vg e−j (θ 0 +Δ θ ) . (33)
Since the load angle is confined as |θ0 | ≤ π/2, cos θ0 ≥ 0, and
θ̇ consequently a ≥ −1.
From (7), Δv = −Ha (s)Δi, which is substituted in (33). Ap-
proximating e−j Δ θ ≈ 1 − jΔθ, and neglecting cross terms be- APPENDIX IV
tween perturbation variables yields, after simplification
Solving for ω in Im{Gd (jω)}
 = 0 for ωb = 0 yields the phase
[Ha (s) + (s + jω1 )L] Δi = j(Vg e−j θ 0 − sLi0 )Δθ crossover frequency ωπ = (1 − b)/(2 + a)ω1 . The gain mar-
gin is found to be
+ V − jω1 Li0 − Vg e−j θ 0 . 
(34) 1 1 (1 − b)ω12 L Ra
gm = − = + . (42)
Gd (jωπ ) Kd (2 + a)Ra 2L
The last three terms on the right-hand side of (34) must sum up
√
to zero, i.e., The minimum value of (42) is obtained for L = 2Ra /ω1 and
V − jω1 Li0 = Vg e−j θ 0 . (35) is given by

Equation (34) now yields the following complex-transfer- ω1 1−b
gm ,m in = . (43)
function relation between Δθ and Δi: Kd 2 + a
j[V − (s + jω1 )Li0 ] Hence, to get gm ≥ 4, (24) should be observed.
Δi = Δθ (36)
Ha (s) + (s + jω1 )L
G θ i (s)
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HARNEFORS et al.: ROBUST ANALYTIC DESIGN OF POWER-SYNCHRONIZATION CONTROL 5819

[12] S. I. Nanou and S. A. Papathanassiou, “Grid code compatibility of VSC- Marko Hinkkanen (M’06–SM’13) received the
HVDC connected offshore wind turbines employing power synchroniza- M.Sc. (Eng.) and D.Sc. (Tech.) degrees in elec-
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Nov. 2016. Technology, Espoo, Finland, in 2000 and 2004,
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synchronization control for connecting a VSC-MTDC to an ac power He is an Associate Professor with the School
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and ac network based on PSCAD simulation,” in Proc. 12th IET Int. Conf. Espoo, Finland. His research interests include
AC DC Power Transmiss., May 2016, pp. 1–6. control systems, electric drives, and power
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tual synchronous generators,” IEEE Trans. Ind. Electron., vol. 64, no. 7, Dr. Hinkkanen was a General Cochair for the
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grid by VSC-HVDC links using power-synchronization control: A case Conference on Electrical Machines (ICEM) Brian J. Chalmers Best Pa-
study,” IEEE Trans. Power Del., vol. 29, no. 1, pp. 453–461, Feb. 2014. per Award and the 2016 and 2018 IEEE Industry Applications Society
[16] J. Liu, Y. Miura, and T. Ise, “Comparison of dynamic characteristics Industrial Drives Committee Best Paper Awards. He is an Editorial Board
between virtual synchronous generator and droop control in inverter- Member for the IET Electric Power Applications.
based distributed generators,” IEEE Trans. Power Electron., vol. 31, no. 5,
pp. 3600–3611, May 2016.
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and PLL frequency based stability solution,” IEEE Trans. Power Syst., trical engineering from the National University
vol. 29, no. 4, pp. 1683–1691, Jul. 2014. of Science and Technology (NUST), Islamabad,
[19] K. C. Divya and J. Østergaard, “Battery energy storage technology for Pakistan, in 2015, and the M.Sc. (Tech.) degree
power systems—An overview,” Elect. Power Syst. Res., vol. 79, no. 4, in automation and electrical engineering from
pp. 511–520, Apr. 2009. Aalto University, Espoo, Finland, in 2018.
[20] U. Manandhar et al., “Energy management and control for grid He is currently a Research Assistant with
connected hybrid energy storage system under different operating the School of Electrical Engineering, Aalto Uni-
modes,” IEEE Trans. Smart Grid, 2018, to be published, doi: versity, Espoo, Finland. His research interests
10.1109/TSG.2017.2773643. include control of electric drives and grid con-
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2017. electronics and electrical engineering from Aalto
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future power networks with high penetrations of converters,” in Proc. is currently working toward the D.Sc.(Tech.) de-
Power Syst. Comput. Conf., Jun. 2016, pp. 1–7. gree in electrical engineering.
His research interests include optimization
and control of grid-connected converters.

Lennart Harnefors (S’93–M’97–SM’07–F’17)

received the M.Sc., Licentiate, and Ph.D.
degrees in electrical engineering from the
Royal Institute of Technology (KTH), Stockholm,
Sweden, in 1993, 1995, and 1997, respectively, Lidong Zhang (M’07–SM’11) was born in
and the Docent (D.Sc.) degree in industrial au- Shanxi province, China. He received the B.Sc.
tomation from Lund University, Lund, Sweden, degree from the North China Electric Power
in 2000. University, Baoding, China, the Licentiate de-
Between 1994 and 2005, he was with gree from Chalmers University of Technology,
Mälardalen University, Västerås, Sweden, from Göteborg, Sweden, and the Ph.D. degree from
2001 as a Professor of electrical engineering. KTH Royal Institute of Technology, Stockholm,
Between 2001 and 2005, he was, in addition, a part-time Visiting Profes- Sweden, in 1991, 1999, and 2010, respectively,
sor of electrical drives with Chalmers University of Technology, Göteborg, all in electrical engineering.
Sweden. Since 2005, he has been with ABB, where he is currently a Se- From 1991 to 1996, he was a Lecturer
nior Principal Scientist at Corporate Research, Västerås, Sweden. He with the North China Electric Power University,
is, in addition, a part-time Adjunct Professor of power electronics with Beijing, China. From 1999 to 2011, he was a System Engineer with ABB
KTH. His research interests include control and dynamic analysis of Power Systems, Ludvika, Sweden. Since 2012, he has been with the
power electronic systems, particularly grid-connected converters and ac ABB Corporate Research, Västerås, Sweden, where he is currently a
drives. Principal Scientist. His research interests include HVDC, power system
Dr. Harnefors is an Associate Editor for the IEEE TRANSACTIONS ON stability and control, and power quality. He is active in the Cigre working
INDUSTRIAL ELECTRONICS groups C4/C1/B4 and B4-57.

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