PIC18F Instruction Manual-3

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PIC18F2420/2520/4420/4520

28/40/44-Pin Enhanced Flash Microcontrollers with


10-Bit A/D and nanoWatt Technology
Power Management Features: Peripheral Highlights (Continued):
• Run: CPU on, Peripherals on • Master Synchronous Serial Port (MSSP) module
• Idle: CPU off, Peripherals on Supporting 3-Wire SPI (all 4 modes) and I2C™
• Sleep: CPU off, Peripherals off Master and Slave modes
• Ultra Low 50nA Input Leakage • Enhanced Addressable USART module:
• Run mode Currents Down to 11 µA Typical - Supports RS-485, RS-232 and LIN/J2602
• Idle mode Currents Down to 2.5 µA Typical - RS-232 operation using internal oscillator
• Sleep mode Current Down to 100 nA Typical block (no external crystal required)
• Timer1 Oscillator: 900 nA, 32 kHz, 2V - Auto-wake-up on Start bit
• Watchdog Timer: 1.4 µA, 2V Typical - Auto-Baud Detect
• Two-Speed Oscillator Start-up • 10-Bit, up to 13-Channel Analog-to-Digital (A/D)
Converter module:
Flexible Oscillator Structure: - Auto-acquisition capability
• Four Crystal modes, up to 40 MHz - Conversion available during Sleep
• 4x Phase Lock Loop (PLL) – Available for Crystal • Dual Analog Comparators with Input Multiplexing
and Internal Oscillators
• Programmable 16-Level High/Low-Voltage
• Two External RC modes, up to 4 MHz Detection (HLVD) module:
• Two External Clock modes, up to 40 MHz
- Supports interrupt on High/Low-Voltage Detection
• Internal Oscillator Block:
- Fast wake from Sleep and Idle, 1 µs typical Special Microcontroller Features:
- 8 use-selectable frequencies, from 31 kHz to • C Compiler Optimized Architecture:
8 MHz
- Optional extended instruction set designed to
- Provides a complete range of clock speeds
optimize re-entrant code
from 31 kHz to 32 MHz when used with PLL
- User-tunable to compensate for frequency drift • 100,000 Erase/Write Cycle Enhanced Flash
• Secondary Oscillator using Timer1 @ 32 kHz Program Memory Typical
• Fail-Safe Clock Monitor: • 1,000,000 Erase/Write Cycle Data EEPROM
- Allows for safe shutdown if peripheral clock stops Memory Typical
• Flash/Data EEPROM Retention: 100 Years Typical
Peripheral Highlights: • Self-Programmable under Software Control
• High-Current Sink/Source 25 mA/25 mA • Priority Levels for Interrupts
• Three Programmable External Interrupts • 8 x 8 Single-Cycle Hardware Multiplier
• Four Input Change Interrupts • Extended Watchdog Timer (WDT):
• Up to 2 Capture/Compare/PWM (CCP) modules, - Programmable period from 4 ms to 131s
one with Auto-Shutdown (28-pin devices) • Single-Supply 5V In-Circuit Serial
• Enhanced Capture/Compare/PWM (ECCP) Programming™ (ICSP™) via Two Pins
module (40/44-pin devices only): • In-Circuit Debug (ICD) via Two Pins
- One, two or four PWM outputs • Wide Operating Voltage Range: 2.0V to 5.5V
- Selectable polarity • Programmable Brown-out Reset (BOR) with
- Programmable dead time
Software Enable Option
- Auto-shutdown and auto-restart
-

Program Memory Data Memory MSSP


EUSART

CCP/
10-Bit Timers
Device Flash # Single-Word SRAM EEPROM I/O ECCP Master Comp.
A/D (ch) SPI 8/16-Bit
(bytes) Instructions (bytes) (bytes) (PWM) I2C™
PIC18F2420 16K 8192 768 256 25 10 2/0 Y Y 1 2 1/3
PIC18F2520 32K 16384 1536 256 25 10 2/0 Y Y 1 2 1/3
PIC18F4420 16K 8192 768 256 36 13 1/1 Y Y 1 2 1/3
PIC18F4520 32K 16384 1536 256 36 13 1/1 Y Y 1 2 1/3

© 2008 Microchip Technology Inc. DS39631E-page 1

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