M ULTISTAGE A MPLIFIERS ◆ 301

6–6 M ULTISTAGE A MPLIFIERS

Two or more amplifiers can be connected in a cascaded arrangement with the output
of one amplifier driving the input of the next. Each amplifier in a cascaded arrange-
ment is known as a stage. The basic purpose of a multistage arrangement is to increase
the overall voltage gain. Although discrete multistage amplifiers are not as common as
they once were, a familiarization with this area provides insight into how circuits
affect each other when they are connected together.
After completing this section, you should be able to
❏ Describe and analyze the operation of multistage amplifiers
❏ Determine the overall voltage gain of multistage amplifiers
◆ Express the voltage gain in decibels (dB)

❏ Discuss and analyze capacitively-coupled multistage amplifiers

◆ Describe loading effects ◆ Determine the voltage gain of each stage in

a two-stage amplifier ◆ Determine the overall voltage gain ◆ Determine

the dc voltages
❏ Describe direct-coupled multistage amplifiers

Multistage Voltage Gain

The overall voltage gain, A¿v, of cascaded amplifiers, as shown in Figure 6–33, is the product
of the individual voltage gains.
A¿v ⴝ Av1 Av2 Av3 Á Avn Equation 6–23
where n is the number of stages.

VCC

Input Av1 Av2 Av3 Avn Output

䊱 F IGURE 6–33
Cascaded amplifiers. Each triangular symbol represents a separate amplifier.

Amplifier voltage gain is often expressed in decibels (dB) as follows:

Av(dB) ⴝ 20 log Av Equation 6–24
This is particularly useful in multistage systems because the overall voltage gain in dB is
the sum of the individual voltage gains in dB.
A¿v(dB) = Av1(dB) + Av2(dB) + Á + Avn(dB)

EXAMPLE 6–12 A certain cascaded amplifier arrangement has the following voltage gains: Av1 = 10,
Av2 = 15, and Av3 = 20. What is the overall voltage gain? Also express each gain in
decibels (dB) and determine the total voltage gain in dB.
302 ◆ BJT A MPLIFIERS

Solution A¿v = Av1Av2Av3 = (10)(15)(20) = 3000

Av1(dB) = 20 log 10 = 20.0 dB
Av2(dB) = 20 log 15 = 23.5 dB
Av3(dB) = 20 log 20 = 26.0 dB
A¿v(dB) = 20.0 dB + 23.5 dB + 26.0 dB = 69.5 dB

Related Problem In a certain multistage amplifier, the individual stages have the following voltage
gains: Av1 = 25, Av2 = 5, and Av3 = 12. What is the overall gain? Express each gain
in dB and determine the total voltage gain in dB.

Capacitively-Coupled Multistage Amplifier

For purposes of illustration, we will use the two-stage capacitively coupled amplifier in
Figure 6–34. Notice that both stages are identical common-emitter amplifiers with the
output of the first stage capacitively coupled to the input of the second stage. Capacitive
coupling prevents the dc bias of one stage from affecting that of the other but allows the ac
signal to pass without attenuation because XC ⬵ 0 Æ at the frequency of operation.
Notice, also, that the transistors are labeled Q1 and Q2.

VCC
1st stage +10 V 2nd stage

R1 R3 R5 R7
47 k⍀ 4.7 k⍀ 47 k⍀ 4.7 k⍀ C5
Vout
C1 C3
Q1 Q2 1 μF
Vin
1 μF 1 μF

R2 R4 C2 R6 R8 C4
10 k⍀ 1.0 k⍀ 100 μ F 10 k⍀ 1.0 k⍀ 100 μ F

βDC = βac = 150 for Q1 and Q2

䊱 FIG UR E 6 – 3 4
A two-stage common-emitter amplifier.

Loading Effects In determining the voltage gain of the first stage, you must consider the
loading effect of the second stage. Because the coupling capacitor C3 effectively appears
as a short at the signal frequency, the total input resistance of the second stage presents an
ac load to the first stage.
Looking from the collector of Q1, the two biasing resistors in the second stage, R5
and R6, appear in parallel with the input resistance at the base of Q2. In other words, the
signal at the collector of Q1 “sees” R3, R5, R6, and Rin(base2) of the second stage all in
parallel to ac ground. Thus, the effective ac collector resistance of Q1 is the total of all
these resistances in parallel, as Figure 6–35 illustrates. The voltage gain of the first
stage is reduced by the loading of the second stage because the effective ac collector
resistance of the first stage is less than the actual value of its collector resistor, R3.
Remember that Av = Rc>r¿e.
 M ULTISTAGE A MPLIFIERS ◆ 303

䊴 F I G U R E 6– 35
Input resistance of second stage
AC equivalent of first stage in Figure
Vin Q1 6–34, showing loading from second
stage input resistance.
R3 R5 R6 Rin(base 2)
4.7 k⍀ 47 k⍀ 10 k⍀ 3.57 k⍀

Voltage Gain of the First Stage The ac collector resistance of the first stage is
Rc1 = R3 7 R5 7 R6 7 Rin(base2)
Remember that lowercase italic subscripts denote ac quantities such as for Rc.
You can verify that IE = 1.05 mA, r¿e = 23.8Æ , and Rin(base2) = 3.57 kÆ. The effective
ac collector resistance of the first stage is as follows:
Rc1 = 4.7 kÆ 7 47 kÆ 7 10 kÆ 7 3.57 kÆ = 1.63 kÆ
Therefore, the base-to-collector voltage gain of the first stage is
Rc1 1.63 kÆ
Av1 = = = 68.5
r¿e 23.8 Æ

Voltage Gain of the Second Stage The second stage has no load resistor, so the ac col-
lector resistance is R7, and the gain is
R7 4.7 kÆ
Av2 = = = 197
r¿e 23.8 Æ
Compare this to the gain of the first stage, and notice how much the loading from the sec-
ond stage reduced the gain.
Overall Voltage Gain The overall amplifier gain with no load on the output is
A¿v = Av1Av2 = (68.5)(197) ⬵ 13,495
If an input signal of 100 mV, for example, is applied to the first stage and if there is no atten-
uation in the input base circuit due to the source resistance, an output from the second stage
of (100 mV)(13,495) ⬵ 1.35 V will result. The overall voltage gain can be expressed in dB
as follows:
A¿v(dB) = 20 log (13,495) = 82.6 dB

DC Voltages in the Capacitively Coupled Multistage Amplifier Since both stages in

Figure 6–34 are identical, the dc voltages for Q1 and Q2 are the same. Since b DCR4 W R2
and b DCR8 W R6, the dc base voltage for Q1 and Q2 is
R2 10 kÆ
VB ⬵ a bVCC = a b10 V = 1.75 V
R1 + R2 57 kÆ
The dc emitter and collector voltages are as follows:
VE = VB - 0.7 V = 1.05 V
VE 1.05 V
IE = = = 1.05 mA
R4 1.0 kÆ
IC ⬵ IE = 1.05 mA
VC = VCC - ICR3 = 10 V - (1.05 mA)(4.7 kÆ) = 5.07 V
304 ◆ BJT A MPLIFIERS

Direct-Coupled Multistage Amplifiers

A basic two-stage, direct-coupled amplifier is shown in Figure 6–36. Notice that there are
no coupling or bypass capacitors in this circuit. The dc collector voltage of the first stage
provides the base-bias voltage for the second stage. Because of the direct coupling, this
type of amplifier has a better low-frequency response than the capacitively coupled type in
which the reactance of coupling and bypass capacitors at very low frequencies may be-
come excessive. The increased reactance of capacitors at lower frequencies produces gain
reduction in capacitively coupled amplifiers.
Direct-coupled amplifiers can be used to amplify low frequencies all the way down to dc
(0 Hz) without loss of voltage gain because there are no capacitive reactances in the circuit.
The disadvantage of direct-coupled amplifiers, on the other hand, is that small changes in the
dc bias voltages from temperature effects or power-supply variation are amplified by the suc-
ceeding stages, which can result in a significant drift in the dc levels throughout the circuit.

䊳 FIG UR E 6 – 3 6 +VCC
A basic two-stage direct-coupled
amplifier.

R1 R3 R5

Vout

Vin Q1 Q2

R2 R4 R6

SECTION 6–6 1. What does the term stage mean?

CHECKUP 2. How is the overall voltage gain of a multistage amplifier determined?
3. Express a voltage gain of 500 in dB.
4. Discuss a disadvantage of a capacitively coupled amplifier.

6–7 T HE D IFFERENTIAL A MPLIFIER

A differential amplifier is an amplifier that produces outputs that are a function of the
difference between two input voltages. The differential amplifier has two basic modes of
operation: differential (in which the two inputs are different) and common mode (in
which the two inputs are the same). The differential amplifier is important in operational
amplifiers, which are covered beginning in Chapter 12.
After completing this section, you should be able to
❏ Describe the differential amplifier and its operation
❏ Discuss the basic operation
◆ Calculate dc currents and voltages

❏ Discuss the modes of signal operation

◆ Describe single-ended differential input operation ◆ Describe double-ended

differential input operation ◆ Determine common-mode operation

❏ Define and determine the common-mode rejection ratio (CMRR)
 T HE D IFFERENTIAL A MPLIFIER ◆ 305

Basic Operation
A basic differential amplifier (diff-amp) circuit is shown in Figure 6–37. Notice that the
differential amplifier has two inputs and two outputs.

+VCC 䊴 F I G U R E 6– 37
Basic differential amplifier.

RC1 RC2

Output 1 Output 2

Input 1 Input 2
Q1 Q2

RE

–VEE

The following discussion is in relation to Figure 6–38 and consists of a basic dc analy-
sis of the diff-amp’s operation. First, when both inputs are grounded (0 V), the emitters are
at -0.7 V, as indicated in Figure 6–38(a). It is assumed that the transistors are identically
matched by careful process control during manufacturing so that their dc emitter currents
are the same when there is no input signal. Thus,
IE1 = IE2
Since both emitter currents combine through RE,
IRE
IE1 = IE2 =
2
where
VE - VEE
IRE =
RE
Based on the approximation that IC ⬵ IE,
IRE
IC1 = IC2 ⬵
2
Since both collector currents and both collector resistors are equal (when the input voltage
is zero),
VC1 = VC2 = VCC - IC1RC1
This condition is illustrated in Figure 6–38(a).
Next, input 2 is left grounded, and a positive bias voltage is applied to input 1, as shown
in Figure 6–38(b). The positive voltage on the base of Q1 increases IC1 and raises the emit-
ter voltage to
VE = VB - 0.7 V
This action reduces the forward bias (VBE) of Q2 because its base is held at 0 V (ground),
thus causing IC2 to decrease. The net result is that the increase in IC1 causes a decrease in
VC1, and the decrease in IC2 causes an increase in VC2, as shown.
306 ◆ BJT A MPLIFIERS

+VCC +VCC

IC1 IC2 IC1 IC2

VC1 RC1 RC2 VC2 VC1 RC1 RC2 VC2

– + 1 2 + – – + 1 2 + –

Q1 Q2 +VB Q1 Q2
1 2 1 2
– 0.7 V VB – 0.7 V
IE1 IE2

RE RE

–VEE –VEE
(a) Both inputs grounded (b) Bias voltage on input 1 with input 2 grounded

+VCC

IC1 IC2

VC1 RC1 RC2 VC2

– + 1 2 + –

Q1 Q2 +VB
1 2
VB – 0.7 V

RE

–VEE
(c) Bias voltage on input 2 with input 1 grounded

䊱 FIG UR E 6 – 3 8
Basic operation of a differential amplifier (ground is zero volts) showing relative changes in voltages.

Finally, input 1 is grounded and a positive bias voltage is applied to input 2, as shown in
Figure 6–38(c). The positive bias voltage causes Q2 to conduct more, thus increasing IC2.
Also, the emitter voltage is raised. This reduces the forward bias of Q1, since its base is
held at ground, and causes IC1 to decrease. The result is that the increase in IC2 produces a
decrease in VC2, and the decrease in IC1 causes VC1 to increase, as shown.

Modes of Signal Operation

Single-Ended Differential Input When a diff-amp is operated with this input configu-
ration, one input is grounded and the signal voltage is applied only to the other input, as
shown in Figure 6–39. In the case where the signal voltage is applied to input 1 as in part
(a), an inverted, amplified signal voltage appears at output 1 as shown. Also, a signal volt-
age appears in phase at the emitter of Q1. Since the emitters of Q1 and Q2 are common, the
emitter signal becomes an input to Q2, which functions as a common-base amplifier. The
signal is amplified by Q2 and appears, noninverted, at output 2. This action is illustrated in
part (a).
In the case where the signal is applied to input 2 with input 1 grounded, as in Figure
6–39(b), an inverted, amplified signal voltage appears at output 2. In this situation, Q1 acts
as a common-base amplifier, and a noninverted, amplified signal appears at output 1.
 T HE D IFFERENTIAL A MPLIFIER ◆ 307

+VCC 䊴 F I G U R E 6– 39
Single-ended differential input
operation.
RC1 RC2
1 2
Vout1 Vout2

Q1 Q2
1 2
Vin1

RE

–VEE Ve

(a)

+VCC

RC1 RC2
1 2
Vout1 Vout2

Q1 Q2
1 2
Vin 2

RE

Ve –VEE

(b)

Double-Ended Differential Inputs In this input configuration, two opposite-polarity

(out-of-phase) signals are applied to the inputs, as shown in Figure 6–40(a). Each input af-
fects the outputs, as you will see in the following discussion.
Figure 6–40(b) shows the output signals due to the signal on input 1 acting alone as a
single-ended input. Figure 6–40(c) on page 308 shows the output signals due to the signal
on input 2 acting alone as a single-ended input. Notice in parts (b) and (c) that the signals
on output 1 are of the same polarity. The same is also true for output 2. By superimposing
both output 1 signals and both output 2 signals, you get the total output signals, as shown
in Figure 6–40(d).

+VCC +VCC

Vp Vp
RC1 RC2 RC1 RC2
1 2 1 2
Vout1 Vout2

Q1 Q2 Q1 Q2
1 2 1 2
Vin1 Vin2 Vin1

RE RE

–VEE –VEE

(a) Differential inputs (180° out of phase) (b) Outputs due to Vin1

䊱 F IGURE 6–40
Double-ended differential operation. (continued on next page)
308 ◆ BJT A MPLIFIERS

+VCC 2Vp +VCC 2Vp

Vp Vp
RC1 RC2 RC1 RC2
1 2 Vout1 1 2 Vout2
Vout1 Vout2

Q1 Q2 Q1 Q2
1 2 1 2
Vin2 Vin1 Vin2

RE RE

–VEE –VEE

(c) Outputs due to Vin2 (d) Total outputs

䊱 FIG UR E 6 – 4 0
(continued)

Common-Mode Inputs One of the most important aspects of the operation of a diff-
amp can be seen by considering the common-mode condition where two signal voltages
of the same phase, frequency, and amplitude are applied to the two inputs, as shown in
Figure 6–41(a). Again, by considering each input signal as acting alone, you can under-
stand the basic operation.

+VCC +VCC

RC1 RC2 RC1 RC2

1 2 1 2
Vout1 Vout2

Q1 Q2 Q 1 Q2
1 2 1 2
Vin1 Vin2 Vin1

RE RE

–VEE –VEE

(a) Common-mode inputs (in phase) (b) Outputs due to Vin1

+VCC +VCC

RC1 RC2 RC1 RC2

1 2 1 2
Vout1 Vout2 Vout1 Vout2

Q1 Q2 Q1 Q2
1 2 1 2
Vin2 Vin1 Vin2

RE RE

–VEE –VEE

(c) Outputs due to Vin2 (d) Outputs due to Vin1 and Vin2 cancel because they are equal in amplitude but
opposite in phase. The resulting outputs are 0 V ac.

䊱 FIG UR E 6 – 4 1
Common-mode operation of a differential amplifier.
 T HE D IFFERENTIAL A MPLIFIER ◆ 309

Figure 6–41(b) shows the output signals due to the signal on only input 1, and Figure
6–41(c) shows the output signals due to the signal on only input 2. Notice that the corre-
sponding signals on output 1 are of the opposite polarity, and so are the ones on output 2.
When the input signals are applied to both inputs, the outputs are superimposed and they
cancel, resulting in a zero output voltage, as shown in Figure 6–41(d).
This action is called common-mode rejection. Its importance lies in the situation
where an unwanted signal appears commonly on both diff-amp inputs. Common-mode
rejection means that this unwanted signal will not appear on the outputs and distort the
desired signal. Common-mode signals (noise) generally are the result of the pick-up of
radiated energy on the input lines from adjacent lines, the 60 Hz power line, or other
sources.

Common-Mode Rejection Ratio

Desired signals appear on only one input or with opposite polarities on both input lines.
These desired signals are amplified and appear on the outputs as previously discussed.
Unwanted signals (noise) appearing with the same polarity on both input lines are essen-
tially cancelled by the diff-amp and do not appear on the outputs. The measure of an ampli-
fier’s ability to reject common-mode signals is a parameter called the CMRR (common-
mode rejection ratio).
Ideally, a diff-amp provides a very high gain for desired signals (single-ended or differ-
ential) and zero gain for common-mode signals. Practical diff-amps, however, do exhibit a
very small common-mode gain (usually much less than 1), while providing a high differ-
ential voltage gain (usually several thousand). The higher the differential gain with respect
to the common-mode gain, the better the performance of the diff-amp in terms of rejection
of common-mode signals. This suggests that a good measure of the diff-amp’s perform-
ance in rejecting unwanted common-mode signals is the ratio of the differential voltage
gain Av(d ) to the common-mode gain, Acm. This ratio is the common-mode rejection ratio,
CMRR.
Av(d )
CMRR ⴝ Equation 6–25
Acm
The higher the CMRR, the better. A very high value of CMRR means that the differen-
tial gain Av(d) is high and the common-mode gain Acm is low.
The CMRR is often expressed in decibels (dB) as
Av(d )
CMRR ⴝ 20 log a b Equation 6–26
Acm

EXAMPLE 6–13 A certain diff-amp has a differential voltage gain of 2000 and a common-mode gain of
0.2. Determine the CMRR and express it in decibels.

Solution Av(d ) = 2000, and Acm = 0.2. Therefore,

Av(d ) 2000
CMRR = = = 10,000
Acm 0.2
Expressed in decibels,
CMRR = 20 log (10,000) = 80 dB

Related Problem Determine the CMRR and express it in decibels for an amplifier with a differential
voltage gain of 8500 and a common-mode gain of 0.25.
310 ◆ BJT A MPLIFIERS

A CMRR of 10,000 means that the desired input signal (differential) is amplified
10,000 times more than the unwanted noise (common-mode). For example, if the ampli-
tudes of the differential input signal and the common-mode noise are equal, the desired
signal will appear on the output 10,000 times greater in amplitude than the noise. Thus, the
noise or interference has been essentially eliminated.

SECTION 6–7 1. Distinguish between double-ended and single-ended differential inputs.

CHECKUP 2. Define common-mode rejection.
3. For a given value of differential gain, does a higher CMRR result in a higher or lower
common-mode gain?

6–8 T ROUBLESHOOTING
In working with any circuit, you must first know how it is supposed to work before you
can troubleshoot it for a failure. The two-stage capacitively coupled amplifier discussed
in Section 6–6 is used to illustrate a typical troubleshooting procedure.
After completing this section, you should be able to
❏ Troubleshoot amplifier circuits
❏ Discuss a troubleshooting procedure
◆ Describe the analysis phase ◆ Describe the planning phase ◆ Describe the
measurement phase

Chapter 18: Basic Programming Concepts for Automated Testing

Selected sections from Chapter 18 may be introduced as part of this troubleshooting
coverage or, optionally, the entire Chapter 18 may be covered later or not at all.

When you are faced with having to troubleshoot a circuit, the first thing you need is a
schematic with the proper dc and signal voltages labeled. You must know what the correct
voltages in the circuit should be before you can identify an incorrect voltage. Schematics
of some circuits are available with voltages indicated at certain points. If this is not the
case, you must use your knowledge of the circuit operation to determine the correct volt-
ages. Figure 6–42 is the schematic for the two-stage amplifier that was analyzed in Section
6–6. The correct voltages are indicated at each point.

Troubleshooting Procedure
The analysis, planning, and measurement approach to troubleshooting, discussed in
Chapter 2, will be used.
Analysis It has been found that there is no output voltage, Vout. You have also deter-
mined that the circuit did work properly and then failed. A visual check of the circuit board
or assembly for obvious problems such as broken or poor connections, solder splashes,
 T ROUBLESHOOTING ◆ 311

100 μV rms 100 μV rms 6.85 mV rms 6.85 mV rms 1.35 V rms 1.35 V rms
0 V dc 1.75 V dc 5.07 V dc 1.75 V dc 5.07 V dc 0 V dc

+10 V

R1 R3 R5 R7
47 k⍀ 4.7 k⍀ 47 k⍀ 4.7 k⍀
C5
Vout
C1 C3
Vin Q1 Q2 1 μF

1 μF 1 μF

R2 R4 C2 R6 R8 C4
10 k⍀ 1.0 k⍀ 100 μ F 10 k⍀ 1.0 k⍀ 100 μ F

䊳 F IGURE 6–42
A two-stage common-emitter amplifier with correct voltages indicated. Both transistors have dc and
ac betas of 150. Different values of b will produce slightly different results.

wire clippings, or burned components turns up nothing. You conclude that the problem is
most likely a faulty component in the amplifier circuit or an open connection. Also, the dc
supply voltage may not be correct or may be missing.
Planning You decide to use an oscilloscope to check the dc levels and the ac signals
(you prefer to use a DMM to measure the dc voltages) at certain test points. Also, you de-
cide to apply the half-splitting method to trace the voltages in the circuit and use an in-circuit
transistor tester if a transistor is suspected of being faulty.
Measurement To determine the faulty component in a multistage amplifier, use the gen-
eral five-step troubleshooting procedure which is illustrated as follows.
Step 1: Perform a power check. Assume the dc supply voltage is correct as indicated
in Figure 6–43.
Step 2: Check the input and output voltages. Assume the measurements indicate that
the input signal voltage is correct. However, there is no output signal voltage
or the output signal voltage is much less than it should be, as shown by the di-
agram in Figure 6–43.

Much less than normal

Input signal present No output signal signal voltage
Power is on

VCC V or

Stage 1 Stage 2

䊱 F IGURE 6–43
Initial check of a faulty two-stage amplifier.
312 ◆ BJT A MPLIFIERS

Step 3: Apply the half-splitting method of signal tracing. Check the voltages at the
output of the first stage. No signal voltage or a much less than normal signal
voltage indicates that the problem is in the first stage. An incorrect dc volt-
age also indicates a first-stage problem. If the signal voltage and the dc
voltage are correct at the output of the first stage, the problem is in the
second stage. After this check, you have narrowed the problem to one of the
two stages. This step is illustrated in Figure 6–44.

Correct signal

Screen indicates a
fault in Stage 2.
VCC

Input signal present Stage 1 Stage 2

Either screen indicates

or
a fault in Stage 1.

No signal or incorrect Much less than normal

dc voltage signal voltage

䊱 FIG UR E 6 – 4 4
Half-splitting signal tracing isolates the faulty stage.

Step 4: Apply fault analysis. Focus on the faulty stage and determine the component
failure that can produce the incorrect output.
Symptom: DC voltages incorrect.
Likely faults: A failure of any resistor or the transistor will produce an incor-
rect dc bias voltage. A leaky bypass or coupling capacitor will also affect the
dc bias voltages. Further measurements in the stage are necessary to isolate
the faulty component.
Incorrect ac voltages and the most likely fault(s) are illustrated in Figure
6–45 as follows:
(a) Symptom 1: Signal voltage at output missing; dc voltage correct.
Symptom 2: Signal voltage at base missing; dc voltage correct.
Likely fault: Input coupling capacitor open. This prevents the signal
from getting to the base.
(b) Symptom: Correct signal at base but no output signal.
Likely fault: Transistor base open.
(c) Symptom: Signal voltage at output much less than normal; dc voltage
correct.
Likely fault: Bypass capacitor open.
Step 5: Replace or repair. With the power turned off, replace the defective compo-
nent or repair the defective connection. Turn on the power, and check for
proper operation.