COE480

Computer Architecture
Instruction Set Architecture
MIPS

Lecture 1

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 Instruction Set

• The repertoire of instructions of a computer

• Different computers have different instruction

sets
– But with many aspects in common

• Early computers had very simple instruction sets

– Simplified implementation

• Many modern computers also have simple

instruction sets
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 The MIPS Instruction Set
• MIPS: Microprocessor without Interblocked Pipelined Stages
• The MIPS processor, designed in 1984 by researchers at
Stanford University, is a RISC (Reduced Instruction Set
Computer) processor.
• Compared with their CISC (Complex Instruction Set
Computer) counterparts (such as the Intel Pentium
processors), RISC processors typically support fewer and
much simpler instructions.
• A RISC processor can be made much faster than a CISC
processor because of its simpler design.

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 MIPS reference data
• You should all have the MIPS reference data

• First page:
(1) Core instruction set
Name: The name of the instruction, EX: ADD
Format: Can be R, I or J (See BASIC INSTRUCTION FORMATS)
Operation: What the instruction do.
Opcode: Operation code, the first 6 bits of the instruction [31..26]
Function: the last 6 bits of the instruction [5..0]
Keep these two pages with you ALL THE TIME 4
 MIPS Operations/Operands
• All instructions are 32 bit length

• MIPS operations
– Arithmetic operations : add, sub, …
– Logical operations: and, or,…
– Shift operations : sll, srl  Shift left or right logical
– Compare operations: compare two operand and perform an action, slt...
– Load/stores: to transfer data from/to memory, lw, sw,…
– Branch/jump operations: beq, bne, j, jr, …

• MIPS operands
– General-purpose registers: available registers used to store data
(first page of the MIPS reference data)
– Memory location: the memory address is stored in a register
– Immediate value: value in decimal

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 MIPS Arithmetic TYPE R
rd rs rt
• <op> <rdestination> <rsource1> <rsource2>

• All arithmetic instructions have 3 operands

– Operand order is fixed: destination first
– 32 registers (page 2 of green card)

• Examples
– add $t0, $s0, $s2 # $t0 = $s0 + $s2
rd = rs + rt
rd : the register $t0 (number 8)
add $8, $16, $18
– sub $s0, $t0, $t1 # $s0 = $t0 – $t1

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 Register Operands in MIPS

• Arithmetic instructions use register operands

• MIPS has a 32 × 32-bit register file

– Use for frequently accessed data
– Numbered 0 to 31
– 32-bit data called a “word”

• Assembler names
– $t0, $t1, …, $t9 for temporary values
– $s0, $s1, …, $s7 for saved variables
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 Registers
32 bits 32 bits 32 bits

$zero r0 r16 $s0 HI

$at r1 r17 $s1 LO
$v0 r2 r18 $s2
$v1 r3 r19 $s3
$a0 r4 r20 $s4
$a1 r5 r21 $s5
$a2 r6 r22 $s6
$a3 r7 r23 $s7
$t0 r8 r24 $t8
$t1 r9 r25 $t9
$t2 r10 r26 $k0
$t3 r11 r27 $k1
$t4 r12 r28 $gp
$t5 r13 r29 $sp
$t6 r14 r30 $fp
$t7 r15 r31 $ra PC
General-Purpose Registers Special-Purpose Registers

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 General-Purpose Registers
• GPR: all can be used as operands in instructions

• Still, conventions and limitations exist to keep GPRs from being

used arbitrarily
– r0, termed $zero, always has a value “0”. This is a read only register.
– r31, termed $ra (return address), is reserved for subroutine call/return
– Register usage and related software conventions are summarized in “application
binary interface” (ABI), which is important when writing system software such as
an assembler and a compiler

• MIPS Reference data, first page, Register name, number…

– Name: the name of the register.
– Number: its reference number. Example: $t0 is register number 8
$t2 is register number 10
$S5 is register number 2
– Use: will understand later
– Preserved across a call: will understand later

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General-Purpose Registers

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 Instruction Encoding
• Instructions are encoded in binary numbers
– Assembler translates assembly programs into binary numbers
– Machine decodes binary numbers to figure out what the instruction is

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 Instruction Encoding
• Instructions are encoded in binary numbers
– Assembler translates assembly programs into binary numbers
– Machine decodes binary numbers to figure out what the instruction is

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 Instruction Encoding
• MIPS has several instruction formats
– R-format: arithmetic instructions
– I-format: transfer/branch/immediate format
– J-format: jump instruction format

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 MIPS Instruction Formats
Name Fields Comments

6 bits 5 bits 5 bits 5 bits 5 bits 6 bits All MIPS instructions 32 bits

R-format op rs rt rd shamt funct Arithmetic/logic instruction format

I-format op rs rt address/immediate Transfer, branch, immediate format

J-format op target address Jump instruction format

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 R-Format Instructions
• Define “fields” of the following number of bits
each: 6 + 5 + 5 + 5 + 5 + 6 = 32

6 5 5 5 5 6

• For simplicity, each field has a name:

opcode rs rt rd shamt funct

For shift instructions:

“shift amount”
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 R-Format Example

• MIPS Instruction:
<op> <rd> <rs> <r t>

add $8,$9,$10 or add $t0,$t1,$t2

000000 01001 01010 01000 00000 100000

hex representation: 012A4020

rs = 9
rt = 10
rd = 8

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 R-Format Example
• MIPS Instruction:
What is 01098022? 0000 0001 0000 1001 1000 0000 0010 0010

000000 01000 01001 10000 00000 100010

opcode rs rt rd shamt funct

Opcode = 0, function = 22  sub
sub rs,rt,rd

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 R-Format Example
• MIPS Instruction:
What is 01098022? 0000 0001 0000 1001 1000 0000 0010 0010

000000 01000 01001 10000 00000 100010

opcode rs rt rd shamt funct

rd = 16  $S0 rs = 8 $t0 rt = 9 $t1
sub rs,rt,rd sub $S0,$t0,$t1
$zero r0 r16 $s0
<op> <rd> <rs> <r t>
$at r1 r17 $s1
$v0 r2 r18 $s2
$v1 r3 r19 $s3
$a0 r4 r20 $s4
$a1 r5 r21 $s5
$a2 r6 r22 $s6
$a3 r7 r23 $s7
$t0 r8 r24 $t8
$t1 r9 r25 $t9
$t2 r10 r26 $k0
$t3 r11 r27 $k1
$t4 r12 r28 $gp
$t5 r13 r29 $sp 18
$t6 r14 r30 $fp
$t7 r15 r31 $ra
 M I P S Reference Data: CORE INSTRUCTION SET
NAME MNE- FOR- OPERATION (in OPCODE/
MON-IC MAT Verilog) FUNCT
(hex)
Add add R R[rd] = R[rs] + R[rt] 0 / 20hex
(1)
Add addi I R[rt] = R[rs] + 8hex
Immediate SignExtImm (1)(2)
Branch On beq I if(R[rs]==R[rt]) 4hex
Equal PC=PC+4+
BranchAddr (4)

Later (1) May cause overflow exception

(2) SignExtImm = { 16{immediate[15]}, immediate }
(3) ZeroExtImm = { 16{1b’0}, immediate }
(4) BranchAddr = { 14{immediate[15]}, immediate, 2’b0} 19
 I-Format Instructions

• Define “fields” of the following number of bits

each: 6 + 5 + 5 + 16 = 32
6 5 5 16

• For simplicity, each field has a name:

opcode rs rt immediate

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 I-Format Example
• MIPS Instruction:
addi $8,$9,7

opcode rs rt immediate
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001000 01001 01000 0000000000000111

Hexadecimal representation: 21280007

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 I-Format Example

• MIPS Instruction:
What is 2230FFFE? 0010 0010 0011 0000 1111 1111 1111 1110

opcode rs rt immediate
001000 10001 10000 1111111111111110
8 17 16 -2

Opcode = 8 addi $zero

$at
r0
r1
r16
r17
$s0
$s1
$v0 r2 r18 $s2
rs = 17  $S1 $v1 r3 r19 $s3
$a0 r4 r20 $s4
rt = 16  $S0 $a1 r5 r21 $s5
$a2 r6 r22 $s6
$a3 r7 r23 $s7
$t0 r8 r24 $t8
Immediate is a negative number $t1 r9 r25 $t9
$t2 r10 r26 $k0
(ends with 1) it is -2 $t3 r11 r27 $k1
$t4 r12 r28 $gp
$t5 r13 r29 $sp
$t6 r14 r30 $fp 22
addi $S0, $S1, -2 $t7 r15 r31 $ra
 Exercise

Which instruction has same representation as 23hex?

A. add $0, $0, $0
B. subu $s0,$s0,$s0
C. lw $0, 0($0)
D. addi $0, $0, 35
E. subu $0, $0, $0
F. Trick question! Instructions are not numbers.

• Use MIPS reference data to convert each

instruction to HEX

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 Exercise
Find the MIPS instructions:

0x02324020
0x11200002

0x014b482a
0x2129ffff

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 Solution
Find the MIPS instructions:

0x02324020 add $t0,$s1,$s2

0x11200002 beq $t1,$zero,loop
(loop is 3 instruction forward)
0x014b482a slt $t1,$t2, $t3
0x2129ffff addi $t1,$t1, -1

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 Logic Instructions
Name Fields Comments

R-format op rs rt rd shamt funct Logic instruction format

• Bit-wise logic operations

• <op> <rdestination> <rsource1> <rsource2>

• Examples
– and $t0, $s0, $s2 # $t0 = $s0 ^ $s2
– or $s0, $t0, $t1 # $s0 = $t0 ᵥ $t1
– nor $s0, $t0, $t1 # $s0 = ~($t0 ᵥ $t1)
– xor $s0, $t0, $t1 # $s0 = $t0  $t1

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 Logic Instructions: Example
.text $t0
addi $t0,$0,0x32
addi $t1,$0,0x777
$t1
and $t2,$t1,$t0 $t2

Answer in class; also, replace and by or

Next: andi and ori

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 Long Immediate
• Sometimes we need a long immediate, e.g., 32 bits
• This value cannot be loaded using one instruction
• Immediate is 16 bits.
• MIPS requires that we use two instructions
• Example: to load $t0 with 0xaa55cc33
– lui $t0, 0xaa55 (Load upper immediate)
$t0 1010101001010101 0000000000000000

– ori $t0, $t0, 0xcc33 (then get the lower-order 16 bits)

$t0 1010101001010101 1100110000110011

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 Loading a memory address

• .data places values in memory

• Memory is addressed using 32 bit register
• So, 32 bits are needed to specify a memory address
• Format I has a 16 bit field and Format J has a 26 bit
field…neither is long enough.
• la $t0,0x1001008 is a pseudo instruction – not
implemented in the hardware. This is equal to:
• lui $1,4097
• ori $8,$1,8
Of course you noticed that 0x1001 is 409710

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