Latches Notes
Latches Notes
These both are memory storage elements . The main difference between latch & flip flop are clock pulse
& latch have no clock pulse
Representation of Latch
Types of Latches
1. RS / SR Latch
2. D – Latch Etc
RS – LATCH :
An RS latch (Reset-Set latch) is a simple digital circuit that serves as a basic memory
element. It consists of two cross-coupled NOR gates or NAND gates. The RS latch has two
inputs: Set (S) and Reset (R), and two outputs: Q and Q' (the complement of Q).
Here's how an RS latch works:
Condition – I
When we given two inputs like S=0 & R=0 outputs are generated Q and Q' (State is No change)
Condition – 2
When we given two inputs like S=0 & R=1 outputs are generated 0 and 1 (State is Reset)
Condition – 3
When we given two inputs like S=1 & R=0 outputs are generated 1 and 0 (State is Set)
Condition – 4
When we given two inputs like S=1 & R=1 outputs are0 and 0 (State is Invalid)
There is one draw back with SR – Latch i.e., when the inputs S & R = 1 the next state value
cannot be predicted. So this can be overcome by using D – Latch.
Condition – I
When we given one input like D=0 output are generated Q=0 and Q'=1
Condition – 2
When we given one input like D=1 output are generated Q=1 and Q'=0
FLIP FLOP :
A flip flop is an electronic circuit with two stable states that can be used to store binary data. The
stored data can be changed by applying varying inputs. Flip-flops and latches are fundamental building
blocks of digital electronics systems used in computers, communications, and many other types of
systems.
1. RS – Flip Flop
2. D – Flip Flop
3. JK – Flip Flop
4. T – Flip Flop
1. RS – Flip Flop
RS Flip Flop, also known as Reset-Set Flip Flop, is a fundamental digital storage device
that can store one bit of information. In simpler words, an RS Flip Flop is a logical circuit with
two inputs, R (Reset) and S (Set) and two outputs, Q and (inverse of Q).
Condition – I
When we given two inputs like S=0 & R=0 outputs are generated and (State is No change)
Condition – 2
When we given two inputs like S=0 & R=0 outputs are generated and (State is Reset)
Condition – 3
When we given two inputs like S=0 & R=0 outputs are generated and (State is set)
Condition – 4
When we given two inputs like S=0 & R=0 outputs are generated and (In validState )
Note :
3. JK – Flip Flop
A JK flip-flop is a kind of sequential logic circuit that keeps track of binary data.
Truth table of JK – Flip Flop
Condition – I
When we given two inputs like S=0 & R=0 output are generated Qn=0 (State is No change)
Condition – 2
When we given two inputs like S=0 & R=1 output are generated Qn=0 (State is Reset)
Condition – 3
When we given two inputs like S=0 & R=1 output are generated Qn=1(State is Set)
Condition – 4
When we given two inputs like S=1 & R=1 output are generated = 0 and 0 (State is Toggle)
4.T – Flip Flop:
T Flip-Flop is a single input logic circuit that holds or toggles its output according to the input
state.
Condition – I
When we given one input like T=0 output are generated Q=0 and Q'=1
Condition – 2
When we given one input like T=1 output are generated Q=1 and Q'=0