Constructor University

Electronics

Lab Experiment 3 - Bipolar Junction Transistor

(BJT)

Author: Shreesal Shrestha

Experiment Done by: Shreesal Shrestha, Pablo Vasquez Pocasangre

Place of Execution: Teaching Lab EE

Date of Execution: October 4th , 2024
1 Introduction and Prelab - BJT
1.1 Prelab Problem 1 : Biasing of Bipolar Junction Transis-
tors
Analyze the following common emitter circuit:

1. Calculate VB , VE , VCE , and VC .

2. Calculate IB , IE and IC

Using the following circuit given in the manual,

And calculating, the Thevenin’s equivalent,

R1 R2 22 × 103 × 10 × 103
Rth = = = 6875Ω
R1 + R2 22 × 103 + 10 × 103
R2 10000
Vth = Vcc = 20 = 6.25V
R1 × R2 10000 × 22000
Using, KVL in the equivalent circuit and β = 150 and VBE = 0.7V ,

Vth = IB Rth + VBE + IE RE = IB (Rth + (β + 1)RE ) + VBE

RE
VCC = IC RC + VCE + IE RE = IC (RC + ) + VCE
α

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 Vth − V BE
IB = = 7.13 × 10−5 A
Rth + (β + 1)RE

IC = βIB = 150 × 7.13 × 10−5 = 0.010695A

IE = IC + IB = 0.0107663A

IC
α= = 0.993
IE
RE
VCE = VCC − IC (RC + ) = 4.24V
α

VE = IE × RE = 5.06V

VC = IC × RC = 10.694V

VB = VBE + VE = 5.76V

1.2 Prelab Problem 2 : Constant Current Source

1. Given is following constant current circuit:

2. Find the values for R1 and R2 to get a constant current of IC ≈ 4mA.

3. What is the maximum value for RL to still get IC ≈ 4mA?

4. Implement the circuit in LTSpice and verify your calculations! Use the .step
command to vary RL .

5. Explain the function principle of the circuit!

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According to the data sheet, Vz = 4.7V and minimum Iz = 5mA. Also IE = IC ,
Vz − VBE 4.7 − 0.7
R2 = = = 1000Ω
IE 4 × 10−3
Also, for 2N2222, β = 190,
IC
IB = = 2.1 × 10−5 A
β

IR1 = Iz + IB = 5 × 10−3 + 2.1 × 10−5 = 5.02 × 10−3 A

VCC − Vz
R1 = = 856.6Ω
IR1
To calculate the maximum value of RL such that IC ≈ 4mA,

VCC = RL IC + VCE + VR2

VCC − VCE − VR2
RL = = 1000Ω
IC
The circuit was implemented into LTSpice and the calculated values were verified,

Figure 1.1: LTSpice Simulation : Constant Current Source

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 Figure 1.2: Plot of IC (RL )

The implemented circuit is a constant current source due to the Zener diode. In
reverse bias, the voltage of this diode is constant, which provides a stable reference
voltage to the base of the transistor. This ensures that the emitter voltage remains
fixed. As a result, the emitter current which is determined by the resistor R2 , remains
constant. Since the emitter current is nearly equal to the collector current, the current
through the load RL is maintained at a steady value, making the circuit a constant
current source.

1.3 Prelab Problem 3 : Amplifier Circuit

1. Use ’LTSpice’ to implement the following circuit:

2. Determine the DC operation point values for VB , VBE , VC , VCE , VE , IC , and IB .

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3. Perform a transient analysis for about 2 cycles of a sinusoidal input signal. Use
VS = 50 mV input amplitude and f = 1 kHz. Display Vi , VB , VBE , and the
voltage across the load resistance Vo . Determine the voltage gain Vo /Vi .

4. Determine the quality of the amplified signal at Vo . Use the .step command to
vary the amplitude VS by 50 mV, 100 mV, and 200 mV. Use an FFT or determine
the harmonic distortion to give a statement.

5. Carry out an AC analysis. Set the AC amplitude to 50 mV. Vary the frequency
from 100 Hz to 10 MHz with 10 points per decade and display the voltage across
Vo .

6. Use the LTSpice .MEASURE command (see help file and example MeasureBW.asc)
to determine the lower and upper −3 dB frequencies and the bandwidth.

The circuit was implemented into LTSpice,

Figure 1.3: LTSpice simulation : Amplifier Circuit

The DC operation point was found as follows,

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 Figure 1.4: DC operation point

Summarizing the required points,

VB 5.87379 V
VBE 0.71975 V
VC 9.08868 V
VCE 3.93464 V
VE 5.15404 V
IC 0.0109113 A
IB 5.472e-05 A

Table 1: DC point operation values

The transient analysis was then performed to display Vi , VB , VBE , and the voltage
across the load resistance Vo ,

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 Figure 1.5: LTSpice simulation : Amplifier Circuit

Figure 1.6: Plot of Vi , VB , VBE , and Vo

Using peak to peak value from the cursor function, the voltage gain was calculated
as,
Vo 2.6686146
gain = = = 130.235
Vi 20.490715 × 10−3
The quality of the signal was then determined at Vo by varying the the amplitude
of Vs by 50mv, 100mv and 200mV. The FFT plot was generated and the harmonic
distortion was also determined,

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Figure 1.7: LTSpice simulation : Amplifier Circuit

Figure 1.8: Vo signal for different Vs

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 Figure 1.9: FFT plot at Vo for different Vs

And the total harmonic distortion were measured to be,

Vs Harmonic Distortion
50mV 1.228304%
100mV 2.740419%
200mV 10.207185%

Table 2: Harmonic Distortion for varying Vs

From both observation it can be seen that for higher AC signal amplitude fed to
the transistor, there was higher distortion.
Now, the AC analysis was done for the AC amplitude of 50mV, the frequency
was varied from 100Hz to 10MHz with 10 points per decade and the plot at Vo was
displayed.

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 Figure 1.10: LTSpice simulation : Amplifier Circuit

Figure 1.11: Bode plot of Vo

Finally, using the .Measure command in LTspice as shown in fig(1.10), the band-
width was determined,

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 Lower -3dB frequency 326.201Hz
Upper -3dB frequency 479154Hz
Bandwidth 479188Hz

Table 3: Measured bandwidth

2 Execution Set-up and Results - BJT

Tools and Equipment

• 100µF and 2 x 1µF Capacitors

• 3x1kΩ, 10kΩ, 22KΩ, 470Ω and 50Ω resistors

• 2N2222 transistor

• Breadboard, wires and probes

• Oscilloscope

• ELABO DC source

• Function generator

2.1 Execution Problem 1 : Determine Type and Pin Assign-

ment of a Bipolar Transistors
For the first experiment the pin type were determined for the transistor, the following
diagram shows the bottom view of a transistor,

First, using the multimeter diode testing function, the values between every com-
bination of two terminals were recorded as below,

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 + Terminal Gnd Terminal Diode Check Value
1 2 .0L
2 1 0.7477
1 3 .0L
3 1 .0L
2 3 0.7467
3 2 .0L

Table 4: Diode Check Value (reading or 0L).

Again using the multimeter, where the common lead was connected at the base
terminal and the postive lead to each one of the other two terminals one by one. Since
the reading was ’0L’ for both cases, it was determined that the transistor is an NPN.
Similarly, using the values measured,

Transistor Type NPN

Base Terminal 2
Emitter Terminal 1
Collecter Terminal 3

2.2 Execution Problem 2 : Operation point of BJT

For the second part of the experiment the following circuit diagram was used, for now
only the components within the dashed lines were implemented. The purpose of this
problem is to check that the BJT is correctly biased to work in the active mode of
operation

The power supply was switched on and using the multimeter the voltages VCC , Vb ,
VBE , Vc , VCE and Ve were measured,

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 Voltage
VCC 20 V
Vb 5.95 V
VBE 0.6534 V
Vc 8.842 V
VCE 3.53756 V
Ve 5.3 V

Table 5: Measured Voltages

2.3 Execution Problem 3 : Common emitter circuit

The purpose of this problem is to demonstrate the BJT amplification of small signals
when it is correctly biased to work in the active mode of operation. The remaining
part of the circuit was assembled,
The f Vi and Vo was measured and the hard copy was taken with the measured
values found using the measure function,

Figure 2.1: Measured signal for Vi and Vo along with frequency for Vs = 50mVpp

The FFT spectrum was then used to then measure the magnitude of the first and
second peak using the cursor function,

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 Figure 2.2: FFT spectrum with magnitude of peaks for Vs = 50mVpp

The measurement were again repeated with Vs = 100mVpp and Vs = 200mVpp ,

Figure 2.3: Measured signal for Vi and Vo along with frequency for Vs = 100mVpp

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 Figure 2.4: FFT spectrum with magnitude of peaks for Vs = 100mVpp

Figure 2.5: Measured signal for Vi and Vo along with frequency for Vs = 200mVpp

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 Figure 2.6: FFT spectrum with magnitude of peaks for Vs = 200mVpp

2.4 Execution Problem 4 : Bandwidth of amplifier circuit

The purpose of this problem is to determine the bandwidth of the BJT amplifier circuit
and to observe how the voltage gain of a BJT is affected with changing the frequency
of the input signal.
Vs was set to 50mVpp and the Sweep mode with the following settings in the function
generator was set,

1: START F : 100Hz

2: STOP F : 1MHz

3: SWP TIME : 500ms

4: SWP MODE : logarithmic

The output was observed at the oscilloscope,

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 Figure 2.7: V0 for varying frequency

The sweep mode was then disabled and through manually changing the frequency
of the function generator the lower and upper -3dB cut-off frequencies were measured.
However, it make measurment easier, since√ we know that -3dB frequency corresponds
to the amplitude value being divided by 2, the required peak to peak value for the
cut-off frequencies was measured as,
peak − peak 3.24
Amplitude = √ = √ = 2.29V
2 2
Hence, the cut-off frequencies were mesaured as,

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 Figure 2.8: Lower cut-off frequency

Figure 2.9: Upper cut-off frequency

Lower cut-off frequency 340Hz

Upper cut-off frequency 289.44kHz

Table 6: Lower and Upper cut-off frequencies

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3 Evaluation : BJT
3.1 Evaluation Problem 1 : Determine Type and Pin Assign-
ment of a Bipolar Transistors
A BJT consists of two junctions: Base-Emitter junction (BE): Forward-biased like a
diode and Base-Collector junction (BC): Also forward-biased like a diode. When the
multimeter’s positive lead is connected to the base (for an NPN transistor) and the
negative lead is connected to the emitter or collector, the diode junction conducts.
When measuring between the collector and emitter terminals directly, no conduction
occurs regardless of the applied polarity because there is no direct junction between
them that conducts without the base current. This results in an ”OL” reading for both
polarities.
In an NPN transistor, the base terminal is p-type, and the emitter and collector
are n-type. For conduction to occur in the diode test, the multimeter needs to ap-
ply a forward bias (positive lead to the p-type base and negative lead to the n-type
terminal). In the experiment the negative lead was at the base and positive at the
collector/emitter. Which showed junctions are reverse-biased, giving ’0L’. This was
consistent with what one expects with a NPN transistor.
It was stated in the manual that the lower of the two measured values between
BE and CE indicates the base collector junction. This is typically due to the different
doping levels between the collector and the emitter.

3.2 Evaluation Problem 2 : Operating point of BJTs

Comparing the simulated and measured values together,

Values Measured Simulated

VCC 20 V 20 V
VB 5.95 V 5.87379 V
VBE 0.6534 V 0.71975 V
VC 8.842 V 9.08868 V
VCE 3.538 V 3.93464 V
VE 5.3 V 5.15404 V

Table 7: Comparison between the measured and simulated values

Observing the two sets of values, it can be inferred that the simulated and measured
values were close to each other. The differences between the two could have been caused
due to various factors. The transistor, although both 2N2222, their in built properties
could be different, especially β. Similarly, since transistors are extremely sensitive
devices, several factors within the circuit could have caused the values to differ as well.
Instrumental error could have also been present while measuring voltage through the
multimeter.
To measure the common emitter gain β, again using the reference picture from the
manual,
R1 R2 22 × 103 × 10 × 103
Rth = = = 6875Ω
R1 + R2 22 × 103 + 10 × 103

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 R2 10000
Vth = Vcc = 20 = 6.25V
R1 × R2 10000 × 22000
We know,
IC
β=
IB
VCC − VC
IC = = 0.011158A
1000
Vth − VB 6.25 − 5.95
IB = = = 4.36 × 10−5
Rth 6875
Therefore,
0.011158
βmeasured = = 255.9
4.36 × 10−5
Using LTSpice DC operation point values measured in prelab section, the βsimulated
was found to be,
0.0109113
βsimulated = = 199.47
5.472e − 05
Measuring the error,
255.9 − 199.47
error = = 28.3%
199.47
As observed, the error present in the measured β value is significant. It is likely due
to using the BJT with different characteristics in the simulation compared to the one
used in the actual experiment. Similarly, instrumental error could have been present
when using the multimeter as well as the error from the bread board and wires used.
To improve the error, the BJT with similar characteristics should be used and much
care should be given while handling the BJT as they are extremely sensitive.

3.3 Evaluation Problem 3 : Common emitter circuit

A distorted positive amplitude occurs at the saturation region of the transistor and
the distorted negative amplitude occurs as the transistor enters the cut-off region. In
the result, it can be seen that the voltage is clipped at a low value, hence there is a
distorted positive amplitude.
The voltage gain is then calculated using the measured values,
3.02
Av = = 107.9
28.0 × 10−3
Comparing with the simulation, where the gain was 130.235, the difference again is
caused due to the factors discussed before. The characteristic of the two BJT are
different as well as due to various external factors such as temperature and wear of
transistor caused due to the multiple use.
In the manual it is stated that the phase-relationship between the input and the
output is 180◦ . It is due to the reason that for a common emitter single stage BJT
amplifier, the circuit works as an inverter because of the following relation,

vo = −gm vbe (RC ||RL )

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However, comparing it with the hard copy values, where the phase angles were 92◦ for
50mVpp , 142◦ for 100mVpp and 157◦ for 200mVpp , this discrepancy is due to the emitter
capacitor present in the circuit which provides an additional shift. If they are removed
the phase-relationship should be around 180◦ , but the gain is reduced.
Comparing the simulation to the measured FFT spectra, as the sine amplitude
increases, more peaks appear. The appearance of more peaks is due to the distortion
caused by when the amplitude of the input signal exceeds the transistors linear range.
The non linearity causes distortions in the sine wave which introduces higher harmonic
terms. And such higher order terms appears as peaks in the FFT.

3.4 Evaluation Problem 4 : Bandwidth of amplifier circuit

Observing the hard copy, it can be inferred that the amplifier circuit works as a band
pass filter. Using the measured values, the bandwidth is calculated to be,

bandwidth = 289440 − 340 = 289100Hz

Comparing with the simulation, the bandwidth was calculated as 479188Hz, which is a
massive difference. This difference is likely due to the parasitic capacitance components
from the internal capacitance within the junction of the transistor, the breadboard and
the connecting wires used. Similarly, external factors such as thermal variation can also
alter the frequency response at higher frequencies.

4 Conclusion
Overall the experiment was conducted to explore and learn more about bipolar junction
transistors. The first part discussed the method to identify the pins of the BJT using a
multimeter. It was concluded that the BJT use in the experiment was an NPN transis-
tor. Similarly, the second part focused on the operation point of the BJT was explored.
The values obtained from the experiment was then compared with the simulation and
both of them were found to be close with each other. However, error due to dissimilar
characteristic of the simulated and actual transistor and various external factor caused
slight differences between the two. The third part focused in the amplification of the
input signal. The voltage gain was also measured and compared with the simulation
values, which again had differences due to the reason as discussed before in part 2.
Finally, the last part the bandpass characteristic of an amplifier circuit was observed.
The bandwidth and the cut-off frequencies were measured and again compared with
the simulated values.

5 References
1. 20240829-co-526-b manual - U.Pagel, Page(40-70)

2. Behzad, Razavi, 2nd edition, Fundamentals of Microelectronics

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6 Appendix
6.1 Prelab Experiment 4 : Operational Amplifier
6.1.1 Problem 1 : Simulate a Differential Amplifier
The following circuit was implemented in to LTSpice:

Figure 6.1: LTSpice Simulation

The DC point operation values were determined as follows,

VBE (T1 , T2 ) -0.675918 V

VC (T1 , T2 ) 5.3824 V
IC (T1 , T2 ) 0.00209891 A
IE (T1 , T2 ) -0.002109 A
IRE 0.00421786 A

Table 8: DC point operation values

Changing the transistor with a different one, made the values no longer symmetric.
Thus, the values weren’t similar with each other.

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 Similarly, the transient analysis was done for the single ended input and the Avdif f
was measured to be,
2.9724595
dBAvdif f = 20 log = 29.475
100.10−3

Figure 6.2: LTspice simulation

Figure 6.3: Collector Voltages

Similarly, it was also done for the common mode input and AV cm was measured,

49.203534.10−3
dBAV cm = 20 log = −6.16
100.10−3

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 Figure 6.4: LTspice simulation

Figure 6.5: Collector Voltages

Finally, the common-mode rejection ratio was measured to be,

CM M R = dBAvdif f − dBAV cm = 35.635

The entire simulation was repeated however, R3 is now replaced with a constant
current sources equal to the value measured in part 1.

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 Figure 6.6: LTspice simulation

The DC point operation values were determined as follows,

VBE (T1 , T2 ) -0.673622 V

VC (T1 , T2 ) 5.3824 V
IC (T1 , T2 ) 0.00209891 A
IE (T1 , T2 ) -0.002109 A
IRE 0.00421786 A

Table 9: DC point operation values

Again, the transient analysis was done for the single ended input and the Avdif f
was measured to be,
2.9477713
dBAvdif f = 20 log = 29.389
100.10−3

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 Figure 6.7: LTspice simulation

Figure 6.8: Collector Voltages

Similarly, it was also done for the common mode input and AV cm was measured,

21.457672.10−6
dBAV cm = 20 log = −73.36
100.10−3

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 Figure 6.9: LTspice simulation

Figure 6.10: Collector Voltages

Finally, the common-mode rejection ratio was measured to be,

CM M R = dBAvdif f − dBAV cm = 102.749

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6.2 Experiment 4 Data
6.2.1 Problem 1 : Differential amplifier using a fixed emitter resistor
The dc bias values:

T1 T2
VBE 0.6334 V 0.6342 V
VC 5.466 V 5.409 V
VB -0.0412 V -0.0413 V
IC 0.002144545 A 0.002095455 A
IR3 0.004264091 A

Table 10: DC Bias Value

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 3.52
dBAV dif f = 20 log = 30.4247
106.10−3
55.2.10−3
dBAV cm = 20 log = −5.46002
103.5.10−3

CM M R = dBAvdif f − dBAV cm = 35.88476

6.2.2 Problem 2 : Implement a Current Source

10 − 4.7
R1 = = 530Ω
10 × 10−3
4.7 − 0.7
R2 = = 1000Ω
4 × 10−3

6.2.3 Problem 3 : Differential amplifier using a Current Source

The dc bias values:

T1 T2
VBE 0.6276 V 0.6279 V
VC 5.849 V 5.791 V
VB -0.0374 V -0.0372 V
IC 0.001935 A 0.001926 A
IR3 0.003892 A

Table 11: DC Bias Value

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Where,
3.8919
IR3 = = 0.003892
1000

3.28
dBAV dif f = 20 log = 29.649
108.10−3

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 20.8.10−3
dBAV cm = 20 log = −13.9375
103.5.10−3

CM M R = dBAvdif f − dBAV cm = 43.5865

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