Second Edition Operational Amplifiers and Linear ICs . David A. Bell{ON6S3u5 Operational Amplifiers an Linear ICs i Second Edition David A. Bell Lambton College of Applied Arts and Techi Sarnia, Ontario, Canada REFERENCE BOOK Prentice-Hall of India Private Limited) New Delhi - 110 001 2008This Indian Reprint—Rs. 195.00 (Original U.S. Edition—Rs. 3524.00) OPERATIONAL AMPLIFIERS AND LINEAR ICs, 2nd Ed. by David A. Bell © 1997 by David A. Bell. All rights reserved. No part of this book may be reproduced in any form, by mimeograph or any other means, without permission in. writing from the publisher. ISBN-978-81-203-2359-9 ¥ For sale in india, Bangladesh, Myanmar, Cambodia, China, Fiji, Laos, Malaysia, Nepal, Pakistan, Philippines, Singapore, South Korea, Sri Lanka, Taiwan, Thailand, and Vietnam, Published by Asoke K. Ghosh, Prentice-Hall of India Private Limited, M-97, Gonnaught Circus, New Delhi-11000% and Printed by V.K. Batra at Pearl Offset Press Private Limited, New Delhi-110016.Contents Preface Chapter 1 Introduction to Operational Amplifiers 1 Objectives, | Introduction, 2 1-1 Operational Amplifier Description, 2 1-2 Basic Operational Amplifier Circuit, 5 1-3. The 741 IC Operational Amplifier, 7 1-4 The Voltage Follower Circuit, 9 1-5 The Noninverting Amplifier, 13 1-6 The Inverting Amplifier, 15 Review Questions, 17 Problems, 17 Laboratory Exercises, 18 Chapter 2 Operational Amplifier Parameters 20 Objectives, 20 Introduction, 21 2-1 Input and Output Voltage, 21 2-2 Common Mode and Supply Rejection, 23 2-3 Offset Voltages and Currents, 26 2-4 Input and Output Impedances, 29 2-5. Slew Rate and Frequency Limitations, 31 Review Questions, 33 Problems, 33 Laboratory Exercises, 34 Chapter 3 Op-Amps as DC Amplifiers 37 Objectives, 37 Introduction, 38 3-1 Biasing Operational Amplifiers, 38 3-2. Direct-Coupled Voltage Followers, 41 3-3 Direct-Coupled Noninverting Amplifiers, 46 3-4 Direct-Coupled Inverting Amplifiers, 50 3-5. Summing Amplifiers, 54 3-6 Difference Amplifier, 57Review Questions, 62 Problems, 63 Computer Problems, 64 Laboratory Exercises, 65 Chapter 4 Op-Amps as AC Amplifiers 67 ee 5 aetna on ale lacsat Objectives, 67 Introduction, 68 4-1 Capacitor-Coupled Voltage Follower, 68 4-2. High Z,, Capacitor-Coupled Voltage Follower, 71 4-3. Capacitor-Coupled Noninverting Amplifier, 74 4-4 High Z;, Capacitor-Coupled Noninverting Amplifier, 75 4-5 Capacitor-Coupled Inverting Amplifier, 78 4-6 Setting the Upper Cutoff Frequency, 78 4-7 Capacitor-Coupled Difference Amplifier, 80 4-8 Use ofa Single-Polarity Supply, 81 Review Questions, 85 Problems, 86 Computer Problems, 88 Laboratory Exercises, 88 Chapter 5 Op-Amps Frequency Response and Compensation 90 ee ee ete est ets Objectives, 90 Introduction, 91 5-1 Op-amp Circuit Stability, 91 5-2 Frequency and Phase Response, 93 5-3. Frequency Compensating Methods, 98 5-4 Manufacturer's Recommended Compensation, 101 5-5 Op-amp Circuit Bandwidth, 107 5-6 Slew Rate Effects, 112 5-7 Stray Capacitance Effects, 116 5-8 Load Capacitance Effects, 120 5-9 2), Mod Compensation, 123 5-10 Circuit Stability Precautions, 126 Review Questions, 127 Problems, 128 Computer Problems, 130 Laboratory Exercises, 130Chapter 6 Miscellaneous Op-amp Linear Applications 132 Objectives, 132 Introduction, 133 6-1 . Voltage Sources, 133 6-2 Current Sources and Current Sinks, 137 6-3 Precision Current Sink and Source Circuits, 140 6-4 Current Amplifiers, 142 65 DC Voltmeter, 144 6-6 AC Voltmeter, 145 67 Linear Ohmmeter Circuit, 148 6-8 Instrumentation Amplifier, 151 Review Questions, 157 Problems, 158 Computer Problems, 160 Laboratory Exercises, 160 Chapter 7 Signal Processing Circuits 162 Objectives, 162 Introduction, 163 7-1 Precision Half-Wave Rectifiers, 163 7-2. Precision Full-Wave Rectifiers, 167 7-3. Limiting Circuits, 172 7-4 Clamping circuits, 178 7-5, Peak Detectors, 182 34 Sample-and-Hold Circuit, 185 Review Questions, 189 Problems, 190 Computer Problems, 191 Laboratory Exercises, 191 Chapter 8 Differentiating and Integrating Circuits 193 Objectives, 193 Introduction, 194 8-1 Differentiating Circuit, 194 8-2. Differentiator Design, 195 8-3. Differentiating Circuit Performance, 197 8-4 Integrating Circuit, 200 8-5 Integrator Design, 202 8-6 Integrating Circuit Performance. 204Review Questions, 207 Problems, 207 Computer Problems, 208 Laboratory Exercises, 208 Chapter 9 Op-amp Non-Linear Circuits 210 ee ee a Objectives, 210 Introduction, 211 9-1 Op-amps in Switching Circuits, 211 9-2 Crossing Detectors, 213 9-3 Inverting Schmitt Trigger Circuit, 218 9-4 Noninverting Schmitt Circuits, 222 9-3 Astable Multivibrator, 227 9-6 Monostable Multivibrator, 229 Review Questions, 233 Problems, 234 Computer Problems, 235 Laboratory Exercises, 235 Chapter 10 Signal Generators 237 ee Objectives, 237 Introduction, 238 10-1 Triangular/Rectangular Wave Generator, 238 10-2. Waveform Generator Design, 241 10-3 Phase-Shift Oscillator, 244 10-4 Oscillator Amplitude Stabilization, 247 10-5 Wein Bridge Oscillator, 249 10-6 Signal Generator Output Controls, 253 Review Questions, 255 Problems, 256 Computer Problems, 257 Laboratory Exercises, 257 Chapter 11 Active Filters 259 SS ees Objectives, 259 Introduction, 260 Il-1 All-Pass Phase Shifting Circuits, 260 11-2. First-Order Low-Pass Active Filter, 264 11-3, Second-Order Low-Pass Filter, 266 11-4 First-Order High-Pass Filter, 26911-5. Second-Order High-Pass Filter, 270 11-6 Third-Order Low-Pass Filter, 272 11-7 Third-Order High-Pass Filter, 274 11-8 Bandpass Filter, 276 11-9 State-Variable Bandpass Filter, 283 11-10 Bandstop Filter, 286 Review Questions, 288 Problems, 289 Computer Problems, 290 Laboratory Exercises, 290 Chapter 12 DC Voltage Regulators 292 Objectives, 292 Introduction, 293 12-1 Voltage Regulator Basics, 293 12-2 Voltage Follower Regulator, 295 12-3 Adjustable Output Regulator, 298 12-4 Precision Voltage Regulator, 302 12-5 Output Current Limiting, 306 12-6 Plus-Minus Supplies, 312 12-7 Integrated Circuit Voltage Regulators, 313 Review Questions. 319 Problems, 320 Computer Problems, 321 Laboratory Exercises, 321 Glossary, 323 Answers to Odd-Numbered Problems, 327 Appendices331 1-1 LM741 Operational Amplifier, 331 1-2 LM108 and LM308 Operational Amplifier, 335 1-3. LF353 BIFET Operational Amplifier, 336 1-4 LM715 Operational Amplifier, 338 1-5 _LM709 Operational Amplifier, 339 1-6 723 Precision Voltage Regulator, 340 2-1 Typical Standard Resistor Values, 341 2-2 Typical Standard Capacitor Values, 343 Index, 345Preface Graduates of electronic technology courses should understand the use of operational amplifiers, be able to select op-amps for particular applications, and know how to calculate the values of components that must be connected externally. The basic operational amplifier is a very simple device, and its circuit applications are much easier to understand than similar discrete component transistor circuits. Op-amp circuit design is astonishingly simple; most design calculations involve little more than Ohm's law and the capacitive impedance equation. ‘Commencing with a description of the basic operational amplifier circuit, the text moves immediately to the industry standard 741 op-amp. Use of the 741 as a voltage follower, noninverting amplifier, and inverting amplifier are explained. Operational amplifier characteristics and parameters are next investigated, and various op-amp types are compared. Chapters 3 and 4 show how easy it is to design (Bipolar and BIFET) op-amps into practical direct-coupled and capacitor- coupled amplifier circuits. Topics covered are: biasing requirements, calculation of resistor and capacitor values for specified gain and frequency response, selection of standard value components, input and output impedances, ‘The very important topic of op-amp frequency compensation is often either glossed over or presented in an almost incomprehensible manner, In Chapter 5 the use of the manufacture's recommended compensating components is demonstrated. Practical design examples are given, precautions for avoiding circuit instability are listed, and additional compensating techniques are discussed. Succeeding chapters treal a wide variety of op-amp applications and op-amp related integrated circuits. Topics covered include: linear applications, nonlinear circuits, signal processing, comparators, function generators, filters, oscillators, and voltage regulators. As well as explaining the operation of cach circuit, practical design examples are offered throughout. I am always grateful for suggestions that may improve the presentation of the material coveredin my books. Comments from users of this book would be very welcome, David BellChapter 1 Introduction to Operational Amplifiers Objectives You will be able to: Sketch the circuit symbol for an operational amplifier (op-amp), and identify all terminals. Sketch the input and output (internal) circuit components of an op- amp. Explain input bias current, output impedance, and voltage gain Sketch and compare typical IC op-amp packages showing the terminal numbering systems, Draw a basic (three-transistor) circuit diagram of an op-amp. Identify all terminals, and explain the circuit operation. Sketch the following operational amplifier internal circuit components, and explain the operation of each: constant current tail, complementary emitter follower, current mirror. State typical values of voltage gain, input resistance, output resistance, and input bias current for a 741 op-amp. Sketch the following op-amp circuits; in each case show the connection of the basic op-amp circuit and explain its operation: voltage follower, noninverting amplifier, inverting amplifier. Derive the voltage gain equations for noninverting and inverting amplifiers. Given the circuit components, calculate the voltage gains.2 Operational Amplifiers and Linear ICs INTRODUCTION Operational amplifiers are very high gain integrated circuit amplifiers with two high- impedance input terminals and one low-impedance output. The inputs are identified as noninverting input and inverting input because of the way in which they affect the output voltage. The basic circuit of an operational amplifier consists of a differential amplifier input stage and an emitter-follower output stage. By the use of externally connected resistors, an operational amplifier can be employed for a great many ap- plications. The simplest of these are the voltage follower, the noninverting am- plifier, and the inverting amplifier. 1-1 OPERATIONAL AMPLIFIER DESCRIPTION Circuit Symbol and Terminals The circuit symbol for an operational amplifier (op-amp) illustrated in Fig. 1-1 shows there are two input terminals, one output, and two supply terminals. Because plus-minus supply voltages are normally used, the supply terminals are identified as +Vec (the positive supply terminal) and —Vre (the negative supply terminal). Typi- cal supply voltages for operational amplifiers range from +9 V to +22 V. +Vec Investing Figure 1-1 Circuit symbol for an oper- inate» SSS Gh Output ational amplifier (op-amp). There are Radentrie ele x two supply terminals (+Vce and ~Vex), input two high-impedance inputs (inverting in- put and noninverting input), and one “Vie Jow-impedance output The two input terminals of the operational amplifier are designated inverting input (identified with a minus sign) and noninverting input (plus sign). When a posi- tive-going voltage is applied to the inverting input, the output voltage tends to move in a negative direction. Conversely, a negative-going voltage signal at the inverting input causes the output voltage to move in a positive direction. A positive-going in- put at the noninverting terminal produces a positive-going output and a negative going input to the noninverting terminal produces a negative-going output. Thus, any input signal at the inverting input terminal produces an inverted output, and any input to the noninverting terminal generates a noninverted output. Currents, Impedances, and Voltage Levels As illustrated in Fig. 1-2, the input terminals of an operational amplifier are usually connected to the bases of two transistors. (Sometimes the gate terminals of Field Ef- fect transistors are involved.) Because each transistor requires some base current to maintain it in an operating state, a low-level direct current must be provided to eachCh. 1 — Introduction to Operational Amplifiers 3 Figure 1-2 The input terminals of an operational amplifier are normally the base terminals of two transistors (or the gates of two FETS). The output is an emitter fol- ower stage for low impedance op-amp input terminal. Typically the de input current is 500 nA or less. The circuit arrangement also affords high input impedances, usually 1 MQ. or greater. ‘The output stage of an operational amplifier is normally an emitter-follower for low output impedance. (As explained in Section 1-3, the actual circuit is more com- plicated than the simple emitter-follower illustrated in Fig. 1-2.) The maximum out- put current that can be supplied is typically 25 mA and the output impedance is usu- ally around 75 2. In some applications both input terminals of an operational amplifier are biased close to ground level and the output remains at ground level until an input signal is applied. With most operational amplifiers the output voltage can be driven to within 1V of Vcc and —Vre before output saturation occurs. An op-amp with a +15 V sup- ply could typically produce a +14 V maximum output swing. Voltage Gain Like other amplifiers, the voltage gain of an operational amplifier is defined as (out put voltage)/(input voltage). The output voltage (V,) is usually measured between the ‘output terminal and ground. However, the op-amp input voltage (V.) is the differen- tial input voltage, or the difference between voltage levels at the input terminals (see Fig. 1-2). Thus, if the inverting input terminal voltage is zero (or ground level) and the noninverting input voltage is 100 4V above ground, the differential input voltage is the difference between the two; that is, 100 V. Similarly, if the inverting input level is 100 :V and the noninverting input is + 100 .V, then the difference input to the amplifier is 200 UV. Voltage gains of 200 000 are common with IC operational amplifiers. ThisOperational Amplifiers and Linear ICs means, for example, that to produce a 5 V output, the required voltage difference at the input terminals is SV = 25 pV Such voltage gains ere usually much too high for most applications. However, they are very suitable as the open-loop gain for circuits using negative feedback Externally connected feedback resistors are normally used to stabilize the circuit voltage gain to a desired value. Packaging Some typical operational amplifier packages are illustrated in Fig. 1-3. The plastic dual-in-line (DIP) package in Fig. 1-3(a) has eight terminals, only five of which are normally used for a basic operational amplifier. The TO-S metal can-type package shown in Fig. 1-3(b) also uses only five of its eight terminals. As with other semi- conductor devices, a metal can package can normally dissipate more heat than a Plastic container. But DIP packages are usually the least expensive and they can be more compact than metal can containers. This last point is further illustrated by the (four amplifier) quad DIP package shown in Fig. 1-3(c). 2768 non en OUL eae he sq aq Top view Top view {a} Plastic dual.inine (IP) package (b) Metal can package 413 nn u 1 10 9 8 on i ea UU 567 is O < sq U S el Top view (6) Quad amplifier DIP package Figure 1-3 Operational amplifier packages. Single op-amps are available in plas- tic dual-in-line (DIP) packages and in metal can enclosures. Dual and quad DIP Packages are also available. The terminal numbers shown are for a 741 op-amp.Ch, 1 — Introduction to Operational Amplifiers 5 1-2 BASIC OPERATIONAL AMPLIFIER CIRCUIT ‘The basic circuit of an operational amplifier is illustrated in Fig. 1-4. Plus and minus supply voltages (+Vcc and —Vee) are provided, and the two input terminals are grounded. Transistors Q, and Q» constitute a differential amplifier, which produces a voltage change at the collector of Q2 when a difference input voltage is applied to the bases of Q; and Qz. Transistor Q; operates as an emitter-follower to provide a low output impedance. As illustrated, the de output voltage level at terminal # 6 is Vo = Vee — Vre — Voes or Vo = Vee — (Ic2Rc) — Vor a-) ‘Assume that Qi and Qs are matched transistors, that is they have equal Ver levels and equal current gains. Then, with both transistor bases at ground level, the emitter currents are equal, and both Jr: and Iz flow through the common emitter resistor, Re. The total emitter current could be calculated as, Vee Tey + Te = With Q, and Q: bases grounded, Ver = Ver ~ Vee s0, Vee. — Vs In + I = (1-2) To investigate the circuit operation, assume that Vc = +10 V, Vex = —10 V, Re = 4.7 kQ, Rc = 6.8 kO, and all transistors have Vas = 0.7 V. #7 0 Wee o-Vee #4 Figure 1-4 The basic circuit of an operational amplifier has a differential am- plier input stage and an emitter follower output.Operational Amplifiers and Linear ICs With both input terminals at ground level, Eq. 1-2, fy + deg = Me Vee - SOV OT ~ 2mA therefore, Je = Tee = 1 mA and la~In = 1mA Eq.1-1, Vo = Vee — (Ie2Rc) ~ Vee = 10 V ~ (1 mA x 6.8kQ) ~ 0.7 V =25V If a positive-going voltage is applied to the noninverting input terminal, Q; base is Pulled up by the input voltage, and its emitter terminal tends to.follow the input sig- nal. Since Q: and Q; emitters are connected together, the emitter of Qs is also pulled up by the positive-going signal at the noninverting input terminal. The base voltage of Qn is fixed at ground level so the positive-going movement at its emitter causes a reduction in its base-emitter voltage (Vara). The result of the reduction in Vaex is that its emitter current is reduced and consequently its collector current is re duced. For convenience, assume that the positive-going input at the base of Q; reduces {ea by 0.2 mA, (ie., from 1 mA to 0.8 mA). This gives a new level of output voltage. Eq. 1-1, Vo = Veo ~ (leaRe) — Vere = 10V — (0.8 mA 6.8kQ) — 0.7 V = 3.9V ‘The output voltage has changed from +2.5 V to +3.9 V, a change of +1.4 V. Itis seen that a positive-going signal at the noninverting input terminal has produced a positive-going output voltage. Now consider what occurs when the noninverting terminal is grounded and a Positive-going input is applied to the inverting input terminal. In this case, Q2 base is Pulled up, the base-emitter voltage of Q, is increased, and that of Q, is reduced by a similar amount. This results in an increase in Ir and a consequent increase in Ics. Once again, for convenience, assume that a 0.2 mA change occurs in Icy. Thus, Ic is increased from 1 mA to 1.2 mA by the positive-going voltage at the in verting input terminal. The output voltage can now be calculated as Eq. 1-1, Vo = Vee — (Ica Rc) — Vee = 10 V ~ (1.2 mA x 6.8 kQ) — 0.7 V ~11V The output voltage has now changed from its original level of +2.5 V to approxi-Ch. 1 — Introduction to Operational Amplifiers 7 mately +1.1 V, a change of —1.4 V. Therefore, the positive-going signal at the in- verting input terminal produced a negative-going voltage change at the output. Tt has been shown that a basic operational amplifier circuit consists of a differ- ential amplifier stage with two (inverting and noninverting) input terminals and a voltage follower output stage. The differential amplifier offers a high impedance at both input terminals and it produces voltage gain. The output stage gives the op-amp a low output impedance. A practical operational amplifier circuit is much more com- plex than the basic circuit. This is discussed in the next section 1-3 THE 741 IC OPERATIONAL AMPLIFIER Practical Op-Amp Circuitry As well as the input and output stages discussed in Section 1-2, the actual circuit of a practical IC operational amplifier must have an intermediate stage to produce the required very high voltage gain, The circuitry also has to be considerably more com- plex than the simple arrangements illustrated in Fig. 1-4. For example, with the dif- ferential amplifier stage in Fig. 1-4, any change in ~Ver would produce a change in the voltage drop across emitter resistor Re. This would result in an alteration in [e1, Jr, and Ie2. The change in Je: would alter Vec and thus affect the level of the de out- put voltage. In fact, the variation in —Ve« would have an effect similar to an input voltage. This can be minimized by replacing the emitter resistor with the constant current circuit (or constant current tail) illustrated in Fig. 1-5(a). A constant voltage tee Dr Dz 0 -Viz (2) Differential amplifier with (b} Complementary emitter a constant current emitter follower output stage eieeuit Figure 1-5 Inclusion of a constant current tail in the differential amplifier, and use of a complementary emitter follower improves the performance of the basic op- amp circuit in Fig. 1-4.Operational Amplifiers and Linear ICs fall, both bases rise or fall together and consequently both fall at the same time. A positive-going base voltage would Produce a positive-going output which is Var below the level ef Qs base. Similarly, a negative-going base voltage pulls down the beac of Qs, and the emitter of Qs follows its base keeping the transistor on regardless of the fall time of the base Yollage. Thus, the output voltage always follows changes in the base voltage of Qs and Qe, and a low output impedance is maintained. Integrated Circuit Techniques One reason why most IC operational amplifier citcuts look quite complex is that sev- ral special techniques, unsuited to discrete component Circuits, are employed in in- tegrated circuits. Also, transistors are frequently substituted in place of diodes and resistors. (a) Current micror (b) Constant current circuit as ‘tonsistor collector load Figure 1-6 The current mirror is one IC technique that takes advantage of closely matched transistors. Using the current mirror as a constant ‘current circuit to replace ‘collector resistor gives a very high voltage gain,Ch. 1 — Introduction to Operational Amplifiers 9 Figure 1-6(a) shows a circuit known as a current mirror, which is widely used in linear IC’s. Because transistor Q; has its base and collector terminals directly con- nected, it behaves as a diode with the collector terminal functioning as the anode and the emitter as the cathode. The device current Jc: can be calculated as, fcr = (V — Vaei)/Ri. 1C fabrication methods result in closely matched components. Therefore, the Ic/Vse characteristics of transistors Q; and Q: are very similar. Con- sequently, with Vpe2 equal to Vac, Ica is likely to equal Ici. In this case, transistor Q> functions as a constant-current source without any need for an emitter resistor and without the voltage drop that would exist across the emitter resistor: A current-mirror type of constant current source is substituted in place of a collector resistor for Q; in Fig. 1-6(b). This arrangement passes the necessary de collector current for Qs, but gives an effective collector ac load of approximately 1/hee. Because this is a very large quantity, it results in a very high voltage gain for this stage. 741 IC Op-Amp Circuit ‘The complete circuit of the commonly used 741 IC operational amplifier is illustrated in Fig. 1-7. Clearly, it cannot be readily understood in terms of discrete component circuitry. However, it can be seen that Q; and Q2 are the input transistors of the dif- ferential amplifier stage, and Qu and Qa are the complementary emitter follower output transistors. ‘A thorough understanding of the circuit details of the 741 (or any other inte- grated circuit) is not required in order to use the device. The operation of the IC can be simply thought of in terms of the basic circuit in Fig. 1-4. What is required is a knowledge of op-amp biasing methods and of how to select the required external components for a given application. Suitable supply voltages and the correct termi- nal connections must be used. A knowledge of the limitations of the IC is also im- portant, The very high voltage gain of many operational amplifiers causes high fre- quency oscillations to occur when feedback is employed. Externally connected com- pensating components are often required to prevent unwanted oscillations (see Chapter 5). The 741 op-amp is internally compensated to minimize the risk of oscil- lations. However, the compensation also has the effect of limiting the high fre- quency performance of the amplifier. ‘Some of the parameters listed on the 741 op-amp date sheet in Appendix 1-1 are shown in the data sheet portion illustrated in Fig. 1-8. Other parameters are dis- cussed in Chapter 2. 1-4 THE VOLTAGE FOLLOWER CIRCUIT The IC operational amplifier lends itself to a wide variety of applications. The very simplest of these is the voltage follower circuit illustrated in Fig. 1-9(a). The invert- ing input terminal is connected directly to the output terminal and the signal is ap- plied to the noninverting input terminal. The output voltage now faithfully followsOperational Amplifiers and Linear ICs 10 Fomo|fo}-sNTUII AreWaUIE!dUUOD a4 aIMINSUOD 2% pue MZ -x -stsuen ndut aun axe *% pur 'G -soyydure jeuonsiodo pz v 5 ‘aims indino fue jenuar2ypp 2tp 30} s40y no aadwoy f-1 aandiy anding xs *y ot anduy Suryony,Ch, 1 — Introduction to Operational Amplifiers 11 Electrical characteristics (Vs = +15 V, Ta = 25°C unless otherwise specified) | | | Parameters Conditions Min] Typ Max | Unit | Input resistonce [03 [20] a | Targe signal REI, T voltage gain Veg = 10 [80.000 | 200 coo} ‘Output resistance 75 a) Figure 1-8 Portion of 741 op-amp data sheet specifying input resistance, output resistance, and voltage gain. vy (a) Voltage follower circuit festa Figure 1-9 In a voltage follower cir- cuit, the op-amp output terminal is rectly connected to the inverting input © -Vie terminal. As the input voltage changes, the output changes to keep the inverting input voltage equal to the noninverting input voltage (b) Basic operational amplifier circuit connected as a voltage follower12 Operational Amplifiers and Linear ICs the input, giving the circuit a gain of 1. The voltage follower has a very high input impedance and a very low output impedance {fo understand how the voltage follower operates consider the basic op-amp circuit reproduced in Fig. 1-9(b). As in Fig. 1-9(a), the output (terminal 6) is com, nected to the inverting input terminal (terminal 2). Note that one difference between the basic op-amp circuit already studied and that in Fig. 1-9(b) is that bias resistors (R. and Rj) are now included at the base of Qs, This arrangement allows the de out, Put voltage to be lower than that at the collector of Qs. With terminal 3 (noninverting input) grounded, terminal 2 and the output must also be at ground level. If the output voltage level were to move slightly above ground level, the base voltage of Q2 would be higher than that at the base of Q; and consequently Ice would increase. The increased level of Jc: would increase the voltage drop across Rc and thus push the output voltage down until Ves and Vp, were Once again equal. Similarly, if the output were to fall below ground level Vsz would become lower than Voi. This would lower /cz, reduce the voltage drop across Re, and move the output voltage back up to ground level. The above reasoning can also be applied to show that if the input voltage (at terminal 3) was +1 V, or ~1 V, or almost any other level, the output voltage would be virtually the same as the input. Thus, the output follows the input, In the voltage follower there is a very smail difference between the input voltage and the output voltage due to the very high internal voltage gain of the oper- ational amplifier. To produce an output voltage change there has to be a voltage dif. ference (or differential input) at the inverting and noninverting input terminals. ‘This means that, because the inverting terminal is connected to the output, there is a small difference between the input and output voltage levels. To produce an output closely equal to V,, the differential input is Ve= (1-3) Rls where M is the internal voltage gain (or open-loop gain) of the operational amplifier. The precise output voltage is or (1-4) Where V./M is an error voltage. Obviously, the largest value of internal gain gives the smallest possible error. Other sources of error in voltage follower circuite are discussed in Chapters 2 and 3, ‘Example 1-1 A 741 IC operational amplifier is connected to function as a voltage follower. The ine put signal is IV. Assuming that the amplifier gain is the only error source, determine the output voltage that occurs with an op-amp which has (a) typical gain, (b) minimum gain.Ch. 1 — Introduction to Operational Amplifiers 43 Solution From Fig. 1-8, the 741 has a large signal voltage gain of M = $0 000 (minimum), 200 000 (typical) lv (a) Eq. 1-4, wavi-taiv- ah = 0.999 995 V FRAN. (b) Y= 55.000 = 0.999 98 V 1-5 THE NONINVERTING AMPLIFIER The noninverting amplifier in Fig. 1-10(a) and (b) behaves in a similar way to the voltage follower circuit. The difference is, instead of all of the output being fed di- rectly back to the input, only a portion is fed back. The output voltage is potentially divided across resistors R2 and R; before it is applied to the inverting input. Once again, consider the conditions that exist when the noninverting input ter- minal is grounded. As for the voltage follower circuit, the inverting input terminal must also be at ground level; otherwise any voltage difference would be amplified to move the inverting input terminal back to ground level. Because the junction of Rz and Rs is connected to the inverting input terminal, the voltage at this point must also be ground level, and consequently there is zero voltage drop across Rs. With Ves equal to zero, the current fz which flows through R2 and Rs must also be zero, (neglecting the very small bias current into terminal 2). Thus, there is zero voltage drop across Ra, and this means that the output voltage is equal to the input voltage, which is at ground level. Now suppose that a +100 mV input is applied to terminal 3. As already ex: plained, the output voltage will move to the level that makes the feedback voltage to terminal 2 equal to the input voltage. Because the feedback voltage is developed across resistor Rs, Ves = Vi= Rs Vo = I(R: + Rs) E{Rz + Rs) voltage gain Te or A, = (1-5)14 Operational Amplifiers and Linear ICs (b) Basic op-amp circuit connected {8 8 noninverting amplifier Figure 1-10 A noninverting amplifier operates in the same way as a voltage fol- tower, except thatthe ourput voltage is potentially divided before nt fed back to ‘he inverting input terminal. The circuit voltage gain is A, = (Re R)/R ‘Example 1-2 An op-amp noninverting amplifier, as illustrated in Fig. 1-10, has R2 = 8.2 KO and _ Rs = 150 Q. Calculate the amplifier voltage gain, and determine a new Tesistance | value for Rs to give a voltage gain of 75. Solution Eq. 1-5, Rit Ry _ 82k + 1500 RB 150.0 = 55.7Ch. 1 — Introduction to Operational Amplifiers 155i Ri+Ry R giving, 1-6 THE INVERTING AMPLIFIER The inverting amplifier illustrated in Fig. 1-11(a) is so named, because an input ap- plied via Ri to the inverting input terminal causes the output to go in a negative di- ection when the input is positive-going, and vice versa In Fig. 1-11(b) the basic op-amp circuit is shown connected as an inverting amplifier. Note that, as in Fig. 1-11(a), Ri is connected between the output and the inverting input terminal; also that R; is connected between the signal V; and the in- verting input terminal. This arrangement looks very similar to the noninverting amplifier in Fig. 1-10(b). In fact, if the bottom terminal of R, is grounded in Fig. 1-11(b) and terminal 3 is grounded in Fig. 1-10(b), the circuits are identical. As al- ready discussed in Section 1-5, when the input is grounded, the output of the op- ‘amp circuit is also at ground level. If an input voltage V; of +1 V is applied to R, in Fig. 1-11(b), the base of Qs is driven above the level of Q, base. Ics is increased, thus increasing the voltage drop across Rc and driving the output voltage down. The output voltage falls until Van is again equal to Vo. Because the base of Q; is grounded, the base voltage of Q. (ter- minal 2) will always be maintained at ground level regardless of the level of V;. For this reason the noninverting terminal in this type of circuit is termed a virtual ground or virtual earth. Note from the above explanation that V, is moved in a negative direction when V; goes positive. Similarly, when V; goes negative, V, has to move in a positive di- rection in order to return the inverting input terminal to ground level. Now return to Fig. 1-11(a), and recall that the voltage at the inverting input terminal always remains close to ground level, and because the junction of Ry and Ry is connected to the inverting input terminal that junction always remains at ground level. With V; at one end of R; and ground potential at the other end, V; appears across R;. Also with V, at one end of Rz and ground at the other end, V, is developed across R2. Ignoring the very small bias current flowing into the op-amp inverting in- put terminal, /, effectively flows through R; and R>. The input and output voltages can now be expressed as Y=R and Vo = —hRe v _ —hR, and voltage gain A a sl R16 Operational Amplifiers and Linear ICs (2) Inverting amplifier (b) Basic op.amp circuit connected ‘san inverting amplifier “igure 1-11 With the inverting amplifier, the signal voltage is applied via R, to Fi the inverting input terminal. This circuit is essentially the same as @ noninverting ‘amplifier with the noninverting input grounded and the signal applied to the bottom of the potential divider. ake Ri The minus sign indicates that this is an inverting amplifier. The sign can be ignored when it is convenient to do so. (1-6) or Ay Example 1-3 An op-amp inverting amplifier, as in Fig. 1-11, has R) = 270 0 and Rz = 8.2 kQ. Determine the voltage gain and calculate a new resistance value for R; to give a voltage gain of 60.Ch, 1 — Introduction to Operational Amplifiers iF Solution Eq. 1-6, REVIEW QUESTIONS J1, Sketch the circuit symbol for an operational amplifier and identify all terminals by name and number. 1-2. Draw a sketch to show the basic input and output components of an operational am- plifier. Briefly discuss the input bias current, input impedance, output impedance, and voltage gain 1-3, Sketch typical packaging arrangements for an operational amplifier, identify the ter~ minals, and briefly discuss the merits of each package type 1-4. Draw the basic circuit diagram of an operational amplifier; identify all terminals and briefly explain how the circuit operates. 1-5. Sketch the circuit of a differential amplifier stage which uses a constant current tail Explain 1-6, Draw a circuit diagram for a complementary emitter follower output stage. Explain. 1-7. Draw the circuit diagram of a current mirror and explain its operation. Show how a current mirror can be used to improve the stage gain of an amplifier 1-8. Briefly discuss the 741 IC operational amplifier and state typical parameters for the Tal. 1-9. Sketch an op-amp voltage follower circuit. Also, sketch a basic operational amplifier circuit connected as a voltage follower. Explain the operation of the voltage follower. 1-10. Sketch an op-amp noninverting amplifier circuit. Also, sketch a basic operational am- plifier circuit connected to function as a noninverting amplifier. Explain the operation of the noninverting amplifier and derive an equation for its voltage gain. 1-11, Sketch an op-amp inverting amplifier circuit. Also, sketch a basic operational am- plifier circuit connected to function as an inverting amplifier. Explain the operation of the inverting amplifier and derive an equation for its voltage gain. PROBLEMS 1-1. A741 operational amplifier is connected to function as a voltage follower. If the input voltage is 750 mV and the amplifier gain is the only error source, calculate the output voltage for an amplifier; (a) with the specified minimum voltage gain, (b) with the specified typical voltage gain.18 Operational Amplifiers and Linear ICs 1-2, An LM 308 operational amplifier (data sheet in ‘Appendix 1-2) is substituted in place 1-4, A voltage follower circuit of the 741 op-amp in Problem 1-1. Calculate the output voltage for cases (a) and (b) once again. An operational amplifier voltage follower is to operate with a minimum input signal of 200 mV. If the error in the output voltage due to amplifier gain is not to exceed 0.005%, determine the minimum voltage gain required for the operational amplifier. ing an LM308 operational amplifier is to reproduce the signal input with a maximum error of 10 V due to the amplifier gain. Calculate the ‘minimum acceptable signal amplitude 1-5. An op-amp noninverting amplifier (as in Fig. 1-10) has resistors of Ry = 22 kO, and Ry = 120, Calculate the output voltage produced by a 75 mV input. 1-6. An op-amp noninverting amplifier is to have a voltage gain of 101. If Rs (in Fig. 1-10) is 180 02, determine a suitable resistance value for Ry. 1-7, A 120 mV signal is to produce a 12 V output from an op-amp noninverting amplifier. A 15 kQ resistor is available for use as R: (in Fig. 1-10). Determine a suitable resis- tance value for Rs, 1-8. An op-amp noninverting amplifier (as in Fig. 1-10) has Ro = 27 k, and Ry = 1-9, An op-amp inverting amplifier (as in Fig. 1-11) has ri LL 390 @. Calculate the amplifier voltage gain, and determine the voltage gain that re- sults if the resistor positions are reversed. tors of R; = 120 0, and R: = 22 kQ. Calculate the output voltage produced by a 50 mV input. 10. An op-amp inverting amplifier is to have a voltage gain of 150. If Re (in Fig. 1-11) is 33 kQ, determine a suitable resistance value of Ry 1. Calculate the voltage gain of an op-amp inverting amplifier (as in Fig. 1-11) which has R; = 680 Q, and R: = 39 kQ. Also determine the new voltage gain if the resis- tor positions are reversed. 2. An op-amp inverting amplifier (as in Fig. 1-11) has a 0.5 V input signal, and its out- put is to be 9 V. A 12k? resistor is available for use as R2. Calculate a suitable resi: tance value for Ry. LABORATORY EXERCISES 1-1 Voltage Follower 1 Connect a 741 op-amp to function as a voltage follower, as illustrated in Fig. 1-9(a). Use a supply of £9 V to +15 V. Connect a dual-trace oscilloscope to monitor the input and output de voltage levels. Using an adjustable de voltage source, set the input voltage to +1 V, +2 V, and +3 V, in turn. Observe the output voltage level in each case. Repeat Procedure 3 using input levels of —1 V, -2 V, and ~3 V. . Remove the de source from the input, and apply a +5 V, 1 kHz sinusoidal signal. Measure the circuit output voltage, and note the phase relationship between input and output Adjust the signal amplitude to 2 V, and 3 V, in turn, and measure the output in cach case.Ch. 1 — Introduction to Operational Amplifiers 19 1-2 Noninverting Amplifier 1. Connect a 741 op-amp to function as a noninverting amplifier, as illustrated in Fig. 1-10(a). Use a supply of +9 V to +15 V, and resistors of R: = 8.2 kQ and Rs = 150.0, as in the first part of Example 1-2 2. Connect a dual-trace oscilloscope to monitor the input and output de voltage levels. 3. Using an adjustable de voltage source, set the input voltage to +50 mV and +100 mV, in turn. Measure the output voltage level and calculate the voltage gain in each case. 4. Repeat Procedure 3 using input levels of —50 mV and —100 mv. 5. Remove the de source from the input and apply a +25 mV, 1 kHz sinusoidal signal 6. Measure the output and note the phase relationship between input and output. 7. Adjust the signal amplitude to +50 mV. Measure the output and calculate the voltage gain. 8. Change Rs to approximately 111 ©, as in the second part of Example 1-2. (Use two series-connected 56 2 resistors.) 9. Repeat Procedure 7. 1-3 Inverting Amplifier 1. Connect a 741 op-amp to function as an inverting amplifier, as illustrated in Fig. 1-11@). Use a supply of +9 V to +15 V and resistors of R, = 270 {1 and R; = 8.2 kQ, as in the first part of Example 1-3. 2-7, Same as Procedures 2 through 7 for Laboratory Exercise 1-2 8 Change R; to approximately 137 0, as in the second part of Example 1-3. (Use two series-connected 68 0 resistors.) 9. Repeat Procedure 720 Chapter 2 Operational Amplifier Parameters Objectives ‘You will be able to: Explain the limitations on the input and output voltage of an op- amp. State typical op-amp input and output voltage ranges. Caleulate the effects of input and output voltage ranges upon op-amp circuits. Define the following quantities for op-amps: common-mode voltage, common-mode voltage gain, common-mode rejection ratio, and supply voltage rejection. Define input offiet voltage and input offset current for op-amps. Calculate the effects of input offset voltages and currents on op-amp circuits, Show offset voltages can be produced by bias resistors. Explain offset nulling, and show how it can be accomplished. Write equations for the input impedance and output impedance of an op-amp circuit using negative feedback. Calculate the input and output impedances for various op-amp circuits. Explain output short-circuit current for an op-amp, and state a typical level of op-amp output short-circuit current. Define op-amp slew rate, and show how op-amp circuit waveforms can be affected by slew rate. Sketch and explain a typical open-loop gain/frequency response graph for an op-amp.Ch, 2 — Operational Amplifier Parameters 21 INTRODUCTION Operational amplifier circuits have performance limits dependent upon the particular type of operational amplifier used. Each op-amp has a maximum input voltage range and a maximum output voltage range. Unwanted outputs can occur as a result of bias voltage changes, supply voltage variations, and ac ripple on the supply voltage. Input bias currents and mismatch of op-amp input transistors can also produce unwanted output voltages. The input impedance of an operational amplifier is normally very high and the output impedance is very low. When negative feedback is used, Zi, be- comes much higher and Zou becomes much lower than without feedback. There is a limit on how fast an operational amplifier output can be made to change and a limit on the highest signal frequency that may be employed. 244 INPUT AND OUTPUT VOLTAGE Input Voltage Range The basic operational amplifier circuit connected to function as a voltage follower (see Section 1-4 is reproduced in Fig. 2-1. As illustrated, the circuit might be designed to have a Veg of S V across transistors Q, and Qs. With a£10 V supply andthe bases of Q, and Q, at ground level, the voltage drops across and, would then be 5.7 V and 4.3 V respectively. Now consider what occurs when the input voltage increases or decreases and the output follows the input. occ = +10V 4 3 Vu 10 Figure 2-1 There are limits to the input and output voltage ranges of an opera- tional amplifier. In the basic op-amp circuit these limits occur when any of the tran- sistors approach saturation or cutoff.22 Operational Amplifiers and Linear ICs If the input voltage at Q, base goes down to —4 V, the output terminal and Q2 base also goes down to —4 V as the output follows the input. This means that the emitter terminals of Q; and Q2 are pushed down from —0.7 V to ~4.7'V. Conse- quently, the collector of Qs is pushed down by 4 V, reducing Vces from 5 V to 1 V. Although Q might still be operational with a Ver of 1 V, it is close to saturation. It is seen that there is a limit to the negative-going input voltage that can be applied to the operational amplifier if the circuit is to continue to function correctly. ‘There is also a limit to positive-going input voltages. When Vs; goes to +4 V in the circuit of Fig. 2-1, the voltage drop across resistor Ri must be reduced to something less than 1 V, in order to move Ve: and Vz3 up by 4 V to follow the input. ‘This requires a reduction in Jc: to a level that makes 2 approach cutoff. The input voltage cannot be allowed to become large enough to drive Q; into cutoff. The maximum positive-going and negative-going input voltage that may be ap- plied to an operational amplifier is termed its input voltage range. The 741 data sheet in Appendix 1-1 lists the typical input voltage range as +13 V when using a +15 V supply (see Fig. 2-2). ‘Common mode rejection ratio| 30 | 150 | Www Vv Vv | Supply voltage rejection ratio Output voltage swing Figure 2-2 Portion of 741 op-amp data sheet listing input voltage range, common ‘mode rejection ratio, supply voltage rejection ratio, and output voltage swing. Output Voltage Range With the voltage follower circuit discussed above, the maximum output voltage swing is limited by the input voltage range. However, where the op-amp is con- nected to function as either a noninverting or inverting amplifier, the output voltage may be much larger than the input. Just how far the output voltage can swing in a positive or negative direction depends on the supply voltage and the op-amp output cireuitry. Referring to the complementary emitter follower output stage in Fig. 1-5(b), it would appear that the output voltage should be able to rise until Qs is near saturation and fall until Qs approaches saturation, But because of the circuits that control the output stage, it is normally not possible to drive the output transistors close to satura- tion levels. A rough approximation for most operational amplifiers is that the maxi- mum output voltage swing is approximately equal to 1 V less than the supply voltage.Ch, 2 — Operational Amplifier Parameters 23 For the 741 op-amp with a supply of #15 V, the data sheet lists the ouput voltage swing as typically +14 V when R, = 10 kf (see Fig. 2-2). This means the specification applies only where the equivalent resistance of all resistors connected to the output is not less than 10 kQ. With lower resistance loads, the output voltage range is reduced. 2.2 COMMON MODE AND SUPPLY REJECTION Common Mode Rejection Refer again to the basic operational amplifier circuit in Fig. 1-9(b) reproduced in Fig. 2-3 with the feedback connection from output to input deleted. The two input terminals are connected together and both are raised to 1 V above ground level This is known as a common mode input. Note that there is no differential input; both input terminals are at the same potential. So ideally the output should be zero. o Vee ° Vie Figure 2-3. Basic op-amp circuit with the two input terminals connected together, and a common mode input voltage applied. The common mode rejection ratio (CMRR) is the open-loop gain divided by the common mode gain. CMRR = M/Acw Because the base voltages of Q; and Q: are raised to 1 V above ground, the voltage drop across emitter resistor Re is increased by 1 V, and, consequently, Ici and Jc: are increased. The increased level of /cz produces an increased voltage drop across resistor Rc, which results in a change in the output voltage at the emitter of Qs. Similarly, if a—1 V common mode input is applied, Zc: falls, and again a change is produced at the circuit output. So, as well as the open-loop (differential input) gain M, each op-amp has a common mode voltage gain Aen. The common mode gain is the output voltage change due to the common mode input divided by the common mode input voltage. = Voom Aem Vutem24 Operational Amplifiers and Linear ICs The above discussion refers to the basic operational amplifier circuit. A prac cal operational amplifier has additional circuitry, such as the constant current tail Fig. 1-5(a), to minimize the effects of common mode inputs. However, even with such circuitry, common mode signals still have some effect on the output. The suc- cess of the op-amp in rejecting common mode inputs is defined in the common mode rejection ratio (CMRR). This is the ratio of the open-loop gain M to the common mode gain Aon. =e CMRR = = (2-1) The CMRR is usually expressed as a decibel quantity on the op-amp data sheet. CMRR = 20 log # 4B (2-2) The effect of op-amp common mode gain is modified by feedback, just as the open-loop differential gain is modified by feedback to give a closed-loop gain. Con- sider the noninverting amplifier circuit in Fig. 2-4. With the input terminal grounded, the circuit output should also be at ground level. Now suppose a sine wave signal is picked up at both inputs, as illustrated. This is a common mode input. The output voltage should tend to be Veten) = Ac X Vitcom) However, any output voltage will produce a feedback voltage across resistor Ra, which results in a differential voltage at the op-amp input terminals. The differential input produces an output which tends to cancel the output voltage that caused the feedback. The differential input voltage required to cancel Vien iS, Voter) _ Am X View Vie eS rar Vi is also the feedback voltage developed across R:. So, Vetem Ro Vise “TR +R 5 ow Figure 2-4 A common mode input voltage appears at both input terminals. It is amplified by the common mode gain, but the gain is affected by negative feedback.‘Ch. 2 — Operational Amplifier Parameters 25 ie Vesem X Ro _ om X Vem) f. Rit+R M 7 AenView ,, Ri + Ri giving, Vaca a pe or, Votem = Grrpp * Ae (2-3) Example 2-1 A741 op-amp is used in a noninverting amplifier with a voltage gain of 50. Calculate the typical output voltage that would result from a common mode input with a peak level of 100 mV. Solution From the 741 data sheet (see Fig. 2-2), typical common mode rejection ratio = 90 dB 90 dB From Eq. 2-2, CMRR = antilog > = 31 623 _ Vin y 4 100mv Veen = Care * "31 623 * = 158 pV 50 From Eq. 2-3, Power Supply Voltage Rejection At the beginning of Section 1-3 it is explained that, with the basic operational am- plifier circuit in Fig. 1-4, a variation in ~Vee could have essentially the same effect as an input voltage change. The constant current tail in Fig. 1-5(a) is offered as a means of countering such supply voltage changes. However, even with such cir- cuitry, variations in Voc and Ver do produce some changes at the output. The power supply rejection ratio (PSRR) is a measure of how effective the operational amplifier is in dealing with variations in supply voltage. Ifa variation of 1 V in Vec or Vee causes the output to change by 1 V, then the supply voltage rejection ratio is J V per volt (1 V/V). If the output changes by 10 mV when one of the supply lines changes by 1 V, then the supply rejection ratio is 10 mV/V. : For the 741 operational amplifier, the supply voltage rejection ratio is specified as typically 30 pV/V (see Fig. 2-2). For the LM108 (Appendix 1-2), the supply voltage rejection is expressed in decibels. Example 2-2 ‘A 741 operational ampifier uses a +15 V supply with a 2 mV, 120 Hz ripple voltage superimposed. Calculate the amplitude of the output voltage produced by the power supply ripple.26 Operational Amplifiers and Linear ICs Solution Vescp) = Vaio) PSRR = 2 mV x (30 pV/V) = 60nV 2-3 OFFSET VOLTAGES AND CURRENTS Input Offset Voltage Refer once again to the basic operational amplifier circuit connected to function as a voltage follower as illustrated in Fig. 2-1. As already discussed, the output terminal and the inverting input terminal follow the voltage at the noninverting input. For the output voltage to be exactly equal to the input, transistors Q; and Q> must be per- fectly matched. The output voltage can be calculated as, Vo = Vi — Vari + Vor (2-4) With Veer = Varo, and Vi Vo = V, =.0 Now suppose that the transistors are not perfectly matched and that Vari 0.7 V while Veex = 0.6 V. With the input at ground level, V=0-07V+06V =-01V This unwanted output is known as an output offset voltage. To set V, to ground level, the input would have to be raised to + 0.1 V. This is termed an input offset voltage (Vos). Although transistors in integrated circuits are very well matched, there is al- ways some input offset voltage. The typical input offset voltage is listed as 1 mV on the 741 data sheet (see Fig. 2-5). Electrical characteristics (Vz = +15 V, Ta = 25°C unless otherwise specified) Parameters Conditions Min | Typ | Max | Unit [Input offset voltage Rs<10kQ 05] 5.0 | mv Input offset current 20 200 | nA Input bias current 80 | 500 | nA Figure 2-5 Portion of 741 op-amp data sheet listing input offset voltage, input offset current, and input bias current.Ch. 2— Operational Amplifier Parameters 27 Input Offset Current Another result of the input transistors of an operational amplifier not being perfectly matched is that, as well as the transistor base-emitter voltages being unequal, the current gain (hee) of one transistor may not be exactly equal to that of the other. Thus, when both transistors have equal levels of collector current, the base current in one might be 1 4A while the other has a base current of 1.2 4A. The difference in these two input current levels is known as the input offset current (In). When an operational amplifier is connected as a simple voltage follower cir- cuit, the input offset current has no effect. But some circuits have two equal-value resistors in series with the input terminals and in this case, the input offset current produces unequal voltage drops across these resistors (see Fig. 2-6). The difference in the resistor voltage drops behaves as a differential input voltage which produces an output offset voltage. +Vec Figure 2-6 Input bias currents to an op-amp produce voltage drops across re- sistors connected at the input. A differ- cence in the bias currents, known as the £0; input offset current, produces unequal Ve resistor voltage drops which result in an unwanted input voltage. V= IoiRs ~ Tne The typical input offset current for the 741 operational amplifier is specified as 20 mA, (see Fig. 2-5). Offset Nulling One method of dealing with input offset voltage and current is illustrated in Fig. 2-1), which shows a low-resistance potentiometer (R,) connected at the emitters of Q, and Q2. Adjustment of &, alters the total voltage drop from each base to the com- mon point at the potentiometer moving contact. Because an offset voltage is pro- duced by the input offset current, this adjustment can null the effects of both input offset current and input offset voltage. Figure 2-7(b) shows the manufacturer's recommended method of offset nulling for a 741. A 10 kQ potentiometer is connected to offset nulling terminals 1 and 5 and its moving contact is connected to the negative supply line, (Note the offset nulling terminals in Fig. 1-7.) The potentiometer is adjusted to null the output offset voltage to zero, thus nulling both input offset current and input offset voltage.28 Operational Amplifiers and Linear ICs +Vec Ver (b) Manufacturer's recommended method of offset nulling for the 741 (a) Adjustment of falters the balance of Vs and V2 Figure 2-7 When the op-amp input transistors are not perfectly matched, the dif- ferences in base-emitter Voltages produce an input offset voltage. An appropriately connected potentiometer provides adjustment for offset nulling, Resistor Tolerance Effect The discussions of offset voltages and currents assumed that either there were no re- sistors at the op-amp input terminals, or else that exactly equal resistors were con- nected to the input terminal. Most operational amplifier circuits have resistors at their input terminals and sometimes those resistors may not have equal resistance values. But, even when care is taken to use equal value resistors, the resistor toler- ance might be almost as effective in producing an output offset voltage as the opera- tional amplifier input offset voltage and input offset current. This is demonstrated in Example 2-3. Example 2-3 ‘The circuit in Fig. 2-6 uses a 741 operational amplifier and has Ry = R2 = 22 k with ‘a resistor tolerance of +20%. Determine the maximum input offset voltage due to, (a) the 741 specified input offset voltage, (b) the 741 input offset current, (c) the resistor tolerance. Solution (a) From the 741 data sheet, Viorsey = 5 mV maximum (b) From the 741 data sheet, Zyoin) = 200 nA maximum Viernes) = Tiottey % (Ri oF Ra) = 200 nA x 22k0 = 4.4 mVCh, 2— Operational Amplifier Parameters 29 (©) From the 741 data sheet, Jz = 500 nA maximum Because of the 20% resistor tolerance, the worst case error could be Ry = 22kM + 20% = 26.4k2 and Ry = 22kO. — 20% = 17.6kO For this situation, Vitornes) = eR: — Je Ra = Ia(R ~ Ra) = 500 nA (26.4 kM — 17.6 kM) =4.4mV 2-4 INPUT AND OUTPUT IMPEDANCES Input impedance The input impedance offered by any operational amplifier is substantially modified by its application. With all linear applications, some form of negative feed- back is provided by externally connected components. From negative feedback" the- ory, the impedance at the op-amp input terminal becomes Zn = (1 + MB) Z, (2-5) where, Z, = the op-amp input impedance without negative feedback ‘M = op-amp open-loop gain B = feedback factor = | for a voltage follower Note that Eq. 2-5 applies to a noninverting amplifier. As explained in section 3-4, it does not apply to an inverting amplifier Example 2-4 Calculate the minimum input impedance of a 741 operational amplifier employed as a voltage follower. Solution From the 741 data sheet in Appendix 1-1, Rua) = 0.3M2, Minin, = 50.000 Eq. 2-5, Zn = (1 + MB) Z, = [1 + (50.000 x 1} 0.3 M0. = 15 000MQ The impedance of signal sources connected at the input of an operational am- plifier circuit (see Fig. 2-8) should be very much smaller than the amplifier input *David A. Bell, Electronic Devices and Circuits, 3rd Ed. (Englewood Cliffs, NJ: Prentice-Hall, Inc., 1986), p. 356.30 Operational Amplifiers and Linear ICs +Vcc Re Bo>|sz 2 Zn = (1+ MB)Z Figure 2-8 Signal source resistances should be very much smaller than the op- amp circuit input impedance, Load resistances should be much larger than the cir- cuit output impedance. impedance (to avoid a loss of signal across R.). This is not difficult in the case of a circuit like the one investigated in Example 2-4. But there are other circuits in which the input impedance is reduced by the presence of externally connected components. Output Impedance ‘The typical output resistance specified for the 741 op-amp is 75 ©. Any stray capac- itance in parallel with this is certain to have a much larger reactance than 75 2. So 75 (1s also effectively the amplifier output impedance. Like the input impedance, the output impedance of the op-amp is affected by negative feedback namezs 1+ MB op-amp output impedance without negative feedback op-amp open-loop gain feedback factor Zou (2-6) Example 2-5 Calculate the typical output impedance of a 741 op-amp connected to function as a voltage follower. Solution 15.2 Patet 1 + (200 000 x 1)Ch. 2 — Operational Amplifier Parameters 31 Load impedances connected at the output of an operational amplifier should be much larger than the circuit output impedance (see Fig. 2-8). This is to avoid any significant loss of output as a voltage drop across Zou. There is another limit to the load that may be connected at the output of an op- rational amplifier; this is the output short circuit current. Internal current-limiting circuitry is included in most operational amplifier to protect the op-amp from dam- age that might result from a short-circuit at the output. The 741 output short cir- cuitry current is specified as 25 mA. The maximum output current should always be less than the short-circuit current for satisfactory operation. Where a larger output current is required, a power transistor can be connected at the output. This is dis- cussed in Chapter 6. 2-5 SLEW RATE AND FREQUENCY LIMITATIONS Slew Rate The slew rate (S) of an operational amplifier is the maximum rate at which the output voltage can change. When the slew rate is too slow for the input, distortion results. This is illustrated in Fig. 2-9, which shows a sine wave input to a voltage follower producing a triangular output waveform. The triangular wave results because the op- amp output simply cannot move fast enough to follow the sine wave input. +Vce Figure 2-9 The slew rate defines the maximum rate of change of operational am- plifier output voltage. When the input voltage changes too quickly, output waveform distortion results The typical slew rate of the 741 op-amp is specified as 0.5 V per microsecond (see Fig. 2-10). This means that 1 jzs is required for the output to change by 0.5 V. The equation relating time, voltage change, and the slew rate is, 2-7)32 Operational Amplifiers and Linear ICs Parameters. Figure 2-10 Portion of 741 op-amp data sheet specifying the slew rate, are characteristics (Vs = +15 V, Ta = 25°C unless otherwise specified) \[ ‘Min | Typ | Max | Unit 05 | Wus ‘A 10 V output change from a 741 typically requires a minimum time of, Slew rate effects and the relationship between slew rate and circuit cutoff fre- quency are treated in detail in Chapter 5. Frequency Limitations Figure 2-11 shows the graph of the open-loop gain (M) plotted versus frequency (f) for a 741 operational amplifier. It is seen that M is 100 dB when the signal frequency is 1 Hz. At 10 Hz the gain has fallen below 100 dB, and M continues to fall as the signal frequency increases. Note that frequency is plotted to a logarithmic base and that M falls linearly as f increases logarithmically. at Ff = 100 Hz, M ~80dB at f=1kHz, M ~60dB (4B) 100 80 4 60 sion rae Me, 20 o Scie hee 1.0 10 100 10k 10k 100k 10M 10M (Hz) saaes Mel inemer Figure 2-11 Plot of open-loop gain M versus signal frequency for a 741 of-amp. ‘The available open-loop gain falls as the signal frequency increasesCh. 2 — Operational Amplifier Parameters 33 M falls by 20 dB when f increases from 100 Hz to 1 kHz. The ten times increase in frequency is termed a decade. So, the rate of fall of the gain is said to be 20 dB per decade. Figure 2-11 shows that that M falls to zero at approximately 800 kHz. Where an internal gain equal to or greater than 80 dB is required for a particular applica- tion, it is available with a 741 only for signal frequencies up to approximately 100 Hz. An internal gain greater than 20 dB is possible for signal frequencies up to approximately 90 kHz. Other operational amplifiers maintain substantial internal gain to much higher frequencies than the 741. REVIEW QUESTIONS 2-1, Discuss the limitations on the input voltage range of an operational amplifier. Draw the necessary circuit diagrams to explain the limitations. State a typical op-amp input voltage range. 2-2, Explain the limitations on the output voltage range of an operational amplifier. Draw the necessary circuit diagrams to support your explanation. State a typical op-amp output voltage range. 2-3. Explain common mode voltage, common mode voltage gain, and common mode re- jection ratio for operational amplifiers. State a typical common mode rejection ratio. 2-4, Discuss supply voltage rejection in operational amplifiers and state a typical supply voltage rejection ratio, 2-5. Explain input offset voltage and state a typical input offset voltage level for an opera- tional amplifier. 2-6. Explain input offset current and state a typical input offset current level for an opera- tional amplifier. Discuss offset nulling 2-7. Explain how input offset voltages can be produced by errors in bias resistors. 2-8. State a typical input resistance for an operational amplifier. Write the equation for the input impedance of an op-amp circuit using negative feedback. Identify each quantity in the equation. 2-9, State a typical output resistance for an operational amplifier. Write the equation for the output impedance of an op-amp circuit using negative feedback. Identify each quantity in the equation. Explain output short circuit current. 2-10. Sketch an illustration to show the effect of operational amplifier slew rate. Explain. State a typical op-amp slew rate 2-11. Sketch a typical gain versus frequency graph for an operational amplifier. Explain. PROBLEMS 2-1. An operational amplifier has a specified input voltage range of +8 V and an output voltage range of #14 V when the supply voltage is +15 V. Calculate the maximum ‘output voltage that can be produced, (a) when the op-amp is used as a voltage fol- Tower and (b) when it is used as an amplifier with a voltage gain of 2 2-2, An op-amp voltage follower has a de input voltage of +6 V with an ac signal of34 Operational Amplifiers and Linear ICs. 23. 2-4, 25. 26. 27, 28. 2.9, 2-10. 21. 242. 213. 214. 2-15. 2-16. 217. £3 V superimposed. Determine the minimum input voltage range for a suitable oper- ational amplifier. ‘An LM108 operational amplifier (data sheet in Appendix 1-2) with a supply of 15 V is employed as an amplifier with a voltage gain of 25. Calculate the maximum ac input signal that can be applied if the output is to remain undistorted. The load re- sistance is 10 kQ. An operational amplifier circuit with a closed-loop gain of 100 has a common mode output of 5 wV when the common mode input is 5 mV. Determine the common mode rejection ratio. ‘An LM308 operational amplifier circuit with a closed-loop gain of 33 has a common mode input of 1.5 V. Calculate the maximum output voltage this might produce. A 1 pV supply ripple is present at the output of an operational amplifier circuit when the supply voltage has a 25 mV ripple. Determine the power supply rejection ratio. An LM1O8 operational amplifier (see Appendix 1-2) has a +15 V supply with a3 mV ac ripple. Calculate the maximum level of the output ripple voltage. A 741 operational amplifier circuit has a minimum output signal level of 100 mV. ‘Output ripple voltage produced by the ripple on the supply voltages is not to exceed 0.1% of the minimum output signal level. Calculate the maximum permissible supply voltage ripple. ‘The circuit in Fig. 2-6 uses an LM108 operational amplifier and the resistor values are Ry = Rz = 33 kQ. Determine the maximum input offset voltage due to, (a) the ‘op-amp specified input offset voltage and (b) the input offset current. The resistors in the circuit in Problem 2-9 have tolerances of +10%. Calculate the maximum input offset voltage due to the resistor tolerance (at 25°C), (a) when an LM108 is used and (b) when the op-amp is an LM308 Determine the minimum input impedance of an LM108 operational amplifier, (a) ‘when employed as a voltage follower, and (b) when used as a noninverting amplifier with a voltage gain of 30. Recalculate the input impedance for Problem 2-11 when an LM308 is substituted in place of LM108 Calculate the typical output resistance for a 715 op-amp, (a) when employed as a voltage follower, and (b) when used as a noninverting amplifier with a gain of 50. Calculate the typical input and output impedances of a noninverting amplifier with a voltage gain of 25, (a) using a 741 op-amp, and (b) using a 715. ‘A 74l operational amplifier has a +15 V supply. Calculate the typical time required for the op-amp output to move from its negative extreme to its positive extreme. Repeat Problem 2-15 for an LF 353 op-amp. Repeat Problem 2-15 for a 715 op-amp, (a) with A, inverting. 100, and (b) with A, = 1 non- LABORATORY EXERCISES 2-1 Offset Voltage 1. Connect a 741 op-amp to function as an inverting amplifier as illustrated in Fig. 1-11(a). Use R; = 10 Q, Rz = 100 Q, and a supply voltage of +9 V to +15 V.Ch. 2—Operational Amplifier Parameters 3.5 2. Ground the input terminal and connect a de voltmeter at the output. (The voltmeter is to measure millivolts, so a digital instrument is most suitable.) 3. Record the measured output voltage, and calculate the input offset voltage, (Verse: = V, x Ri/R:). Compare this to the specified input offset voltage for a 741 4, Calculate the input offset voltage due to the specified maximum input offset current, (lore: X 10 01). Compare this to the measured input offset voltage to check that it has not introduced a significant error. 2-2 Input Bias and Offset Currents 1. Connect a 741 voltage follower circuit as in Fig. 1-9a) with a nulling potentiometer as in Fig, 2-7(b). Use a supply of +9 V to +15 V. 2. Ground the voltage follower input and connect a digital dc voltmeter at the output. 3. Adjust the nulling potentiometer to give zero output voltage. If the output offset cannot be completely nulled, note the level of V>. 4, Switch off the supply, and insert a 1 MO resistor in series with the (grounded) noninvert- ing input terminal. 5. Switch the supply on again and note the change in output voltage (from the V, nulled level). Calculate the input bias current at the op-amp noninverting input. (1, = AV./1 MQ). 6. Switch off the supply, and reconnect the same 1 MQ resistor in series with the inverting input terminal (between input and output terminals). Directly ground the noninverting input once again. 7. Switch the supply on again, and note the new change in V; (from the nulled level). Calcu- late the input bias current at the op-amp inverting input. (J = AV,/1 MQ). 8. Calculate the input offset current, (lonsa = f+ — -). Compare the input bias and offset currents to the specified quanties for the 741 2-3 Input and Output Voltage Ranges 1. Connect a 741 voltage follower circuit as in Fig. 1-9(a) using a 100 kQ resistor in series with each input terminal. Use a supply of +15 V. 2. Connect a sine wave signal generator to the voltage follower input and a dual-trace oscil- loscope to monitor the op-amp input (right at the op-amp terminal) and output wave- forms. 3. Apply a 100 Hz sine wave input, increasing the signal amplitude until the peaks of the input waveform just begin to flatten 4. Measure the positive and negative input voltage peaks on the oscilloscope to determine the op-amp input voltage range. Compare the measured range to the specified range for the 741 S. Reconnect the 741 op-amp as an inverting amplifier (Fig. 1-11(a)], usifig Ri = 10 kQ, Rz = 100 kO, and a supply of +15 V. 6. Connect a sine wave signal generator to the amplifier input, and a dual-trace oscilloscope to monitor the signal and output waveforms, 7. Apply a 100 Hz sine wave input, increasing the signal amplitude until the peaks of the ‘output waveform just begin to flatten36 Operational Amplifiers and Linear ICs Measure the positive and negative output peaks on the oscilloscope to determine the out- Put voltage range. Compare the measured range to the specified range for the 741. 2-4 Open-Loop Voltage Gain 1, Connect the 741 op-amp circuit illustrated in Fig. 2-12 using the components and supply voltages shown. Also, connect voltmeters to measure V, and V5. Figure 2-12 Circuit for measuring op- amp open-loop gain. 2. Connect a de voltage source at the circuit input, adjusting the voltage to give V, = 10 V. 3. Record the level of Vi, and calculate the op-amp differential input voltage, (Vs = ¥s/ 1000). 4, Calculate the op-amp open-loop voltage gain, (M = V./V,).aT Chapter 3 Op-fAmps as DC Amplifiers Objectives You will be able to: Explain the requirement for uninterrupted current paths at op-amp input terminals. Calculate the maximum bias resistor values that should be used with a bipolar op-amp, and explain the design approach for potential divider bias at the input of a bipolar op-amp. Sketch the input stage of a BIFET op-amp, and discuss how the input parameters differ from those of a bipolar op-amp. Discuss the design approach for selection of resistor values for biasing a BIFET op-amp. Sketch the following direct-coupled op-amp circuits, and explain the operation of each circuit: voltage follower, noninverting amplifier, inverting amplifier, noninverting summing circuit, inverting summing circuit, difference amplifier. Easily design each of the above circuits, using bipolar and BIFET op-amps. Analyze each of the above circuits to determine input impedances, output impedances, voltage gains, and other performance criteria. Show how an op-amp circuit may be connected to use a single- polarity supply.38 Operational Amplifiers and Linear ICs INTRODUCTION IC operational amplifiers make excellent direct-coupled amplifiers. The design of such circuits involves little more than calculation of resistor values for a potential di- vider. All op-amp circuits must provide a current path for the input bias current to each terminal of the operational amplifier, and all potential divider circuits should use current levels which are much higher than the op-amp input current. The design approach for circuits using BIFET op-amps differs slightly from that normally em- ployed for bipolar op-amps. 3-1 BIASING OPERATIONAL AMPLIFIERS Bias Current Paths Like other electronic devices and integrated circuits, operational amplifiers must be correctly biased if they are to function properly. As already discussed, the inputs of most operational amplifiers are the base terminals of the transistors in a differential amplifier. Base currents must flow into these terminals for the transistors to be oper- ational. Consquently, the input terminals must be directly connected to suitable de bias voltage sources. For many applications, the most appropriate de bias voltage level for the op- amp input terminals is approximately halfway between the positive and negative sup- ply voltages. One of the two input terminals is usually connected in some way to the op-amp output to facilitate negative feedback. The other input might be biased di- rectly to ground via a signal source (see Fig. 3-1(a)). Base current [,; flows into the ‘op-amp via the signal source while Im: flows from the output terminal as illustrated. Figure 3-1(b) shows a situation in which resistor R; is included in series with the inverting terminal to match signal source resistance Rs in series with the nonin- verting terminal. The op-amp input currents produce voltage drops I», Rs and Im Ri +Vec oy Maa Ver (a) Directly connected voltee follower (A, incladed 1 march Ae Figure 31 Op-amp biasing must be so arranged that base currents Jay and dsp flow into the input terminals‘Ch. 3— Op-Amps as DC Amplifiers 39 across the sesistors. Rs and R, should be selected as equal resistors so that the resis- tor voltage drops are approximately equal. Any difference in these voltage drops will have the same effect as an input offset voltage (see Section 2-3). Maximum Bias Resistor Values If very small resistance values are selected for Rs and R, in the circuit in Fig. 3-1(b) the voltage drops across them will be small, On the other hand, if Rs and R, are very large, the voltage drops Ja: Rs and Im R: might be several volts. For good bias stability, the maximum voltage drop across these resistors should be much smaller than the typical forward-biased Ver level for the op-amp input transistors. Usually, the resistor voltage drop is made at least ten times smaller than Vac. Va: Let Totuas) Rican) ~ Tq ~ 0.07 V From the 741 data sheet in Appendix 1-1, Iams) = 500 nA. Therefore Rima) ~ 0.07 V/500 nA ~ 140 kQ. This is a maximum value for the bias resistors for a 741 operational amplifier. Where other op-amps are involved, Riou) should be calculated using the specified Injous for that particular op-amp, O.1 Vie Ta¢enax Roos) ~ (3-1) Potential Divider Bias Figure 3-2 shows a potential divider (R; and Rz) employed to derive a terminal bias voltage from the supply voltages. Potential divider bias is commonly used with op- amps and in transistor circuitry. The potential divider current (/2) should be much larger than the op-amp maximum input bias current. This is to ensure that To, and Figure 3-2 Potential divider bias for an ‘op-amp input. The potential divider cur- rent (J;) must be selected to be much ‘greater than the maximum level of the ‘op-amp input bias current (Js).40 Operational Amplifiers and Linear ICs any bias current variation, has a negligible effect upon the bias voltage level. Usually Ja is made 100 or more times Ip. Then =n _ Ve R= L and R= ie Typically, Zoimax) is 500 nA for a 741 op-amp, which gives J, = 100 x 500 nA = 50 pA This is a minimum level for /; when using a 741 and it would be quite satisfactory to use-a current of | mA, for example. However, all electronic circuit currents are nor. mally selected as low as possible in order to minimize the current demand from the power supply. In Fig. 3-2, Vii and Ver would usually be selected to give Vs close to ground level, or half way between +Vcc and —Ves. But Vp can be above or below ground level so long as it is within the specified input voltage range for the op-amp (see Section 2-1). From Appendix 1-1, the input voltage range is minimum of * 1?'V tor a 741 op amp with a +15 V supply. ‘The resistance “seen” when “looking out” of the noninverting input terminal in Fig. 3-2 is Ril|R2. To equalize the voltage drops at the input terminals, InRs = Ini(Ri||R2) or Ra ~ RilfRo A single polarity supply voltage can be employed with an operational am- lifer. For example, a 741 could use a +30 V supply as illustrated in Fig. 3-3, In this ease the input terminal bias voltage should be approximately half the supply voltage (+15 V for a 30 V supply). Alternatively, Vz might be within the input voltage range (12 V for a 741 using a 15 V supply) of the half-way point be- tien +Vec and ground. Since the circuit shown in Fig. 3-3 is a voltage follower, the de output voltage will be equal to the bias voltage level. Figure 3-3. When using a single polar- ity supply with an op-amp, the input ter- Minals should usually be biased at ap- Proximately half the supply voltage.Ch.3—Op-Ampsas DC Amplifiers 41 Biasing BIFET Op-Amps BIFET Op-amps are operational amplifiers with FET input stages (see Fig. 3-4). They draw very low levels of input bias current; 50 pA is not unusual. In this case, the usual design approach of selecting resistor currents one hundred times Ipina) would result in very high resistor values which are undesirable for several reasons. When the bias resistors at the gate terminal of a FET are extremely large, a charge can accumulate at the gate and this might take a relatively long time to discharge. Thus, the gate voltage would not be a stable quantity, and the op-amp bias condi- tions would be uncertain. Another reason for avoiding high resistance values with any op-amp circuit is that stray capacitance becomes more effective as resistance values increase, possibly resulting in unwanted circuit oscillations. This is further considered in Chapter 5. bie fp (AG ass Ey eee 2 Figure 3-4 Op-amp with FET input stages have very low input bias currents, Bias resistor values should be determined by first selecting the largest resistor as 1Ma. For statisfactory bias conditions when using BIFET op-amps, the resistance “seen” when “looking out” of either input terminal should normally not exceed 1 MOQ. A reasonable rule-of-thumb is to first select the largest resistor in a bias net- work as 1 MQ, then calculate the other resistors accordingly. There are some op- amps which can operate with even larger resistors, notably the LM108 (not a BIFET op-amp) which can use signal source resistors as high as 10 MQ. 3-2 DIRECT-COUPLED VOLTAGE FOLLOWERS Design As already discussed, an operational amplifier may be connected to function as a voltage follower with the use of any external components (Fig. 3-1(a)). However, as illustrated in Fig. 3-1(b), resistor Ri is frequently included in series with the in-42 Operational Amplifiers and Linear ICs verting input terminal to match the source resistance Rs in series with the noninvert ing input terminal. Example 3-1 A voltage follower using a 741 op-amp is connected to a signal source via a47 kQ re- sistor, as in Fig. 3-1(b). Select a suitable value for resistor Ri. Also, calculate the max- imum voltage drop across each resistor and the maximum input offset voltage produced by the input offset current Solution Ry = Rs = 47 KO From the 741 data sheet, Iovmas) = 500 0A, and Igstay = 20 0A Fovoans Rs = Tomar * Ry = 500 nA x 47k = 23.5 mV Vite = Tome * (Rs or Ri) = 20nA x 47k0 = 0.94 mV Performance From Equations 2-5 and 2-6, the input and output impedances of the voltage fol- lower are Zin = (1 + M)Z; (3-2) - 2 and ln = 5 (3-3) These quantities are calculated exactly as in Examples 2-4 and 2-5. As already explained, the voltage follower has a very high input impedance and a very low output impedance. Therefore, it is normally used to convert a high impedance source to a low output impedance. In this situation it is said to be em- ployed as a buffer between the high impedance source and the low impedance load. Thus, it is termed a buffer amplifer. Figure 3-5(a) illustrates the fact that a signal voltage is potentially divided across Rs and R,, when connected directly to a load. In Fig. 3-5(b), the voltage fol- lower presents its very high input impedance to the signal source. Because Zi, is nor- mally very much larger than Rs, there is virtually no signal loss at this point and ef- fectively all of V; appears at the op-amp input. From Eq. 1-4, the voltage follower output is : ke v(1 ai i)Ch. 3— Op-Amps as DC Amplifiers 43 +Vec Rs Rs: B B (2) Part ofa signal is lost when. (b) The high input impedance of the voltage follower a load is directly connected prevents any significant signal loss Figure 3-5 The very high input impedance, very low output impedance, and guin of 1 of the voltage follower make it an ideal buffer amplifier, which passes the signal from source to load ‘with no significant loss. The output voltage can be thought of as being potentially divided across R. and the voltage follower output impedance Zax. But Zax is normally much smaller than any load resistance that might be connected. So, once again, there is effectively no sig- nal loss and all of V; appears as V, at the circuit output. The voltage follower perfor- mance is demonstrated by Example 3-2. Example 3-2 The voltage follower in Example 3-1 has a | V signal and a 20 k@ load. Calculate the load voltage (a) when the load is directly connected to the source, (b) when the voltage follower is between the load and the source. Solution i yp = VR AV 200 Ret R. 47k + 20KO = 298 mV (b) Eq. 3-2, Zin = (1 + M)Z Using typical values of M and Z, for the 741, Ze = (1+ 200 000) 2 M0 =4x 10"O Ly x (4 x 10" 9) Rs+ Ze 47KN + 4x 10" = 1V (effectively) 1 Eq. 1-4, v,=v(1 =e) =1¥( — 20 = 1V (effectively)44 Operational Amplifiers and Linear ICs Using typical values of M and Z, for the 741, eg 2. 50 EA. 33 “T+ M~ 1+ 200000 37x 1050 Vv. x Re 1V x 20k Rit Zu 20K + G7 X 107M) = 1 V (effectively) Figure 3-6 illustrates the use of a voltage follower with a potential divider to produce a low impedance dc voltage source. In Fig. 3-6(a), load resistor R,. is shown directly connected in series with resistor R: to derive a voltage V; from the supply Vee. This simple arrangement has the disadvantage that the load voltage varies if the load resistance changes. In Fig. 3-6(b), the presence of the voltage follower main- tains the load voltage constant regardless of the load resistor value. Jom Re (0) V;, derived directly from Veo (b) A potential divider and voltage follower varies when A, varies produces a constant Vi, Figure 3-6 A voltage follower together with a potential divider can be used to provide a voltage source that remains constant even when the load resistance varies. Example 3-3 A 1 k@ load is to have 5 V developed across it from a 15 V source. Design suitable circuits as in Fig. 3-6(a) and (b) and calculate the load voltage variation in each case when the load resistance varies by ~10%. Use a 741 op-amp. Solution Ve Circuit (a) LaeCh. 3— Op-Amps as DC Amplifiers 45 Veo - VW. = IS V-5V ‘When R, changes by —10%, _ Yoo X (Ri — 10%) Ri + (R. — 10%) _ ISV x (Lk = 10%) ~ 2kQ+ (1 kQ = 10%) = 4.66 V Circuit (b), kh=VU=SV Vi = Voc — VW =10V For the 741 Tomas) = 500 nA let Lr = 100 Imm) = 100 X 500 nA 20 pA Kee bh 50pA = 100k _v_ 10V ‘Te 50 uA = 200k Ms R= When R, changes by ~10%, yw 2 = 5 V (effectively) Voltage Follower Compared to an Emitter Follower Both the voltage follower and the emitter follower are buffer araplifiers. However, the voltage follower has a much higher input impedance and much lower output impedance than the emitter follower. The most obvious disadvantage of the emitter follower is the de voltage loss due to the transistor base-emitter voltage drop (see Fig. 3-7(a)). But the voltage follower de loss of V;/M is insignificant [see Eq. 1-4 and Fig. 3-7(b)]. There can also be a greater loss of ac signal voltage in the emitter follower than in the voltage follower because of the lower input impedance and higher output impedance with the emitter follower46 Operational Amplifiers and Linear ICs +Vcc Vee (2) An emitter follower has a Vag (b) A voltage follower has virtually no voltage loss from input to output loss between input and output Figure 3-7 The voltage follower has a much higher input impedance and lower output impedance than the emitter follower. Also, the emitter follower has a base-emitter de voltage drop between input and output (Vee) that does not occur with the voltage follower. 3-3 DIRECT-COUPLED NONINVERTING AMPLIFIERS Design In Section 1-5 it is shown that the voltage gain of a noninverting amplifier, as repro- duced in Fig. 3-8, is +R: Eq. 1-5, in AER Rs As always with a bipolar op-amp, design commences by selecting the potential di- vider current (Jz) very much larger than the maximum input bias current (Isimux)) For a BIFET op-amp, the largest-value resistor is first selected as 1 MQ. In each case, potential divider resistor values are then determined using Vi, Vo, and Ip. ve Because Vis = Vi, Rs = Ee (3-4) and V, appears across (Rz + Rs), stVee Figure 3-8 Design of a noninverting amplifier (using a bipolar op-amp) starts by selecting the potential divider current (12) to be much greater than the maxi- ‘mum level of the input bias current (1). ‘Then, Ry = Vi/le, and (Ry + Rs) = Voll.‘Ch. 3— Op-Amps as DC Amplifiers 47 so (3-5) Finally, to equalize the fs R voltage drops at the op-amp inputs, Rj is calculated as, Ri ~ Ralls (3-6) IFRy, as determined from Eq. 3-6 is not very much larger than the source resistance, then R; should be determined from, Re + Ri ~RlRs Example 3-4 Using a 741 op-amp, design a noninverting amplifier to have a voltage gain of approxi- mately 66. The signal amplitude is to be 15 mV. Solution For the 741, Tegqas) = 500.0 let Tp = 100 X Irina) = 50 MA Y_ 1S mv Eq. 3-4, Sia Suh = 300 2 (Use a 270 © standard value resistor for Rs, see Appendix 2-1. This will give a level of I: slightly greater than the selected 50 HA) 15 mV J, becomes, OT = 55.6 wA Vo = Ae X Vi = 66 X 15 mV = 990 mV = Ye _ 990 mv Eq. 3-5, Bt eal = 17.8kO Ra = (Re + Rs) — Rs = 17.8kM — 2700 = 17.53kQ (Use 18 kO standard value resistor to give A, > 66. Alternatively, use 15 kQ in series with 2.7 kQ) Eq. 3-6, Ry ~ Ro||Rs = 270 O18 kA ~ 270 Q (use 270 © standard value) The op-amp supply voltage should normally be +9 V to #18 V, or within whatever range is specified on the data sheet.48 Operational Amplifiers and Linear ICs Figure 3-9 Noninverting amplifier with ‘A. ~ 66 designed in Example Example 3-5 Redesign the noninverting amplifier in Example 3-4 using a LF353 BIFET op-amp (see Appendix 1-3). +5 R 15k0 Figure 3-10 When using a BIFET op- ‘amp as a noninverting amplifier, design begins by first selecting the largest po- tential divider resistor as IMM. The other resistor is then calculated from AL = (Ro + Rs)/Rae Solution For the LF353, Tejaux) = 200 pA ‘As explained, using /; = 100 Iniau in this case would result in very large resistor val- ues. Therefore, let R,=1M0 Ri+Ry_R a ieee Eq. 1-5, Aca ee or, 15.38 kM (using a 15 kO standard value resistor will give A, slightly greater than 66) Eq. 3-6, R, ~ RRs = 1 MO\ 15 KO ~ 15 kQ (use 15 kQ standard value)Ch. 3—Op-Amps as DC Amplifiers 49 Performance From Eq, 2-5, the input impedance of an op-amp circuit is, Za = (1 + MB)Z For a noninverting amplifier, the feedback factor is Rs 1 Ri + Rs Therefore, for a noninverting amplifier B= Za= ( + te G7) Referring to Fig. 3-11, the input impedance given by Eq. 3-7 is the impedance “seen” when “looking into” the noninverting input terminal; it does not include Ry. Thus, the impedance seen from the signal source is Ze=Rit Zn (G-8) Since Zis is always much larger than R; in a noninverting amplifier, the inclusion of R; normally makes no significant difference. As will be explained, it can be impor- tant in other circuits. +Vec Figure 3-11 The noninverting amplifier has an input impedance of (R, + Zi), where Zi, = (1 + M/A,)Z. The output impedance is Zou = Za/(1 + M/A.) Equation 2-6 gives the output impedance of an op-amp circuit as50 Operational Amplifiers and Linear ICs Z, 2o8 = T+ MB) Since B = 1/A. this becomes, = eS Poa = TE MAD) G9) ‘Example 3-6 Calculate the input impedance of the noninverting amplifier designed in Example 3-5. Use the typical parameters for the LF 353 op-amp. Solution From the LF353 data sheet in Appendix 1-3, the typical parameters are, M = 100 000, Z, = 10" 0. Eq. 3-7, Zn = (: +i), = (0 Ls x 10°70 =15x 1050 Eq: 3-8, Zn = Ri + Za = 15kKN + 1.5 x 1052 = 15 10! 0 (effectively) 3-4 DIRECT-COUPLED INVERTING AMPLIFIERS Design The inverting amplifier circuit in Fig. 3-12 includes resistor R; at the noninverting terminal to equalize the de voltage drops due to the input bias currents. As already discussed for other circuits, approximately equal resistances should be “seen” when Figure 3-12 Design of an inverting amplifier (using a bipolar op-amp) starts by selecting the potential divider current (f) to be much greater than the maxi- mum level of the input bias current (In) Then, Ri = Vi/, and Ri = Vo/l.REFERENLe sOOK Ch. 3— Op-Amps as DC Amplifiers 51 “looking out” from each input terminal of the op-amp. Therefore, Ry ~ R,||Ro (3-10) And if R; is not very much larger than the source resistance, then Rs = (Ri + Rs) |Ro As with other bipolar op-amp circuits, the resistor current (/,) is first selected very much larger than the maximum input bias current (Jain). When using a BIFET op-amp, the largest-value resistor is first selected as 1 MQ. Then ali " Raz. @-11) and Ve R= Fe (3-12) Example 3-7 Design an inverting amplifier using 2 741 op-amp. The voltage gain is to be 50 and the ‘output voltage amplitude is to be 2.5 V Solution For the 741, Inova) = 500 A. let 1, = 100 X Jovan) KLLEGE gp CoN = 50 HA : é aN “oh Eq. 3-11, R= R aKa 415 Figure 3-13 Inverting amplifier de- signed in Example 3-7.52 Operational Amplifiers and Linear ICs Eq. 3-12, = 50KM (Use a 47 KO standard value resistor for Rz to give a gain slightly lower than 50; or a 56 k0 resistor to give a slightly higher gain. Alternatively, use 474Q and 3.3 KO in series.) Rs = Ril|Re = 1kO|50kO ~1k0 Example 3-8 Redesign the inverting amplifier in Example 3-7 using an LF353 BIFET op-amp (see ‘Appendix 1-3) Solution Select the largest resistor as 1 MQ. let R,=1MQ R _1MO From Eq. 1-6, BRS =20kQ — (use an 18 kO standard-value resistor for R, to give a gain slightly higher than 50; or a 22 kO resistor to give a slightly lower gain. Alternatively, use 18 kO and 2.2 kQ in series.) Ry ® RillRy = 20 kA] MQ = 20 kO (use 18 kO standard value) Ry ima 4isv Ry o—ww—+_> mia i) Figure 3-14 When using a BIFET op- amp as an inverting amplifier, design 18 kQ! begins by first selecting the largest potential divider resistor as 1 MQ. The other resistor is then calculated from Aa = Re/Ry SisvCh. 3—Op-Amps as DC Amplifiers 53 Performance In the case of the inverting amplifier, the input impedance cannot be determined by the use of Eq. 2-5. Look at the inverting amplifier circuit in Fig. 3-15 and recall that the op-amp inverting input terminal always remains close to ground potential. This means the junction of R: and Re is always close to ground level. Consequently, “looking into” the inverting amplifier from the signal source, the resistor Ri is “seen” with its other end at ground level. So, Zin = Ri (3-13) Figure 3-15 The inverting amplifier has an input impedance of R, and an output impedance of Zou ~ Zo/(1 + M/A.) The output impedance of the inverting amplifier is determined exactly as for any other op-amp circuit. Behe lee en = MB) For an inverting amplifier, ote TR iB Ri + Rp Theref iar (G-14) aoe [1 + MRi/(R + RD) : When R2 > Ri, out os ~TF MAD as in the case of the noninverting amplifier54 Operational Amplifiers and Linear ICs 3-5 SUMMING AMPLIFIERS Inverting Summing Circuit Figure 3-16 shows a circuit that amplifies the sum of two or more inputs. This is es- sentially an inverting amplifier with two input terminals and two input resistors. As with other inverting amplifiers, the inverting input terminal of the op-amp behaves as a virtual ground. So, All of (hr + f) flows through resistor Rs, giving Vo = —(h + b)Rs Een Ee Gres With Ri = Ra, v=o ty : (3-15) or Vo = Ao(vi + v2) When the summing circuit in Fig. 3-16 has Rs = Ri = Ra, A= -1 and the output voltage is the direct sum of the input voltages (inverted). When R; > R; and R2, [Ao] > 1 The circuit output voltage is now the sum of the input voltages multiplied by Rs/R:. Title, Ry isha Th, Ry 18a Figure 3-16 An op-amp summing amplifier amplifies the sum of two or > ‘more inputs. With Ri = Rs, vo = Ravi + va)/RtCh. 3—Op-Amps as DC Amplifiers 5 5. If Ry is made less than R; and Rz, the output is the sum of the inputs divided by the factor R,/Rs. Suppose there are three inputs to a summing circuit as in Fig. 3-17. And sup- pose that 1 = Rp = Ry R and Rae In this case, the output voltage is 1 Yo= = 3 (vi vativa) The output is the average of the inputs. Thus, the summing amplifier can be de- signed to be an averaging circuit. E Re Rs (igeragane al, peel rest Voc s Rs vi (ae iz ve aner ) “ ve Vee ie eae as A Figure 3-17 A summing amplifier can awe yat Rs. =" be used to determine the average of two or more inputs. For a three-input circuit with Ri = Ro = Rs and Ry Vo = —(vi + va + ¥3)/3. Ry = 1/3, The summing amplifier is generally designed the same way an ordinary invert- ing amplifier. Example 3-9 Design a summing amplifier as in Fig. 3-16 to give the direct sum of two inputs which each range from 0.1 V to 1 V. Use a 741 op-amp. Solution let Dein) = 100 X Tajnua) = 100 * 500 nA = 50 BA Veni _ O.1'V Minin) 50 A = 2kO (use 1.8 kO standard value) R= Ry = 1.8k056 Operational Amplifiers and Linear ICs and for A, = Ry = Ry = 1.8kO Re ~ Ril Ral|Rs = 1.8 KOI 1.8 kA 1.8 KO = 600 2 (use 560 © standard value) The summing amplifier can function as a multichannel audio mixer for several audio channels. No interference (feedback from one channel to the input of another channel) occurs because each signal source is applied via one resistor with its oppo- site end at ground potential. Making the input resistors adjustable allows the output volume from each channel to be separately controlled. Noninverting Summing Circuit ‘A noninverting amplifier can be employed as a summing circuit as illustrated in Fig. 3-18. This gives the direct sum of the inputs instead of the inverted sum. The equa- tion for the output voltage can be derived by first applying the superposition theorem to determine the voltage v; at the op-amp noninverting terminal. With v2 = 0, and R; = R2 = R, ea MS RIER 32 and with v, = 0, ee a= > giving v2 _ Vit v2 [a 3s 2 For the noninverting amplifer, Vee ae oe ee Figure 3-18 Two-input noninverting summing circuit. With all resistors equal, v, = (v: + v3)/2, and ve. 2w = (vs + va),Ch. 3 — Op-Amps as DC Amplifiers 57, * Rs +Ry Re and Vo = AcWi or v= BER wee 6-16) with Rs = Ra, Vo = vi + vo For the three-input noninverting summing circuit in Fig. 3-19, the voltage at the op-amp noninverting input when all three input resistors are equal is vit v2 + vs And, with A, = 3, Figure 3.19 Three-input noninverting summing circuit. In this case, the am- plifier must have a gain of 3 in order to give vo = (vi + v2 + vs). Design of a noninverting summing circuit is approached by first designing the noninverting amplifier to have the required voltage gain. Then the input resistors are usually selected as large as possible to suit the type of op-amp used. 3-6 DIFFERENCE AMPLIFIER Circuit Operation A difference amplifier, or differential amplifier, amplifies the difference between two input signals. An IC operational amplifier is a difference amplifier; it has two (inverting and noninverting) inputs. But the open-loop voltage gain of operational58 Operational Amplifiers and Linear ICs amplifiers is too great for one to be used without feedback. So, like other op-amp circuits, a practical difference amplifier must have negative feedback. ‘The difference amplifier-circuit illustrated in Fig. 3-20(a) is a combination of inverting and noninverting amplifiers. If input terminal 2 is grounded, the circuit op- erates as an inverting amplifier and input v; is amplified by —R2/Ri. With terminal 1 grounded, R2 and R function as the feedback components of a noninverting am- R Figure 3-20 Op-amp difference am- plier. With R,/Rs = R:/Ry, the output voltage is v, = Ra(vs ~ vi)/Ri. Com- ‘mon-mode output nulling is provided by making part of Ry adjustable. Adjustable {) Mogifcatons for common mode ruling voltage source Ve provides de output tnd de output voltage level shitting voltage level shifting, plifier. Input v2 is potentially divided across resistors Rs and Rs to give Ves, and then Vee is amplified by (Ro + Ri)/Ri. -k With v2 = 0, Ya tgCh. 3 —Op-Amps as DC Amplifiers 59 Ry With v; = 0, Wa Xv Ri + Ry and ” With R; = Ri and Ry = R2, R; Veo = xv; With both signals present, Vo = Vor + Vor een, RipseeRiny z Rp giving, Vo = Re - vi) (3-17) , When R; and R, are equal value resistors, the output is the direct difference of the two inputs. By selecting R2 greater than Ri, the output can be made an amplified ver- sion of the input difference. Input Resistances One problem with selecting the difference amplifier resistors as Rs = Ry and Rs = R2 is that the two input resistances are unequal. The input resistance for voltage v; in Fig. 3-20(a) is Ri, as in the case of an inverting amplifier. At the op- amp noninverting input terminal, the input resistance is very high, as it is for a non- inverting amplifier, So, for voltage V2, the input resistance is R; + Ry, Returning to the derivation of Eq. 3-17, it can be shown that the same result would be obtained if the ratio Rs/Rs is the same as R2/R; instead of making Rs = Ri and Rs = Ro. Therefore, when the resistance of Ri has been determined, Rs + Re can be made equal to Ri, as long as the resistor ratio is correct. This will give equal input resistances at the two input terminals of the circuit. The input resistance difference above (if Rs = Ri and Rs = R2) will not present any problem if the signal source resistances are much smaller than the input resistances. Also, it is usually desirable to have R; = Ri and Ry = Ro, in order to equalize the resistance seen “looking out” of each input (Ri||R2 = Rs||Rs) to mint mize input offset voltages (see Section 2-3). Two more items to consider are the dif- ferential input resistance (Raa) and the common mode input resistance (Ricm). The differential input resistance is the resistance offered to a signal source which is con- nected directly across the input terminals. It is the sum of the two input resistances.60 Operational Amplifiers and Linear ICs Ruain = Ri + Rs + Re (3-18) The common mode input resistance is the resistance offered to a signal source which is connected between ground and both input terminals, that is, the parallel combina- tion of the two input resistances. Riem) = Ril] (Ra + Ra) (3-19) Common Mode Voltages As already discussed, Eq. 3-17 shows that the output voltage is the amplified differ- ence of the two input voltages. A common mode input voltage v, would give inputs of (vi + vn) and (v2 + v,) which would result in vy, being cancelled out when the difference of the two is amplified. Now recall that to derive Eq. 3-17 the resistor ra- tios must be equal (Ri/Rs = R./R,). If these ratios are not exactly equal, one input voltage will be amplified by a greater amount than the other. Also, the common mode voltage at one input will be amplified by a greater amount than that at the other input. Consequently, common mode voltages will not be completely cancelled. Because it is impossible to perfectly match the resistor ratios, there is likely to be some common mode output voltage. One way of minimizing the common mode out- put from of a difference amplifier is illustrated in Fig. 3-20(b). Resistor Rs is made up of a fixed-value resistor and a much smaller adjustable resistor. This allows the ratio R¢/Rs to be adjusted to closely match R2/R; in order to null the common mode ‘output voltage to zero, Output Level Shifting In Fig. 3-20(b) Rs is connected to a bias voltage Vo instead of being grounded in the usual way. To understand the effect of Vp, assume that both input voltages are zero and that Vs is 1 V. The voltage at the op-amp noninverting input terminal will be _veXRy “SR +R Consequently, the output voltage will move to the level that gives v- = Ve and the output will be yy = YelRi + Ra) Ri Substituting for v. and using the resistor relationships (Ri/Rs = R:/R,), the output voltage is Vo = Va Therefore if Vp is adjustable, the de output voltage level can be shifted as desired.Ch. 3— Op-Amps as DC Amplifiers 61 Circuit Design The design of an op-amp difference amplifier is quite simple. Resistors Ri and R; are determined exactly as for an inverting amplifier. Then the other resistors are se- lected to give Re/Rs equal to Re/R; and usually, Rs = R; and Re = Rs, depending upon input resistance requirements. Example 3-10 The difference of two input signals is to be amplified by a factor of 37. Each input has an amplitude of approximately 50 mV. Using an LF353 op-amp, design a suitable cir- cuit and calculate the differential and common mode input resistances. Solution With the LF353, let R= 1M A R ta Erg ca = 27 kO (standard value) Ry = R= 27kO and R=: =1M0 Ria = Ri + (Rs + Rs) = 27kO + 27k + MO =1MO 6 Reem) = Ril|(Rs + Re) = 27 kO||(27 kA + 1 MQ) = 26.3 k0 ‘Example 3-11 Modify the circuit designed in Example 3-10 to give approximately equal input resis- tance at the two input terminals and to provide output voltage nulling. Solution 27k and R,=1M0 Rs + Ry = Ry = 27KO Ry and =o giving Ry = 37Rs Ry + 37Rs = 270 27k Rs = 7100 (use 680 © standard value) rst62 Operational Amplifiers and Linear ICs Ry = 37R = 25.2k0 Allowing a + 10% adjustment of Rs, the total resistance of R, [as in Fig. 3-20(b)] is Re = 25.2 kD + 10% ~ 27.7kO 37 x 680.0 and the variable portion is Re = 20% of Ry = 20% of 27.7 kO ~ 5kO (standard variable resistance value) Fixed portion of Ry is Ry = 2.7K ~ 5K = 22.7kQ (use 22 kO standard value) REVIEW QUESTIONS 31. 32. 33. 34. 39, 3-10. 3-11. 312. 313. Explain the need for uninterrupted current paths at each input terminal of an IC oper- ational amplifier. Discuss the effect of using resistors which are too large at the input terminals of a bipolar operational amplifier. Write an equation for calculating a suitable maximum resistance value. Explain why the resistances at the two input terminals of an operational amplifier should be approximately equal in value Sketch an op-amp voltage follower circuit with a potential divider providing bias to one input terminal of the operational amplifier. Show the various currents and explain the preferred relationship between the potential divider current and the op-amp input current, ‘Write equations for each resistor value in the circuit drawn for Question 3-4. Sketch a circuit to show how an op-amp could be connected to use a single-polarity supply. Explain. Also, discuss the limits of the op-amp bias voltage. Discuss the approach used to determine suitable resistor values for a BIFET op-amp circuit. Explain. Sketch the circuit of a direct-coupled voltage follower and explain how the value of the feedback resistor should be determined. Write equations for input impedance, output impedance, and output voltage for a voltage follower. Sketch a circuit to show how a voltage follower may be used to provide a constant voltage across a load resistor. Explain Briefly explain the advantages of a voltage follower compared to an emitter follower. Sketch the complete circuit of an op-amp noninverting amplifier. Write equations for determining suitable values for each resistor (a) using a bipolar op-amp and (b) using a BIFET op-amp. Write equations for input impedance, output impedance, and voltage gain for a nonin- verting amplifier.Ch. 3 — Op-Amps as DC Amplifiers 63 3414. Sketch the complete circuit of an op-amp inverting amplifier. Write equations for de- termining suitable values for each resistor (a) using a bipolar op-amp and (b) using a BIFET op-amp. 3-15. Write equations for input impedance, output impedance, and voltage gain for an in- verting amplifier. 3-16. Sketch the circuit of a two-input inverting summing amplifier. Explain the operation of the circuit and derive an equation for the output voltage. 3-17. Write equations for determining suitable values for each resistor in the summing am- plifier in Question 3-16, (a) using a bipolar op-amp and (b) using a BIFET op-amp. 3-18. Sketch the circuit of a three-input inverting summing amplifier and explain how it may be used as an averaging circuit, 3:19. Sketch a two-input noninverting summing circuit. Explain the operation of the circuit and derive an equation for the output voltage. 3-20. Sketch a three-input noninverting summing circuit and derive an equation for the out- put voltage. 3-21. Sketch an op-amp difference amplifier circuit. Explain the operation of the circuit and derive an equation for the output voltage. 3-22. Discuss the various aspects of differential amplifier input resistance. 3-23. Discuss common mode rejection ratio for differential amplifiers and show how it can be improved. 3-24, Show how output de voltage level shifting can be provided for differential amplifiers. Briefly explain. PROBLEMS 341. A voltage follower using a 741 op-amp is to be connected to a signal source with a resistance of 22 k(. Sketch the circuit and select suitable components. Also, deter- mine the maximum input offset voltage that could be produced by the input offset cur- rent. 3:2, Substitute a LMIO8 op-amp (see Appendix 1-2) in place of the 741 in Problem 3-1 and recalculate the input offset voltage 3-3. If the voltage follower in Problem 3-2 has a 300 mV input signal and a 10 kQ load, calculate the load voltage (a) when the load is directly connected to the source and (b) when the voltage follower is used. 3-4, A signal applied to a voltage follower is to be developed across a load with a maxi ‘mum signal loss of 0.005%. Determine the minimum open-loop gain of a suitable op- amp. 35. A voltage follower is to be used to provide a constant 3 V to a load with an approxi- mate resistance of 12k. The available supply is +12 V. Design a suitable circuit us- ing a 741 op-amp. 3-6. Redesign the circuit for Problem 3-5 substituting a LF353 op-amp (see Appendix 1-3) in place of the 741, 3-7. Redesign the circuit for Problem 3-5 substituting a LM108 op-amp (see Appendix 1-2) in place of the 741. 3-8. Redesign the circuit for Problem 3-5 using the 741 and using +24 V instead of the 12 V supply64 Operational Amplifiers and Linear ICs 3-9. A noninverting amplifier is to amplify a 100 mV signal to a level of 3 V. Using a 741 3-10. 3-11. 312. 3-13. 3-14. 315. 3-16. 3-17. 3-18. 319. 3-20. 3-21. 3-22. 3-23. 3 ‘op-amp, design a suitable circuit. Redesign the circuit for Problem 3-9 substituting a LF353 op-amp in place of the TAL : Calculate the typical input and output impedances for the noninverting amplifier de- signed in Problem 3-9. A noninverting amplifier with a +15 V supply is to produce maximum possible output voltage and is to have a voltage gain of 25. Using an LF353 op-amp, design a suitable circuit. An inverting amplifier is to amplify a 50 mV signal to a level of 4 V. Using a LF353 ‘op-amp, design a suitable circuit. Redesign the circuit for Problem 3-13 substituting a 741 op-amp in place of the LP353. Determine the input impedance for each of the inverting amplifiers designed in Prob- Jem 3-13 and 3-14, An inverting amplifier with a +12 V supply is to produce maximum possible output voltage and is to have a voltage gain of 33. Using an LF353 op-amp, design a suitable circuit. ‘Two signals which each range from 0.1 V to 1 V are to be summed. Using a 741 op- amp, design a suitable inverting summing circuit. ‘Two signals as in Problem’3-17 are to be summed and amplified by a factor of 5. Us- ing a LF353 op-amp, design a suitable inverting summing circuit. Three signals which each range from 0.1 V to I V are to be averaged. Using an M108 op-amp, design a suitable inverting averaging circuit Design a noninverting summing circuit to meet the requirement of Problem 3-17. Design @ noninverting summing circuit to meet the requirment of Problem 3-18. The difference of two signals which each range from 0.1 V to 1 V is to be deter- mined. Using a 741 op-amp, design a suitable difference amplifier. Determine the in- put resistance at each input, the differential input resistance, and the common mode input resistance, Redesign the circuit for Problem 3-22 to amplify the input voltage difference by a factor of 15 and to provide a common mode nulling facility. Redesign the circuit for Problem 3-22 to use an LF353 op-amp, to multiply the dif- ference by a factor of 10, and to approximately equalize the input resistances at the two input terminals. COMPUTER PROBLEMS 3.28. Write a computer program to design a direct-coupled noninverting amplifier using a bipolar op-amp. Given: Trine. Avs and ¥.. 3-26. Write a computer program to design a direct-coupled noninverting amplifier using a BIFET op-amp. Given: A, and v,, 3-27. Write a computer program to analyze a noninverting amplifier for A., Zo, and Zo Given: resistor values and op-amp parameters.Ch, 3 —Op-Amps as DC Amplifiers 65 3-28. Write a computer program to design a direct-coupled inverting amplifier using a bipo- lar op-amp. Given: [pina Av, and ¥,. 3-29. Write a computer program to analyze an inverting amplifier, for A,, Zin, and Zon. Given: resistor values and op-amp parameters. LABORATORY EXERCISES 3-1 Direct-Coupled Noninverting Amplifier 1. Construct the 741 noninverting amplifier circuit shown in Fig. 3-9 as designed in Exam- ple 3-4. 2. Apply a + 15 mV, 1 kHz sinusoidal signal. Monitor the input and output waveforms on an oscilloscope and measure the output amplitude. 3. Calculate the voltage gain and compare it to the designed gain. 4, Connect a 1 MOQ resistor in series with the amplifier input. Check that the output voltage is unaffected to demonstrate that Zn > 1 MO. 5. Connect a 100 @ resistor in parallel with the output. Check that the outpat voltage is un- affected to demonstrate that Zax. < 100 0. 6. Construct the LF353 noninverting amplifier circuit in Fig. 3-10 as designed in Example 3-5. 7. Repeat Procedures 2 through 5. 3-2 Direct-Coupled Inverting Amplifier 1. Construct the 741 inverting amplifier circuit shown in Fig, 3-13 as designed in Example 3-7 2. Apply a 1 kHz sinusoidal signal and adjust the signal amplitude to give an output peak amplitude of 2.5 V as displayed on an oscilloscope. 3. Measure the input peak amplitude, calculate the voltage gain, and compare it to the de- signed gain. Connect a 1 k@ resistor in series with the amplifier input. Note the output voltage change and calculate Zin. 5, Adjust the signal to give a peak output of 1 V. Then, connect a 100 Q resistor in parallel with the output. Check that the output voltage is unaffected to demonstrate that Zou € 100 2. 6. Construct the LF353 inverting amplifier circuit in Fig. 3-14 as designed in Example 3-8. 7. Repeat Procedures 2 through 5. 3-3 Direct-Coupled Summing Circuits 1. Construct the inverting summing circuit in Fig. 3-16. Use a 741 op-amp, a supply of £15 V, and 1.8 kQ resistors throughout (as calculated in Example 3-9). 2. Connect adjustable de voltage sources to each input and connect de voltmeters to monitor the levels of Vi, Vs, and Ve.66 Operational Amplifiers and Linear ICs 3. Set each input to several voltage levels beween 0.1 V and 1 V and measure the output level for each case to check the accuracy of Eq. 3-15 4. Change Ry to 18 KO and repeat Procedure 3 using maximum input levels of 0.5 V. 3-4 Direct-Coupled Difference Amplifier 1, Construct the difference amplifier circuit shown in Fig. 3-20(a). Use a LF353 op-amp with a supply of +15 V, and resistor values Ri = Rs = 27k, Ro = Re = | MOL as cal- culated in Example 3-10. 2. Connect adjustable de voltage sourves at each input terminal and voltmeters to monitor Vi, Vas and Ve. 3. Set V; and V2 to several different levels from zero to +50 mV and —50 mV. Note the Jevel of V, at each setting of the inputs, and check the accuracy of Eq. 3-17. 4. Connect another adjustable de voltage source between Ry and ground as illustrated in Fig. 3-20(b). Investigate its effect as an output level shifter 5. Ground Rs once again, connect the two inputs terminals together, and apply a single ad- justable de voltage source at the inputs. 6. Adjust the input to 10 V, measure the output voltage level, and calculate the common mode gain for the circuit.67 Chapter 4 Op-Amps as AC Amplifiers Objectives You will be able to: * Sketch the following capacitor-coupled op-amp circuits, explain the operation of each circuit, and specify the input impedance of each: voltage follower, high-input-impedance voltage follower, noninverting amplifier, high-input-impedance noninverting amplifier, inverting amplifier, difference amplifier. + Easily design each of the above circuits, using bipolar and BIFET op-amps. + Analyze each of the above circuits to determine input impedances, output impedances, voltage gains, lower cutoff frequencies, and other performance criteria, + Show how the upper cutoff point can be set to any desired frequency for an op-amp circuit, + Show how various capacitor-coupled amplifier circuits can use a single-polarity supply; design such circuits.68 Operational Amplifiers and Linear ICs INTRODUCTION Operational amplifier circuits can readily be capacitor-coupled at the input and out- put so that they operate only as ac amplifiers. Capacitors must not be allowed to in- terrupt the bias current paths to the op-amp input terminals. This sometimes re- quires additional bias resistors which can affect the circuit input impedance. Since capacitors have their highest impedances at the lowest signal frequency, all coupling capacitor values must be calculated at the desired lower cutoff frequency ( fi). The impedance of coupling capacitors at fi is usually determined as one-tenth of the re- sistance in series with them. The largest capacitor in the circuit is normally selected to determine f, and in this case the capacitive impedance is made equal to the series- connected resistance. 4-1 CAPACITOR-COUPLED VOLTAGE FOLLOWER When a voltage follower is to have its input and output capacitor-coupled, the nonin- verting input terminal must be grounded via a resistor (Ri in Fig. 4-1(a)). As ex- plained in Section 3-1, the resistor is required to pass bias current to the amplifier noninverting input terminal. A resistor equal to Ry might be included in series with the inverting terminal to equalize the /y Ry voltage drop and thus minimize the out- put offset voltage. However, in the case of a circuit with its output capacitor- coupled, small de offset output voltages are unimportant because they are blocked by the capacitor. Design of a capacitor-coupled voltage follower as in Fig. 4 involves calcula- +Vee é Figure 4-1 Capacitor-coupled voltage follower. The op-amp noninverting ' terminal must be grounded via a resistor ‘The capacitor values are determined by (b) The signal voltage is vided (c) The output voltage is vided making Xe = Za/10 at fi, and Xes = across Xsan 2 eros Noy and Ae RathCh. 4 —Op-Amps as AC Amplifiers 69 tion of Ri, C; and Cs. As always, the largest possible resistor values are normally se- lected to ensure minimum circuit power dissipation and minimum current demand from the power supply. The smallest possible capacitor values are normally used for their small physical size and low cost. From Eq. 3-1, a maximum value for Ri for a bipolar op-amp is determined as (0.1 Vge)/In- ‘The circuit input impedance is R\||Z/, where Z/ is the input impedance at the op-amp noninverting input terminal, [Z/ = Z(1 + MB)). But, with the 100% nega- tive feedback employed in a voltage follower circuit, Z/ is always much larger than Ry. Consequently, for the circuit in Fig. 4-1, Zn = Ri @-1) Load resistor R: normally has a lower resistance than R,. Therefore, because each capacitor value is inversely proportional to the resistance in series with it, C2 is usually larger than C,. At the circuit low 3 dB frequency (fi), the impedance of C; should be much smaller than Zia, $o that there is no significant division of the signal across Xci and Zin, (see Fig. 4-1(b)). In this case, C; will have no effect on the cir- cuit low 3 dB frequency. Thus, C; is calculated from Xe1 = (Zin/10) at fi (4-2) 1 2afi(Ri/10) As illustrated in Fig. 4-1(c), the circuit output voltage v. is divided across Xcz and Ry, to give the load voltage v.. The equation for vz is giving G Vo X Ru 4 VR + XB) When Xe2 = Ri, 7 x Rr * Ver) V2 = 0.707 vo = vo — 3dB Or, the circuit low 3 dB frequency (fi) occurs when Xco = Rv. Therefore, C2 is cal- culated from Xo. = Ruatfi (4-3) . 1 2afi Ri ‘The above design approach gives the smallest possible capacitor values. When se- lecting standard value components, the next larger standard size should be chosen to give capacitive impedances slightly smaller than calculated. In the unusual situation where R, is smaller than R,, C, would be a larger ca- pacitor than C2. To give the smallest capacitor values in this case, it is best to let Cy determine the low 3 dB frequency, by making Xe: = R; at fi. Then, Xer = Ri/10 at fi. which gives, G70 Operational Ampiifiers and Linear ICs Example 4-1 Design a capacitor-coupled voltage follower using a 741 operational amplifier. The lower cutoff frequency for the circuit is to be 50 Hz and the load resistance is Ry ~ 3.9 KO. Solution 0.1 Vac 0.1 X 0.7 1, Riga) = AE = Bae laa 500 nA = 140kQ (use 120 KO (next lower) standard value) Xei = Ri/10 at fi 1 ae "Uf 10) ~ Jar X50 He x (120 KOJI) = 0.27 wF (standard value~see Appendix 2-2) Eq. 4-3, Xe = Ry at fy or Ca i i 2nfiR 2 X 50 Hz X 3.9 kN =0.82F (standard value) The circuit supply voltages should normally be +9 V to +18 V or within whatever ange is specified on the op-amp data sheet. Vee & 027 ae i o z tS 0.82 uF 741 = R, Ep 120ks. a Figure 4-2 Capacitor-coupled voltage Bs ee follower (using a bipolar op-amp) de- signed in Example 4-1. Example 4-2 Redesign the capacitor-coupled voltage follower circuit in Example 4-1 to use a LE353 BIFET op-amp. Solution Ri = 1MOQ (largest resistance to be connected at the input of a BIFET op-amp—see Section 3-1) © = 0.82 uF (as an Example 4-1) 1 1 From Eq. 4-2, 2nfi(Ri/10) 2m X 50 Hz x (1 MQ/10) = 0.032 uF [use 0.033 F standard value, to give Xey < (Ri/10) at fi]Ch, 4 — Op-Amps as AC Amplifiers EL A $39ko. Figure 4-3 Capacitor-coupled voltage follower (using a BIFET op-amp) de signed in Example 4-2, +Vee ¢, ¢ 0.033 nF a 4 > 082 uF tras ae peas 4-2 HIGH Z,, CAPACITOR-COUPLED VOLTAGE FOLLOWER The input impedance of the capacitor-coupled voltage follower discussed in Section 4-1 is set by the value of resistor Ri in Fig. 4-1(a). This gives a much smaller input impedance than the direct-coupled voltage follower. Fig. 4-4 shows a method by which the input impedance of the capacitor-coupled voltage follower can be substan- tially increased. Figure 4-4 High input impedance capacitor-coupled voltage follower. Feedback ‘via C; to the junction of Ry and Re gives an input impedance of Zx = (1 + MIR} Capacitor C2 in Fig. 4-4 couples the circuit output voltage to the junction of re~ sistors R; and Ro. C2 behaves as an ac short circuit so that v, is developed across Ra. The voltage developed across R) is Yi = Vs — Vo ve ~ Mv giving vil + M) =v Vs or “= 04m)Te Operational Amplifiers and Linear ICs vi and hs “Aaa 7 vs input resistance a= 5 or Za = (1+ MR, (4-4) Equation 4-4 shows that this circuit does indeed have a very high input impedance. For example, with an open loop gain of 200 000 and a 47 kQ resistor for Ri, the cir- cuit input impedance would be Zin = 200 000 x 47 kO = 9.4 x 10°0 This extremely high input impedance is unrealistic when it is remembered that some stray capacitance is always present. If the stray capacitance (C,) between the circuit input and ground is 3 pF (which is quite possible), the impedance of C, at 1 kHz is wat, tb canteen 2m X 1 kHz X 3 pF = 53 MQ. Xcs = Since this is much smaller than Ziy as just calculated, the effective input impedance of a high Zi, voltage follower is normaily much lower than that determined from Eq. 4-4. To design a high input impedance capacitor-coupled voltage follower, resistors Ry and R; are first calculated as a single resistor Ryn using Eq. 3-1, Then, Ryman is split into two equal resistors R, and Ry. To ensure that the feedback voltage remains close to 100% of the output voltage at the lowest operating frequency, the required feedback capacitor (C2) is determined from =k 5 Xa = 7p ath (4-5) As in the case of the voltage follower discussed in Section 4-1, the output capacitor can be used to set the lower 3 dB frequency for the high-input impedance voltage follower. From Eq. 4-3, Xc3 = R, at fi. The impedance of input capacitor C, should theoretically be determined from Eq. 4-2. as Xo, = Ziq/10 at fi. However, as the previous discussion of input impedance shows, the actual input impedance is affected by stray capacitance. Also, simply selecting C, as much larger than the likely stray capacitancecan cause a peaking effect in the circuit frequency response. Therefore, a reasonable rule-of-thumb for the circuit in Fig. 4-4 is to select Xc, ~ Ry/10 atf,. With R, = Ro, Xc1 =Xca, and C, = Cy. A resistor could be included in series with the op-amp inverting input terminal in the circuit of Fig. 4-4 to equalize the IpRs voltage drops, but, as already ex- plained, this is not usually necessary when the output is capacitor-coupled. If such aCh. 4 — Op-Amps as AC Amplifiers ‘f3 resistor is to be used, it should be equal to (R; + R2) and it should be connected be- tween the inverting input terminal and the junction of C; and the op-amp output. In other words, it should nor be in series with C>. Example 4-3 Modify the circuit designed in Example 4-1 to make it a high input impedance voltage follower. Also, determine the minimum theoretical input impedance of the circuit. Solution Ry + Re = Ruins) = 140 KO (as in Example 4-1) 140 kQ. 2 =70kM (use 68 kM standard value resistors) R= R= From Eq. 4-3, = = 0.82 uF (as for C; in Example 4-1) afi eee ee ee PrfAReJ10) — Zr X 50 Ha x (68 KQ/10) ~0.5 uF (standard value) Cy = Cy =0.5 pF From Eq. 4-5, C2 Eq. 4-4 (1+ MR, From the 741 data sheet, Monin) = 50.000 80, Zaininy = (1 + 50 000) 68 kO = 3400 MO Vee ES 71 a 7 eanne } osuF | Vee fe 68ka Figure 4.5 High input impedance capacitor-coupled voltage follower designed in Example 43.74 Operational Amplifiers and Linear ICs 4-3 CAPACITOR-COUPLED NONINVERTING AMPLIFIER When the input of a noninverting amplifier is to be capacitor-coupled, the noninvert- ing input terminal must be grounded via a resistor to provide a path for the input bias current. Fig. 4-6 shows the arrangement. R, may be made equal to R2|| Rs as in the direct-coupled case. However, as already explained, de offset is unimportant when the output is capacitor-coupled, so any reasonable value of R; can be chosen within the limit set by Eq. 3-1 Vee Figure 4-6 | Capacitor-coupled nonin- —- verting amplifier. The op-amp noninvert ing terminal is grounded via a resistor to provide a path for input bias current. ‘The capacitor values are determined by making Xex = Z/10 at fi, and Xe. = Rathi As in the case of the capacitor-coupled voltage follower, Zin = Ri for a capacitor-coupled noninverting amplifier. Resistors Rs and Ry in Fig. 4-6 are calcu- lated in the same manner as for a direct-coupled circuit. The capacitors are deter- mined in the same way as for the capacitor-coupled voltage follower. Example 4-4 ‘The noninverting amplifier designed in Example 3-4 is to be capacitor-coupled at input and output. The load resistor is 2.2 kO and the lower cut-off frequency is to be 120 Hz. Make the necessary modifications to give the highest input impedance and determine the required capacitor values. Solution ‘The circuit is rearranged as in Fig. 4-6. For highest Zin, O.1 Vor _ 0.1 x 0.7V Eq. 3-1, Rios = Totoux 500 nA, 140 kQ (use 120 KO standard value) 18 kQ and Ry = 270 @ as in Example 3-4 L 1 InflR\/10) 2 X 120 Ha x (120k0/10) = 0.11 mF [use 0.12 WF standard value] From Eq. 4-2, C, =Ch. 4— Op-Amps as AC Amplifiers Ts 1 1 © 2mfiR, 2m * 120 Hz x 2.2kO = 0.6 uF (use 0.68 F standard value) Wee G O12 ar 7a a, = 120k. 3} “Vee Figure 4-7 Capacitor-coupled non- inverting amplifier designed in Example + +4. 4-4 HIGH Z,, CAPACITOR-COUPLED NONINVERTING AMPLIFIER The input impedance of the noninverting amplifier in Fig. 4-8 is improved in the same way as for the high Zp voltage follower discussed in Section 4-2. In this case, the voltage fed back from the output to the input via R2, Cs, and Rs is not 100%, but is potential divided by a factor 8, where B = Rs/(Rz + Rs) Substituting this quantity into the analysis for Eq. 4-4 gives, Za = (1 + MB)R, (4-6) +Vee Ps 3} os Ven my fy Figure 4-8 High input impedance ca- pacitor-coupled noninverting amplifier. Feedback via C2 to the junction of Ry and Ry gives an input impedance of = Za = (1 + MB)R,, where B = 1/4,716 Operational Amplifiers and Linear ICs The values of resistors R2 and R3 for the high Z circuit in Fig. 4-8 are deter- mined exactly as for a direct-coupled noninverting amplifier. Then, for equal Ip Rp voltage drops, RitRs=R which usually gives Ri~R Alternatively, for the highest input impedance (without equalizing the Is Rs voltage drops), Ry + Ry = Roo _ 0.1 Vee Toons) as determined by Eq. 3-1. Equation 3-1 applies only in the case of a bipolar op-amp. For a BIFET circuit, the maximum resistor values normally are R, + Rs = 1M The capacitor values can be calculated exactly as for the high Za voltage fol- lower. An alternative to this for a circuit which might have a variable load is to use C2 to determine the low 3 dB frequency for the circuit. With Co in the circuit, the voltage gain is If Xco < (Ro + Rs), and when Xe: = Rs, 1 A x RB VA Or, when Xcs = Rs, Av is 3 dB below the normal mid-frequency gain of (R + Rs)/Rs. Thus, for C2 to determine fi, Xe2 = Rs at fir (4-7) Note that the assumption of Xe < (R: + Rs) is reasonable when Xco = Ry and Rs < Rz, which is the case only when the circuit has substantial voltage gain. When C; is to set the lower cutoff frequency, Cs should have no significant ef- fect on the low 3 dB frequency of the circuit. The capacitance of C; is then deter- mined, like other coupling capacitors, to have an impedance at fi equal to one-tenth of the minimum resistance in series with C3Ch. 4 — Op-Amps as AC Amplifiers Tells Example 4-5 Using a LF353 BIFET op-amp, design a high Zi, capacitor-coupled noninverting am- plifier to have a low cutoff frequency of 200 Hz. The input and output voltages are to be 15 mV and 3 V respectively, and the minimum load resistance is 12 k0 Solution or, Rea =~ 5k (use 4.7 KO to give a slightly larger voltage gain) R, =1MQ—R, ~1 M0 1 1 IafiRy Ie X 200 He KX 4TEO 0.17 pF (use 0.18 4 F standard value) 1000 pF_ (to be much larger than stray capacitance) = 1 1 © Qnfi(Ri/10) 2m * 200 Hz x (12 k/10) = 0.66 wF (use 0.68 uF standard value) From Eq. 4-7, C2 a Cs +Vee L383 Figure 4-9 High input impedance capacitor-coupled noninverting amplifier (using a BIFET ‘op-amp) designed in Example 4-5.78 Operational Amplifiers and Linear ICs 4-5 CAPACITOR-COUPLED INVERTING AMPLIFIER A capacitor-coupled inverting amplifier is shown in Fig. 4-10. In this case, bias cur- ent to the op-amp inverting input terminal flows via resistor Ra, so coupling- capacitor C, does not interrupt the input bias current. No resistor is included in se- ries with the noninverting input terminal, because a small de offset is unimportant with a capacitor-coupled output. If it is desired to equalize the Ip Re voltage drops, the resistance in series with the noninverting input should equal R» because Rj is not part of the bias current path at the inverting input terminal. Figure 4-10 Capacitor-coupled invert. ing amplifier. No additional bias resis- tors are required because neither of the ‘op-amp input bias current paths is inter- rupted by a capacitor. The resistor values are determined as for a direct-coupled inverting amplifier circuit. Then C; and C; are calculated to give Xci = Ri/10 at fi, and Xco = Ry at fi, as in the case of a capacitor-coupled noninverting amplifier. 46 SETTING THE UPPER CUTOFF FREQUENCY The highest signal frequency that can be processed by an op-amp circuit depends on the op-amp selected. This is further considered in Section 5-5. In some cireum- stances, the upper cutoff frequency may be higher than desired, One example of this is where very low frequency signals are to be amplified and unwanted higher fre- quency noise voltages are to be excluded. In this case, the circuit voltage gain should be made to fall off just above the highest desired signal frequency. The usual method of doing this is to connect a feedback capacitor C; from the op-amp output to its in- verting input terminal as illustrated in Fig. 4-11(a) and (b). For the inverting amplifier in Fig. 4-11(a), the voltage gain is — RallXe Ay Ri (4-8) or eae ee “RMR + (1/Xe)* when Xcy = Ro, ot)Ch. 4— Op-Amps as AC Amplifiers 79 mre = abo (a) Inverting amplifier with feedback capacitor C, to set the upper cutoff frequency (b) Noninverting amplifier with feedback capacitor C, ‘0 set the upper cutoft frequency. Figure 4-11 The upper cutoff frequency of an amplifier can be selected by includ- ing capacitor C, across the feedback resistor. This gives fa at Xcy = Ro. or Ay is 3 dB below the normal voltage gain of Rs/R:. Thus, the upper cutoff fre- quency for the circuit can be set at the desired frequency ( f,) by making Xcy = Ro at fr (4-9) An analysis of the noninverting amplifier gives a similar result. It must be emphasized that this method of setting the circuit upper cutoff fre- quency is applicable only where the op-amp has a much higher cutoff frequency. In fact, as explained in Section 5-5, the op-amp cutoff frequency must be greater than the circuit cutoff frequency multiplied by the amplifier closed-loop gain.