® L4949E

MULTIFUNCTION VERY LOW DROP

VOLTAGE REGULATOR

OPERATING DC SUPPLY VOLTAGE RANGE

5V - 28V
TRANSIENT SUPPLY VOLTAGE UP TO 40V
EXTREMELY LOW QUIESCENT CURRENT
IN STANDBY MODE
HIGH PRECISION STANDBY OUTPUT VOLT-
Minidip SO8 SO20W (12+4+4)
AGE 5V±1%
OUTPUT CURRENT CAPABILITY UP TO
100mA ORDERING NUMBERS: L4949E (Minidip)
L4949ED (SO8)
VERY LOW DROPOUT VOLTAGE LESS L4949EP (SO20W)
THAN 0.5V
RESET CIRCUIT SENSING THE OUTPUT
VOLTAGE DESCRIPTION
PROGRAMMABLE RESET PULSE DELAY The L4949E is a monolithic integrated 5V voltage
WITH EXTERNAL CAPACITOR regulator with a very low dropout output and addi-
VOLTAGE SENSE COMPARATOR tional functions as power-on reset and input volt-
THERMAL SHUTDOWN AND SHORT CIR- age sense. It is designed for supplying the micro-
CUIT PROTECTIONS computer controlled systems especially in
automotive applications.

BLOCK DIAGRAM

VZ VOUT CT

VS PREREGULATOR 5V

2µ
RES
+

2V
REG RESET
VS

SO
SI

1.23V 1.23V
REF SENSE GND

D96AT219

June 2000 1/10

L4949E

ABSOLUTE MAXIMUM RATINGS

Symbol Parameter Value Unit
VSDC DC Operating Supply Voltage 28 V
VSTR Transient Supply Voltage (T < 1s) 40 V
IO Output Current Internally Limited
VO Output Voltage 20 V
VRES, VSO Output Voltage 20 V
IRES, ISO Output Current 5 mA
VZ Preregulator Output Voltage 7 V
IZ Preregulator Output Current 5 mA
TJ Junction Temperature -40 to +150 °C
Tstg Storage Temperature Range -55 to +150 °C

Note: The circuit is ESD protected according to MIL-STD-883C

THERMAL DATA
Symbol Description Minidip SO-8 SO20L Unit
Rth j-amb Thermal Resistance Junction-ambient Max 100 200 50 °C/W
Rth j-pins Thermal Resistance Junction-pins Max 15 °C/W
TJSD Thermal Shutdown Junction temperature 165 °C

PIN CONNECTIONS

VZ 1 20 SI
CT 2 19 VS
N.C. 3 18 N.C.
VS 1 8 VOUT GND 4 17 GND
SI 2 7 SO GND 5 16 GND
VZ 3 6 RES GND 6 15 GND
CT 4 5 GND
GND 7 14 GND
D95AT217
N.C. 8 13 N.C.
N.C. 9 12 VOUT
RES 10 11 SO
D95AT218
MINIDIP/SO8

SO20

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 L4949E

ELECTRICAL CHARACTERISTICS (VS = 14V; -40°C < Tj < 125°C unless otherwise specified)
Symbol Parameter Test Condition Min. Typ. Max. Unit
VO Output Voltage TJ = 25°C; IO = 1mA 4.95 5 5.05 V
VO Output Voltage 6V < VIN < 28V, 1mA < IO < 50mA 4.90 5 5.10 V
VO Output Voltage VIN = 40V; 4.75 5.25 V
T < 1s 5mA < IO < 100mA
VDP Dropout Voltage IO = 10mA 0.1 0.25 V
IO = 50mA 0.2 0.4 V
IO = 100mA 0.3 0.5 V
VIO Input to Output Voltage VIN = 4V, IO = 35mA 0.4 V
Difference in Undervoltage
Condition
Iouth ** Max Output Leakage VIN = 25V, VO = 5.5V 20 50 80 µA
VOL Line Regulation 6V < VIN < 28V; IO = 1mA 20 mV
VOLO Load Regulation 1mA < IO < 100mA 30 mV
ILIM Current Limit VO = 4.5V 105 200 400 mA
VO = 4.5V, T J = 25°C 120 400 mA
VO = 0V (note 1) 100 mA
IQSE Quiescent Current IO = 0.3mA; TJ < 100°C 200 300 µA
IQ Quiescent Current IO = 100mA 5 mA
** With this test we guarantee that with no output current the output voltage will not exceed 5.5V
RESET
VRT Reset Thereshold Voltage VO -0.5V V
VRTH Reset Thereshold Hysteresis 50 100 200 mV
tRD Reset Pulse Delay CT = 100nF; TR ≥100µs 55 100 180 ms
VRL Reset Output Low Voltage RRES = 10KΩ to VO VS ≥ 1.5V 0.4 V
IRH Reset Output High Leakage Current VRES = 5V 1 µA
VCTth Delay Comparator Thereshold 2 V
VCTth, hy Delay Comparator Thereshold 100 mV
Hysteresis
SENSE
Vst Sense Low Thereshold 1.16 1.23 1.35 V
Vsth Sense Thereshold Hysteresis 20 100 200 mV
VSL Sense Output Low Voltage VSI ≤ 1.16V; VS ≥ 3V 0.4 V
RSO = 10KΩ to VO
ISH Sense Output Leakage VSO = 5V; VSI ≥ 1.5V 1 µA
ISI Sense Input Current VSI = 0 -20 -8 -3 µA
PREREGULATOR
VZ Preregulator Output Voltage IZ = 10µA 4.5 5 6 V
IZ Preregulator Output Current 10 µA
Note 1: Foldback characteristic

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L4949E

APPLICATION CIRCUIT

VOUT

VZ (optional) CT

VBAT VS
PREREGULATOR 5V

2µ RES
+

VOUT
2V
REG RESET
VS

SI
SO

1.23V 1.23V
REF SENSE GND

D96AT219

For stability: CS ≥ 1µF, CO ≥ 4.7µF, ESR < 10Ω at 10KHz

Recommended for application: CS = CO = 10µF to 100µF

APPLICATION INFORMATION proach of this device allows to get easily also

Supply Voltage Transient other features and functions when required.
High supply voltage transients can cause a reset
output signal disturbation. Voltage Regulator
For supply voltages greater than 8V the circuit The voltage regulator uses an Isolated Collector
shows a high immunity of the reset output against Vertical PNP transistor as a regulating element.
supply transients of more than 100V/µs.
For supply voltages less than 8V supply tran- Figure 1: Foldback Characteristic of VO
sients of more than 0.4V/µs can cause a reset
signal disturbation.
To improve the transient behaviour for supply
voltages less than 8V a capacitor at pin 3 can be
used.
A capacitor at pin 3 (C3 ≤ 1µF) reduces also the
output noise.

FUNCTIONAL DESCRIPTION
The L4949E is a monolithic integrated voltage
regulator, based on the STM modular voltage
regulator approch. Several outstanding features
and auxiliary functions are implemented to meet
the requirements of supplying microprocessor
systems in automotive applications. Nevertheless,
it is suitable also in other applications where the
present functions are required. The modular ap-

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 L4949E

With this structure very low dropout voltage at Preregulator

currents up to 100mA is obtained. The dropout
operation of the standby regulator is maintained To improve the transient immunity a preregulator
down to 3V input supply voltage. The output volt- stabilized the internal supply voltage to 5V. This
age is regulated up to the transient input supply internal voltage is present at Pin 3 (VZ). This volt-
voltage of 40V. With this feature no functional in- age should not be used as an output because the
terruption due to overvoltage pulses is generated. output capability is very small (≤10µA).
The typical curve showing the standby output This output may be used as an option when a
voltage as a function of the input supply voltage is better transient behaviour for supply voltages less
shown in Fig. 2. The current consumption of the than 8V is required (see also application note).
device (quiescent current) is less than 300µA. In this case a capacitor (100nF - 1µF) must be
To reduce the quiescent current peak in the un- connected between Pin 3 and GND. If this feature
dervoltage region and to improve the transient re- is not used Pin 3 must be left open.
sponse in this region, the dropout voltage is con-
trolled, the quiescent current as a function of the
supply input voltage is shown in Fig. 3. Reset Circuit
The block circuit diagram of the reset circuit is
Figure 2: Output Voltage vs. Input Voltage shown in Fig. 4. The reset circuit supervises the
output voltage.
The reset thereshold of 4.5V is defined with the
internal reference voltage and standby output
drivider.
The reset pulse delay time tRD, is defined with the
charge time of an external capacitor CT:

CT • 2V
tRD =
2µA

The reaction time of the reset circuit originates

from the discharge time limitation of the reset ca-
pacitor CT and is proportional to the value of CT.
40V The reaction time of the reset circuit increases the
noise immunity. Standby output voltage drops be-
low the reset threshold only a bit longer than the
reaction time results in a shorter reset delay time.
Figure 3: Quiescent Current vs. Supply Voltage The nominal reset delay time will be generated for
standby output voltage drops longer than approxi-
mately 50µs.
The typical reset output waveforms are shown in
Fig. 5.

Sense Comparator
The sense comparator compares an input signal
with an internal voltage reference of typical 1.23V.
The use of an external voltage divider makes this
comparator very flexible in the application.
It can be used to supervise the input voltage
either before or after the protection diode and to
give additional informations to the microprocessor
like low voltage warnings.

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L4949E

Figure 4

Figure 5

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 L4949E

mm inch
DIM. OUTLINE AND
MIN. TYP. MAX. MIN. TYP. MAX. MECHANICAL DATA
A 3.32 0.131

a1 0.51 0.020

B 1.15 1.65 0.045 0.065

b 0.356 0.55 0.014 0.022

b1 0.204 0.304 0.008 0.012

D 10.92 0.430

E 7.95 9.75 0.313 0.384

e 2.54 0.100

e3 7.62 0.300

e4 7.62 0.300

F 6.6 0.260

I 5.08 0.200

L 3.18 3.81 0.125 0.150

Minidip
Z 1.52 0.060

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L4949E

mm inch
DIM. OUTLINE AND
MIN. TYP. MAX. MIN. TYP. MAX.
MECHANICAL DATA
A 1.75 0.069
a1 0.1 0.25 0.004 0.010
a2 1.65 0.065
a3 0.65 0.85 0.026 0.033
b 0.35 0.48 0.014 0.019
b1 0.19 0.25 0.007 0.010
C 0.25 0.5 0.010 0.020
c1 45° (typ.)
D (1) 4.8 5.0 0.189 0.197
E 5.8 6.2 0.228 0.244
e 1.27 0.050
e3 3.81 0.150
F (1) 3.8 4.0 0.15 0.157
L 0.4 1.27 0.016 0.050
M 0.6 0.024 SO8
S 8 ° (max.)

(1) D and F do not include mold flash or protrusions. Mold flash or

potrusions shall not exceed 0.15mm (.006inch).

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 L4949E

mm inch
DIM. OUTLINE AND
MECHANICAL DATA
MIN. TYP. MAX. MIN. TYP. MAX.

A 2.35 2.65 0.093 0.104

A1 0.1 0.3 0.004 0.012

B 0.33 0.51 0.013 0.020

C 0.23 0.32 0.009 0.013

D 12.6 13 0.496 0.512

E 7.4 7.6 0.291 0.299

e 1.27 0.050

H 10 10.65 0.394 0.419

h 0.25 0.75 0.010 0.030

L 0.4 1.27 0.016 0.050

SO20
K 0˚ (min.)8˚ (max.)

L
h x 45˚

B e K A1 C
H

20 11

1 0
1

SO20MEC

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L4949E

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of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is
granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specification mentioned in this publication are
subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products
are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics.
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