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DLD_Lab_02 [NAND and NOR Gates]

The document outlines a lab exercise for students at Sukkur IBA University focused on implementing and verifying NAND and NOR gate operations using specific ICs and a training module. It includes objectives, required hardware, background theory on NAND and NOR gates, and step-by-step instructions for lab activities and exercises. Students are expected to submit their completed lab activities in the next session.

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0% found this document useful (0 votes)
21 views

DLD_Lab_02 [NAND and NOR Gates]

The document outlines a lab exercise for students at Sukkur IBA University focused on implementing and verifying NAND and NOR gate operations using specific ICs and a training module. It includes objectives, required hardware, background theory on NAND and NOR gates, and step-by-step instructions for lab activities and exercises. Students are expected to submit their completed lab activities in the next session.

Uploaded by

chimranishakti
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as DOCX, PDF, TXT or read online on Scribd
You are on page 1/ 8

Sukkur IBA University – Kandhkot Campus

Department of Computer Science

ESE-201: Digital Logic Design Lab

Lab # 02: NAND and NOR Gates


Instructor: Farhan Ahmed

Note: Submit this lab hand-out in the next lab with attached solved
activities and exercises
NAND and NOR Gates

Lab Learning Objectives:

Upon successful completion of this experiment, the student will be able:


 To implement and verify NAND gate operations using 74LS00 IC &
Module KL-33001
 To implement and verify NOR gate operations using 74LS02 IC &
Module KL-33001

Lab Hardware and Software Required:

1. 74LS00 IC (NAND gate )


2. 74LS02 IC(NOR gate)
3. Module KL-33001
4. Breadboard
5. Connecting Wires

Background Theory:

NAND gate:

The logic symbols for NAND gate is shown in Fig 2.1 (a & b). It consists
of AND symbol with inverter symbol added to output. The operation of
NAND gate is same as the AND gate except that its output is inverted.
NAND gates can
also have two or more
than two inputs
and X=A. a A
single X=A.
output.
NAND gate produces a LOW output only when all the inputs are HIGH.
When any of the inputs is LOW, the output will be HIGH.

A
B B
Fig 2.1: (a) Distinctive symbol of NAND gate (b) Standard NAND gate
symbol

74LS00 2-Input NAND gate IC:

In order to implement the NAND gate operation using IC, the TTL
74LS00 2-input NAND gate IC can be used. This IC has 14 pin Dual Inline
Package (DIP) configuration as shown in Fig 2.2. The power supply
connections are made to pin 7 and 14. Pin 1 is identified by a small
indented circle next to it or by a notch cut out between pin 1 and 14.

Page 2|8
NAND and NOR Gates

Fig 2.2:
74LS00 2-
input NAND gate
IC pin
configuration

NOR gate:

The operation of the NOR gate is same as that of the OR gate except that
its output is inverted. You can think of a NOR gate as an OR gate with an
inverter at its output. The logic symbol for NOR gate is shown in Fig 2.3
(a & b). NOR gates can also have two or more than two inputs and a
single output. The NOR gate produces
a low output, When any one of input is
high and produces X=A+ X=A+
a high output, when
all inputs are low.

A A
B B
Fig 2.3: (a) Distinctive symbol of 2-input NOR gate (b) Standard 2-input
NOR gate symbol

74LS02 2-input NOR gate IC:

In order to implement the NOR


gate operation using IC, the TTL
74LS02 2-input NOR gate IC can be
used. This IC has 14 pin Dual Inline
Package (DIP) configuration as
shown in Fig 2.4. The power supply
connections are made to pin 7 and
14. Pin 1 is identified by a
small indented circle next to it or by a notch cut out between pin 1 and
14.

Page 3|8
NAND and NOR Gates

Fig 2.4: 74LS02 2-input NOR gate IC pin configuration

Lab Examples:
Implementation of NAND gate

 In order to implement the NAND gate operations with the help of


ICs, take the 74LS00
 Pin Assignments for the ICs have been shown in Fig 2.2
 Take 74LS00 IC and insert it in the breadboard present on the KL-
33001 training kit
 Connect its pin 14 to +5V and pin 7 to ground
 Use first gate (any one can be taken) from IC by connecting input
pin 1 & input pin 2 to SW0 & SW1 respectively, and output pin3to
LED and observe the AND gate operation
 Fill the following observation table

Input Output

LED (on /
A B Level ( 1 / 0 )
off)

Page 4|8
NAND and NOR Gates

Table 2.1: Observation table of NAND gate

Lab Activities:

Implementation of NOR gate

 In order to implement the AND operations with the help of IC, take
the 74LS02 IC
 Pin Assignments for the ICs have been shown in Fig 2.4
 Take 74LS02 IC and insert it in the breadboard present on the KL-
33001 training kit
 Connect its pin 14 to +5V and pin 7 to ground
 Use first gate (any one can be taken) from IC by connecting input
pin 1 & input pin 2 to SW0 & SW1 respectively, and output pin3to
LED and observe the AND gate operation
 Fill the following observation table
Input Output

LED (on /
A B Level ( 1 / 0 )
off)

Table 2.2: Observation Table of NOR gate

Lab Exercises:

NAND-NOR Universal Gates

NAND and NOR gates are known as Universal Gates as they can be used
to construct an AND gate, an OR gate, an INVERTER, or any combination
of these functions. The NAND Universal Gate can also be used to
implement a NOR gate. Similarly, a NOR gate can be used to implement
a NAND gate.
1. Implement NAND gate using NOR gates
 Draw the schematic Diagram
 Write the Boolean Expression

Page 5|8
NAND and NOR Gates

 Fill the Observation Table


Schematic Diagram:

Boolean Expression:

Input Output

A B LED (on / off) Level ( 1 / 0 )

Page 6|8
NAND and NOR Gates

Fig 2.3: Observation table for 2-input NAND gate using NOR gates

2. Implement NOR gate using NAND gates


 Draw the schematic Diagram
 Write the Boolean Expression
 Fill the Observation Table
Schematic Diagram:

Boolean Expression:

Input Output

A B LED (on / off) Level ( 1 / 0 )

Page 7|8
NAND and NOR Gates

Table 2.4: Observation table for 2-input NOR gate using NAND gates

Page 8|8

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