Lecture 3 VLSI Fabrication Process
Lecture 3 VLSI Fabrication Process
• General Fabrication
Steps
• NMOS Fabrication
Process
• CMOS Fabrication
Process
NMOS
TRANSISTOR
STRUCTURE
• Step 6: Using the oxidation, create SiO2 layer of 0.1μm on the substrate.
Using CVD, create polysilicon at the center.
• Step 7: Using photolithography, create window to diffuse n+ regions. Diffuse
n+ regions using diffusion.
• Step 8: Thick oxide layer is grown over all again and is then masked with
photoresist and etched to expose selected areas of polysilicon gate and the
drain and source areas where connections are to be made.
• Step 9: The whole chip then has metal (aluminum) deposited over its surface to
a thickness typically of 1μm. The metal layer is then masked and etched to
form the required interconnection pattern.
CMOS FABRICATION: NWELL PROCESS
CMOS FABRICATION: TWIN-TAB PROCESS
CONTACT DETAILS
Dr. Md. Hasan Maruf
Associate Professor, EEE, GUB
Email: maruf@eee.green.edu.bd