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MPMC-Unit-5 (1)

The document provides an overview of ARM Cortex processors and OMAP architecture, detailing their evolution, profiles, and applications. Cortex processors are categorized into A, R, and M profiles, designed for varying performance needs, while OMAP integrates ARM and DSP for multimedia applications. Key advantages of both architectures include low power consumption, high performance, and flexibility in various applications such as automotive, industrial automation, and consumer electronics.

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0% found this document useful (0 votes)
18 views

MPMC-Unit-5 (1)

The document provides an overview of ARM Cortex processors and OMAP architecture, detailing their evolution, profiles, and applications. Cortex processors are categorized into A, R, and M profiles, designed for varying performance needs, while OMAP integrates ARM and DSP for multimedia applications. Key advantages of both architectures include low power consumption, high performance, and flexibility in various applications such as automotive, industrial automation, and consumer electronics.

Uploaded by

arunkumar9mla
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© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Introduction to Cortexprocessor and its

Architecture
Cortex Processor Evolution
• The cortex-M3 was the first of the cortex generation of processors
• released by ARM in 2005.The cortex M4 was released in 2010.
• Before the release of cortex-M3 processor, there were quite a large number of
ARM processors, that were already used in microcontrollers.(one of the most
successful one being ARM7TDMI PROCESSOR) which is used in many 32-bit
microcontrollers.
• After the introduction of the ARM11 processors it was decidedthat there
was a need to deliver processor architectures that best fit the
application.
• ARM then introduced its new processor family named as“Cortex” to
address the above problem
In the cortex processor range, the processors are divided intothree profiles.
• The A profile designed for high performance open applicationplatforms.
• The R profile for high end embedded systems in which realtime
performance is needed.
• The M profile for deeply embedded microcontroller typesystems.
Cortex-A
• These are Applications processors designed to handle complex
applications such as high end embedded OS (such as android, Linux,
windows)
• Used for applications requiring highest processing power, virtual memory
support with MMU(Memory Management units) units, enhanced java
support and a secure program execution environment.
Eg: High end smart phones, tablets, televisions and even computing
servers.
Cortex R Processors

• These are the real time, high performance processors targeted mainly for
the real time market
APPLICATIONS: Hard drive controllers, baseband controllers for
mobile communication and automotive systems in which high
processing power and reliability are essential for which low latency and
determinism are important.
Cortex M processors

• These are the processors for small scale applications such as


microcontrollers and mixed signal design where criteria like low cost,
low power, energy efficiency, and low interrupt latency are important.
• At the same time the processor design should be easy to use ideally
suited for microcontroller products
Eg: Toys to electrical appliances, industrial and medical systems, for
handling GUI on LCD panels and various communication protocols
and may other applications.
Applications of ARM Cortex-M processors
• Microcontrollers:
1. Low cost Microcontrollers with small memory sizes.
2. High performance microcontrollers with high operation speeds.

• Automotive
Ideal for Real-time Control systems as these processors offer great
performance, high efficiency and low latency.

• Data Communication: Processor’s low power and high efficiency coupled


with Thumb-2 instructions for bit manipulation make it ideal for communication
applications such as ZigBee and Bluetooth
• Industrial Control:
The interrupt support features of on cortexM3 and M4 processors, including
the automatic nested interrupt vector control, MPU and enhanced fault
handling make them strong.

• The cortex M0, cortex M0+, cortex M1processors are based on ARMv6-M
architecture. Cortex M3 and Cortex M4 processors are based on ARMv7-M an
architecture specification for microcontroller products.

• All the Cortex-M processors support thumb-2 technology and supports different sub
sets of thumb ISA.
Features of Cortex M3 and M4 processors

• 32-bit RISC processors


 32-bit registers
 32-bit internal data path
 32-bit bus interface
• Can also handle 8-bit and 16-bit data
• Also support operations involving64-bit data(Multiply,Accumulate)
• 3-stage pipeline
• Harvard BUS Architecture
• The memory system of cortex-M processors uses 32-bit addressing,
which allows a max of 4GB address space.
• Unified memory map-although there are multiple BUS interfaces, there
is only one 4GB address space
• This memory space is used by program code, data, peripherals and some
other debug components inside the processor.
• Based on load store architecture.
Block Diagram
• The Cortex M3 and M4 processors contain the core of the processor, the
Nested Vector Interrupt Controller (NVIC), sys Tick timer and optional
floating point unit(for cortex-M4).
• Apart from these the processors also contain some internal bus systems; an
optional MPU and a set of components to support software debug operations.
The internal Bus inter connect is needed to route transfers from the processor
and the debugger to various parts of the design.
• The cortex M3 and M4 processors are highly configurable. For example the
debug features are optional allowing the SoC designers to remove debug
components if the debug support is not required in the product.
• The integration level in the figure below is a reference design ARM provides
to the silicon designers. Therefore the silicon vendors can customize the design
according to the need of their application (eg: debug support such as the debug
interface or to support device specific low power features by adding a customized
wake up interrupt controller).
Advantages of Cortex –M processors
• Low Power(200microamp/MHz, support sleep mode features for ultra-low
power designs)
• Performance(1.25DMIPS/MHz)
• Energy Efficiency
• Code Density
• Interrupts
• Ease of use, C-Friendly(supports c- programming)
• Scalability(Scalable components)
• Debug Features(tracing, profiling, stepping, halting)
• OS support(Number of features available to support os)
• Versatile system features(Bit addressable memory region and MPU)
• Software probability and reusability(since the architecture is C- Friendly)
• Choices( devices, tools, OS)
Introduction to OMAP processor and its architecture

OMAP: OPEN MULTIMEDIA APPLICATIONS PLATFORM


• Introduced mainly for mobile and multimedia applications
• OMAP devices generally include a general-purpose ARM architecture
processor core plus one or more specialized co-processor.
• They are proprietary system on chips (SoCs) for portable and mobile
multimedia applications.
• The advanced OMAP architecture provides a system solution for the
wireless market. It seamlessly integrates a software infrastructure, an ARM-
RISC processor, a high performance low power TI TMS320C55x generation
digital signal processor and shared memory architecture on the same piece
of silicon
• The OMAP SoC family is based on a two processor system an ARM
processor combined with Texas Instruments DSP processor.

• ARM is a general purpose processor designed with reduced instruction set


Architecture(RISC).
High Performance Application Processors
• Used as application processors in smartphones, that have processors which are
powerful enough to run significant operating systems (such as Linux, Android or
Symbian)

• Support connectivity to personal computers, and support various audio and video
applications.

• Only by adding DSP functionality to the basic processing configuration of a


wireless appliance can developers reproduce high quality, real-time video within
acceptable power consumption limits
OMAP DSP/BIOS Bridge
The DSP/BIOS Bridge is the key to OMAP architecture functionality and ease
of use. It provides the application software developer a seamless, easy-to-use
interface to the DSP. It allows the developer on the RISC to access and control
the DSP runtime environment using a standardized application programming
interface (API). There is no need for the developer to program for the two
processors independently or to work in the more difficult language environments
sometimes associated with DSPs.
•In the OMAP platform, the RISC OS kernel serves the same function as it does
in a system using RISC alone, but the DSP/BIOS Bridge allows software
developers to reroute the processing-intensive functions to the DSP.

.
Contd.

•In some cases, the RISC processor exercises only a limitednumber of


command and control functions, while the DSP provides the
processing muscle needed for the application
• A media file will run asynchronously on the DSP without the interrupts
and latencies inherent when a RISC processor performs signal
processing, resulting in a more robust, user- acceptable implementation.
• Once an application is developed for OMAP using the standardized
API, it will be compatible with future end equipments based on the
OMAP architecture, maximizing itsreuse.
Applications
• Industrial automation
• Medical appliances
• Automotives
• Mobile phones
• Multimedia/gaming applications
• Consumer electronics
•Home automation
Advantages of OMAP Processors

• High performance
• Low power consumption
• Faster user interfaces
• Flexibility
• Full HD STANDARD video encode and decode

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