Plate 1: Alphanumeric Decoder Circuit

Problem Statement

Design an Alphanumeric Decoder Circuit that converts any 5-bit binary input combination
into its corresponding alphanumeric character. This circuit should use a 14-segment or 15-
segment display to show the output.

General Task:

Your goal is to analyze, design, document, simulate and implement this decoder circuit.

Step-by-Step Requirements for Documentation and Simulation: (25 pts)

Analysis:

1. Specify Output Display:

Describe what each alphanumeric character should look like on the 14-segment or 15
segment display based on the binary inputs.
2. Create the Truth Table:
Develop a truth table that matches each binary input to its corresponding
alphanumeric output on the 14-segment or 15-segment display. Consider what type of
segment display to be used in the design (common cathode or common anode)
3. Simplify Boolean Functions:
Use Karnaugh maps (K-maps) to simplify the Boolean functions for the circuit,
reducing the complexity of your design.

Design:

4. Build the Logic Diagram using NI Multisim:

o Build a logic diagram for the circuit using NI Multisim.
o Verify that this diagram matches your truth table to ensure accuracy.

5. Build the Circuit Diagram using NI Multisim:

o Input Configuration: Use a pull-up switch configuration for every inputs.
o Output Configuration: Set up a current sourcing configuration for the
output, interfacing with a common 14-segment or 15-segment display.
1. Specify Output Display:
Describe what each alphanumeric character should look like on the 14-segment or 15
segment display based on the binary inputs.
2. Create the Truth Table:
Develop a truth table that matches each binary input to its corresponding
alphanumeric output on the 14-segment or 15-segment display. Consider what type of
segment display to be used in the design (common cathode or common anode)

NON ABCDE F A B C D E G G2 H I J K L M
1
A 00000 1 1 1 1 0 1 1 1 0 0 0 0 0 0
B 00001 1 1 0 1 1 1 1 1 0 0 1 0 0 0
C 00010 1 1 0 0 1 1 0 0 0 0 0 0 0 0
D 00011 0 1 1 1 1 0 0 0 0 1 0 0 1 0
E 00100 1 1 0 0 1 1 1 1 0 0 0 0 0 0
F 00101 1 1 0 0 0 1 1 1 0 0 0 0 0 0
G 00110 1 1 0 1 1 1 0 1 0 0 0 0 0 0
H 00111 1 0 1 1 0 1 1 1 0 0 0 0 0 0
I 01000 0 1 0 0 1 0 0 0 0 1 0 0 1 0
J 01001 0 0 1 1 1 1 0 0 0 0 0 0 0 0
K 01010 1 0 0 0 0 1 1 0 0 0 1 0 0 1
L 01011 1 0 0 0 1 1 0 0 0 0 0 0 0 0
M 01100 1 0 1 1 0 1 0 0 1 0 1 1 0 0
N 01101 1 0 1 1 0 1 0 0 1 0 0 0 0 1
O 01110 1 1 1 1 1 1 0 0 0 0 0 0 0 0
P 01111 1 1 1 0 0 1 1 1 0 0 0 0 0 0
Q 10000 1 1 1 1 1 1 0 0 0 0 0 0 0 1
R 10001 1 1 1 0 0 1 1 1 0 0 0 0 0 1
S 10010 0 1 0 1 1 0 0 1 1 0 0 0 0 0
T 10011 0 1 0 0 0 0 0 0 0 1 0 0 1 0
U 10100 1 0 1 1 1 1 0 0 0 0 0 0 0 0
V 10101 1 0 0 0 0 1 0 0 0 0 1 1 0 0
W 10110 1 0 1 1 0 1 0 0 0 0 0 1 0 1
X 10111 0 0 0 0 0 0 0 0 1 0 1 1 0 1
Y 11000 0 0 0 0 0 0 0 0 1 0 1 0 1 0
Z 11001 0 1 0 0 1 0 0 0 0 0 1 1 0 0
0 11010 1 1 1 1 1 1 0 0 0 0 0 0 0 0
1 11011 0 0 1 1 0 0 0 0 0 0 0 0 0 0
2 11100 0 1 1 0 1 1 1 1 0 0 0 0 0 0
3 11101 0 1 1 1 1 0 1 1 0 0 0 0 0 0
4 11110 1 0 1 1 0 0 1 1 0 0 0 0 0 0
5 11111 1 1 0 1 1 0 1 1 0 0 0 0 0 0
 3. Simplify Boolean Functions:
Use Karnaugh maps (K-maps) to simplify the Boolean functions for the circuit,
reducing the complexity of your design.

A=0 A=1

DE DE
BC 00 01 11 10 BC 00 01 11 10
00 1 1 1 00 1 1
01 1 1 1 1 01 1 1 1
11 1 1 1 1 11 1 1
10 1 1 10 1
F = B’D’ + A’C + A’DE’ + CDE’ + A’BD + BDE’ + BCD

A=0 A=1

DE DE
BC 00 01 11 10
BC 00 01 11 10
00 1 1 1 1 00 1 1 1 1
01 1 1 1 01
11 1 1 11 1 1 1
10 1 10 1 1
A = B’C’ + A’B’D’ + A’C’D’E’ + A’CDE’ + AC’DE’ + ABD’E + ABCD’ + BCDE

A=0 A=1

DE DE
BC 00 01 11 10 BC 00 01 11 10
00 1 1 00 1 1
01 1 01 1 1
11 1 1 1 1 11 1 1 1
10 1 10 1 1
B = A'BC + BCD' + ACE' + B'C'D'E' + AB'C'D' + A'B'DE + A'BD'E + ABC'D
 A=0 A=1

DE DE
BC 00 01 11 10 BC 00 01 11 10
00 1 1 1 00 1 1
01 1 1 01 1 1
11 1 1 1 11 1 1 1
10 1 10 1 1
C = AB'E' + CDE' + ABD + B'C'D'E' + A'C'D'E + A'B'DE + A'BCE' + BCD'E

A=0 A=1

DE DE
BC 00 01 11 10 BC 00 01 11 10
00 1 1 1 00 1 1
01 1 1 01 1
11 1 11 1 1 1
10 1 1 1 10 1 1
D = A'C'E + B'C'DE' + B'CD'E' + AB'D'E' + A'CDE' + AC'DE' + ABD'E + ABCD' + ABCE
+ A’BC’D’

A=0 A=1

DE DE
BC 00 01 11 10 BC 00 01 11 10
00 1 1 1 00 1 1
01 1 1 1 1 01 1 1 1
11 1 1 1 1 11 1
10 1 1 1 10 1
E = B'D' + A'C + A'DE' + B'CE' + CD'E' + A'BE + BC'DE'

A=0 A=1

DE DE
BC 00 01 11 10 BC 00 01 11 10
00 1 1 00 1
01 1 1 1 01
11 1 11 1 1 1 1
10 1 10

G = A'B'D' + ABC + B'C'D'E + A'CDE + A'BC'DE'

 A=0 A=
DE DE
BC 00 01 11 10 BC 00 01 11 10
00 1 1 00 1 1
01 1 1 1 1 01
11 1 11 1 1 1 1
10 10

G2 = A'B'D' + A'B'C + ABC + B'C'D'E + BCDE + AB'C'DE'

A=0 A=1

DE DE
BC 00 01 11 10 BC 00 01 11 10
00 00 1
01 01 1
11 1 1 11

10 10 1
H = A'BCD' + AB'C'DE' + ABC'D'E' + AB'CDE

A=0 A=1

DE DE
BC 00 01 11 10 BC 00 01 11 10
00 1 00 1
01 01
11 11
10 1 10

I = B'C'DE + A'BC'D'E'

A=0 A=1

DE DE
BC 00 01 11 10 BC 00 01 11 10
00 1 00
01 01 1 1
11 1 11
10 1 10 1 1
J = ABC'D' + AB'CE + A'B'C'D'E + A'BC'DE' + A'BCD'E'
 A=0 A=1

DE DE
BC 00 01 11 10 BC 00 01 11 10
00 00
01 01 1 1 1
11 1 11
10 10 1
K = AB'CE + AB'CD + A'BCD'E' + ABC'D'E

A=0 A=1

DE DE
BC 00 01 11 10 BC 00 01 11 10
00 1 00 1
01 01
11 11
10 1 10 1
L = BC'D'E' + B'C'DE

A=0 A=1

DE DE
BC 00 01 11 10 BC 00 01 11 10
00 00 1 1
01 01 1 1
11 1 11
10 1 10

M = AB'C'D' + AB'CD + A'BC'DE' + A'BCD'E

Design:

4. Build the Logic Diagram using NI Multisim:

o Build a logic diagram for the circuit using NI Multisim.
o Verify that this diagram matches your truth table to ensure accuracy.
5. Build the Circuit Diagram using NI Multisim:
o Input Configuration: Use a pull-up switch configuration for every inputs.
o Output Configuration: Set up a current sourcing configuration for the
output, interfacing with a common 14-segment or 15-segment display.