BRAHMDEVDADA MANE POLYTECHNIC, BELATI SOLAPUR

DEPARTMENT OF COMPUTER TECHNOLOGY

Model Answer (Class Test 1)
Academic Year: 2024-25 Program Code:CM4K
Course Name: Microprocessor Programming Course Code:314321
Duration: 1Hr 30Min. Max. Marks: 30
Date 11/02/2025

Q. Sub Answers Marking

No. Q. N Scheme
1
Attempt any Five 10 Total
Marks
a. Draw the labeled format of 8086 flag register. 2M
Ans.
Correct
diagram: 2 M

b. State the function of editor and assembler. 2M

Ans. Editor: The editor is a program which allows the user to enter and modify as 1 M for each
well as store a group of instructions or text under a file name. function

Assembler: The assembler is used to convert assembly language written by a

user or a program into a machine recognizable format.
c. Define immediate addressing mode with suitable example 2M
Ans. An instruction in which 8 bit or 16-bit operand (data) is specified in instruction Definition :1M
itself then the addressing mode of such instruction is called as immediate Example:1M
addressing mode.
E.g.
MOV AX,7120H
d. State the function of READY and INTR pin of 8086 2M
Ans. Ready: Each correct
It is used as acknowledgement from slower I/O device or memory. function 1M
It is Active high signal, when high; it indicates that the peripheral device is
ready to transfer data.
INTR:
This is a level triggered interrupt request input, checked during last clock
cycle of each instruction to determine the availability of request. If any
interrupt request is occurred, the processor enters the interrupt acknowledge
cycle.
 e. State the role Debugger in assembly language programming. 2M
Ans. Debugger: Debugger is the program that allows the extension of program in Explanation:
single step mode under the control of the user. 2M
The process of locating & correcting errors using a debugger is known as
Debugger.
Some examples of debugger are DOS debug command Borland turbo debugger
TD, Microsoft debugger known as code view cv, etc.…
f. List Assembler Directives of 8086. (Any 4) 2M
Ans DB Each ½ M
DW
SEGMENT
ENDS
PROC
ENDP .
EQU
LENGTH
OFFSET
PTR
EVEN
ORG
ASSUME
LABEL
MACRO
ENDM
g. Write assembly language program development steps. 2M
Ans 1. Defining the problem Correct steps:
2. Algorithm 2M
3. Flowchart
4. Initialization checklist
5. Choosing instructions
6. Converting algorithms to assembly language program

Q. Sub Answers Marking

No. Q. N Scheme
2
Attempt any Five 12 Total
Marks
a. Write the function of following pins of 8086: 4M
(i) BHE (ii) ALE (iii) READY (iv) RESET
Ans. i. BHE: BHE stands for Bus High Enable. It is available at pin 34 Each pin
and used to indicate the transfer of data using data bus D8-D15. function 1 M
This signal is low during the first clock cycle, thereafter it is
active.
ii. ALE: ALE stands for address Latch Enable, as address and data
bus are multiplexed; ALE is used to lock either Address or Data.
iii. READY: It is used as acknowledgement from slower I/O device
or memory. It is Active high signal, when high; it indicates that
the peripheral device is ready to transfer data.
iv. RESET: This pin requires the microprocessor to terminate its
present activity immediately.
 b. 4M
Describe memory segmentation in 8086 with suitable diagram.
Ans. Diagram: 2 M
Explanation:
2M

Memory Segmentation: The memory in 8086 based system is organized

as segmented memory. 8086 can access 1Mbyte memory which is divided
into number of logical segments. Each segment is 64KB in size and
addressed by one of the segment registers. The 4 segments register in BIU
hold the 16-bit starting address of 4 segments. CS holds program
instruction code. Stack segment stores interrupt & subroutine address. Data
segment stores data for program. Extra segment is used for string data.
➢ The number of address lines in 8086 is 20, 8086 BIU will send
20bit address, so as to access one of the 1MB memory locations.
➢ The four segment registers actually contain the upper 16 bits of the
starting addresses of the four memory segments of 64 KB each
with which the 8086 is working at that instant of time
➢ A segment is a logical unit of memory that may be up to 64
kilobytes. Starting address will always be changing. It will not be
fixed.
Note that the 8086 does not work the whole 1MB memory at any given
time. However, it works only with four 64KB segments within the whole
1MB memory.
c. 4M
Describe how an assembly language program is developed and
debugging using program developments tools.
Ans. Each
Assembly language development tools:
development
EDITOR: tool 1 M
It is a program which helps to construct assembly language program with a file
extension .asm, in right format so that the assembler will translate it to machine
language. It enables one to create, edit, save, copy and make modification in
source file.

Assembler:
Assembler is a program that translates assembly language program to the
correct binary code. It also generates the file called as object file with extension
.obj. It also displays syntax errors in the program, if any.

Linker:
It is a programming tool used to convert Object code (.OBJ) into executable
(.EXE) program. It combines, if requested, more than one separated assembled
modules into one executable module such as two or more assembly programs
or an assembly language with C program.

Debugger:
Debugger is a program that allows the execution of program in single step
mode under the control of the user. The errors in program can be located and
 corrected using a debugger. Debugger generates .exe file.

d. Draw pin diagram of 8086 and functional block diagram of 8086

4M
microprocessor.
Ans.

Each diagram
for 2 M

2M

e. What is pipelining? How it improves the processing speed.

4M
Ans. • In 8086, pipelining is the technique of overlapping instruction fetch
and execution mechanism.
• To speed up program execution, the BIU fetches as many as six Explanation
instruction bytes ahead of time from memory. The size of instruction 2 M,
prefetching queue in 8086 is 6 bytes. Diagram 2 M
• While executing one instruction other instruction can be fetched. Thus
it avoids the waiting time for execution unit to receive other
instruction.
 • BIU stores the fetched instructions in a 6 level deep FIFO . The BIU
can be fetching instructions bytes while the EU is decoding an
instruction or executing an instruction which does not require use of
the buses.
• When the EU is ready for its next instruction, it simply reads the
instruction from the queue in the BIU.
• This is much faster than sending out an address to the system memory
and waiting for memory to send back the next instruction byte or
bytes.
• This improves overall speed of the processor

f. Describe any 4 addressing modes of 8086 with one example each.

4M
Ans 1. Immediate addressing mode: Any 4 mode
An instruction in which 8-bit or 16-bit operand (data) is specified in with example 1
the instruction, then the addressing mode of such instruction is known M each
as Immediate addressing mode.
Example:
MOV AX,67D3H
2. Register addressing mode
An instruction in which an operand (data) is specified in general
purpose registers, then the addressing mode is known as register
addressing mode.
Example:
MOV AX,CX
3. Direct addressing mode
An instruction in which 16 bit effective address of an operand is
specified in the instruction, then the addressing mode of such
instruction is known as direct addressing mode.
Example:
MOV CL,[2000H]
4. Register Indirect addressing mode
An instruction in which address of an operand is specified in pointer
register or in index register or in BX, then the addressing mode is
known as register indirect addressing mode.
Example:
MOV AX, [BX]
5. Indexed addressing mode
 An instruction in which the offset address of an operand is stored in
index registers (SI or DI) then the addressing mode of such instruction
is known as indexed addressing mode.
DS is the default segment for SI and DI.
For string instructions DS and ES are the default segments for SI and
DI resp. this is a special case of register indirect addressing mode.
Example:
MOV AX, [SI]
6. Based Indexed addressing mode:
An instruction in which the address of an operand is obtained by
adding the content of base register (BX or BP) to the content of an
index register (SI or DI) The default segment register may be DS or
ES
Example:
MOV AX, [BX][SI]
7. Register relative addressing mode:
An instruction in which the address of the operand is obtained by
adding the displacement (8-bit or 16 bit) with the contents of base
registers or index registers (BX, BP, SI, DI). The default segment
register is DS or ES.
Example:
MOV AX, 50H[BX]
8. Relative Based Indexed addressing mode
An instruction in which the address of the operand is obtained by
adding the displacement (8 bit or 16 bit) with the base registers (BX or
BP) and index registers (SI or DI) to the default segment.
Example:
MOV AX, 50H [BX][SI]
g. Describe mechanism for generation of physical address in 8086 with
4M
suitable example.
Ans Explanation
2M
Any two
Advantages
2M

Fig.: Mechanism used to calculate physical address in 8086

As all registers in 8086 are of 16 bit and the physical address will be in 20
bits. For this reason the above mechanism is helpful.

Logical Address is specified as segment: offset

Physical address is obtained by shifting the segment address 4 bits to the left
and adding the offset address.

Thus the physical address of the logical address A4FB:4872 is:

A4FB0
+ 4872
---------------
A9822
OR
• i.e. Calculate physical Address for the given
CS= 3525H, IP= 2450H.