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ELECTRONICS-1-1

The document outlines the syllabus for a B.Sc. degree course in Digital Electronics at Sri Venkateswara University, covering topics such as number systems, Boolean algebra, combinational and sequential circuits, and memory devices. It includes detailed unit breakdowns, objectives, outcomes, and a model question paper for examination preparation. Additionally, it lists lab experiments to be conducted for practical understanding of digital electronics concepts.

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0% found this document useful (0 votes)
23 views4 pages

ELECTRONICS-1-1

The document outlines the syllabus for a B.Sc. degree course in Digital Electronics at Sri Venkateswara University, covering topics such as number systems, Boolean algebra, combinational and sequential circuits, and memory devices. It includes detailed unit breakdowns, objectives, outcomes, and a model question paper for examination preparation. Additionally, it lists lab experiments to be conducted for practical understanding of digital electronics concepts.

Uploaded by

ngunamtechvlsi
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SRI VENKATESWARA UNIVERSITY

B.Sc. DEGREE COURSE IN ELECTRONICS


FIRST YEAR - SECOND SEMESTER
(Revised Syllabus under CBCS w.e.f. 2020-21)

COURSE – 2: DIGITAL ELECTRONICS


Objectives:
 To understand the number systems, Binary codes and Complements.
 To understand the Boolean algebra and simplification of Boolean expressions.
 To analyze logic processes and implement logical operations using combinational logic
circuits.
 To understand the concepts of sequential circuits and to analyze sequential systems in
terms of state machines.
 To understand characteristics of memory and their classification.

UNIT – I (10hrs)
NUMBER SYSTEM AND CODES: Decimal, Binary, Hexadecimal, Octal. Codes: BCD,
Gray and Excess-3 codes- code conversions- Complements (1’s, 2’s,9’s and 10’s), Addition -
Subtraction using complement methods.

UNIT- II (14hrs)
BOOLEAN ALGEBRA AND THEOREMS: Boolean Theorems, De-Morgan’s laws. Digital
logic gates, NAND & NOR as universal gates. Standard representation of logic functions (SOP
and POS), Minimization Techniques (Karnaugh Map Method: 2,3&4 variables),
Implementation of logic functions with AND-OR-NOT logic, multilevel NAND & NOR gate
implementation.

UNIT-III (12hrs)
COMBINATIONAL DIGITAL CIRCUITS:
Adders-Half & full adder, Subtractor-Half and full subtractors, Parallel binary adder,
Magnitude Comparator, Multiplexers (4:1)) and Demultiplexers (1:4), Encoder (8-line-to-3-
line) and Decoder (3-line-to-8-line),Implementation of switching functions with MUX, IC-
logic families: TTL logic, CMOS Logic families (NAND&NOR Gates).

UNIT-IV (14hrs)
SEQUENTIAL DIGITAL CIRCUITS:
Flip Flops: S-R FF , J-K FF, T and D type FFs, Master-Slave FFs, Excitation tables, Registers:-
Serial In Serial Out and Parallel In and Parallel Out, Counters:Asynchronous&Synchronous-
Mod-8,Mod-10(Decade counter),Mod-16 counters &Ring counter.

UNIT-V (10hrs)
MEMORY DEVICES:
General Memory Operations, ROM, RAM (Static and Dynamic), PROM, EPROM, EEPROM,
EAROM, PLDs.
TEXT BOOKS:
1. M.Morris Mano, “ Digital Design “ 3rd Edition, PHI, New Delhi.
2. Ronald J. Tocci. “Digital Systems-Principles and Applications” 6/e. PHI.
New Delhi. 1999.(UNITS I to IV )
3. G.K.Kharate-Digital electronics-oxford university press
4. S.Salivahana & S. Arivazhagan-Digital circuits and design
5. Fundamentals of Digital Circuits by Anand Kumar

Reference Books :
1. Herbert Taub and Donald Schilling. “Digital Integrated Electronics” .
McGraw Hill. 1985.
2. S.K. Bose. “Digital Systems”. 2/e. New Age International. 1992.
3. D.K. Anvekar and B.S. Sonade. “Electronic Data Converters :
Fundamentals & Applications”. TMH. 1994.
4. Malvino and Leach. “ Digital Principles and Applications”. TMG Hill Edition.

Outcomes:-
 Develop a digital logic and apply it to solve real life problems.
 Analyze, design and implement combinational logic circuits.
 Classify different semiconductor memories.
 Analyze, design and implement sequential logic circuits.
SRI VENKATESWARA UNIVERSITY
B.Sc. DEGREE EXAMINATION IN ELECTRONICS
FIRST YEAR - SECOND SEMESTER
(Revised Syllabus under CBCS w.e.f. 2020-21)

DIGITAL ELECTRONICS
MODEL QUESTION PAPER
Time : 3 Hours Max. Marks : 75
Part-A
Answer any FIVE questions
Each question carries 5 Marks (Marks 5X5 = 25 Marks)
1. What are different types of number systems? Briefly explain binary system?
2. Convert the following:
(a) (B3 D8)16to decimal.
(b) (1993)10 to octal.
3. State and prove Demorgon’s theorems?
4. Discuss the termsSOP andPOS?
5. Explain the working of 4:1 mux (Multiplexer)?
6. Explain the working of D – type Flip-Flop with truth table?
7. Explain Half adder circuit using truth table?
8. Briefly explain PROM and EPROM?

PART-B
Answer all questions.
(Marks 5X10 = 50 Marks)

9. (a) Explain Gray and Excess -3 codes with suitable examples?


(or)
(b) Explain 2’s complement method of subtraction with a suitable example.

10. (a) Why NAND and NOR gates are called Universal gates? Explain by converting into
AND, OR and NOT gate.
(or)
(b) Simplify the Boolean function F(w,x,y,z)=∑(0,1,2,4,5,6,8,9,12,13,14).

11. (a) Describe the working of 8 - line to 3 - line Encoder with a neat diagram?
(or)
(b) Draw the circuit diagram TTL NAND gate and discuss its working.

12. (a) Explain the working of Serial - in and Serial - out shift register with a neat circuit diagram.
(or)
(b) Explain the working of Decode counter by using truth table and timing diagram.

13. (a) Explain Dynamic RAM operation with neat diagram.


(or)
(b) What is a PLD? Explain the working if PAL Circuit.
SRI VENKATESWARA UNIVERSITY
B.Sc. DEGREE COURSE IN ELECTRONICS
FIRST YEAR - SECOND SEMESTER
(Revised Syllabus under CBCS w.e.f. 2020-21)

ELECTRONICS LAB-2
(DIGITAL ELECTRONICS LAB)
LAB LIST:

1. Verification of IC-logic gates


2. Realization of basic gates using discrete components (resistor, diodes & transistor)
3. Realization of basic gates using Universal gates (NAND & NOR gates)
4. Verify Half adder and full adder using gates
5. Verify Half subtractor and full subtractor using gates.
6. Verify the truth table Multiplexer and demultiplexer.
7. Verify the truth table Encoder and decoder.
8. Verify the truth table of RS , JK, T-F/F using NAND gates
9. 4-bit binary parallel adder and subtractor using IC 7483
10. BCD to Seven Segment Decoder using IC -7447/7448

Lab experiments are to be done on breadboard and simulation software

(using multisim) and output values are to be compared and justified for variation.

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