University of Science and Technology

Nanotechnology Engineering Program

Prof. Wael Fikry Advanced Devices 2023

Problem Set 2
MOS Capacitor
1. The C-V characteristic exhibited by an MOS-C (assumed to be
ideal) is displayed in Figure 1
(a) Draw the MOS-C energy band diagram corresponding to
point (2) on the C-V characteristic.
(b) Draw the block charge diagram corresponding to point (1) on
the C-V characteristic.
(c) Roughly sketch the electric field inside the oxide and the
semiconductor as a function of position corresponding to Vg
point (2) on the C-V characteristic. .
-3 2
(d) If the area of the MOS-C gate is 3×10 cm , what is the oxide Figure 1
thickness Tox.
(e) Determine the maximum depletion width (xdm) for the given MOS-C
[(d) 0.104 μm & (e) 1.26 μm]
2. Consider the C-V curves shown in figure 2. For which
curve or curves is an equilibrium inversion layer present
when Vg > Vth ?
(a) Curve a
(b) Curve b
(c) Curve c
Vg
(d) Curves a and b Vth
(e) Curves b and c
Figure 2
(f) Curves a, b, and c

3. C-V curves derived from two MOS Cs with the same gate
area are compared in figure 3, the MOS structure
exhibiting the curve b has:
(a) A thinner oxide
(b) A lower silicon doping
(c) Both a thinner oxide and a lower doping
(d) A thicker oxide Vg
(e) A higher silicon doping Figure 3
(f) Both a thicker oxide and a higher doping

4. Calculate the flat-band voltage of an MOS device with Tox = 50 nm, qm= 4 eV, qs = 4.5eV and a uniform
positive oxide charge density of l016 cm-3. Assume ox = 4. [-0.558 V]

5. An Au (m = 5.1 V) gate MOS capacitor is fabricated on an n-silicon substrate ( = 4.05 V) with ND = 1015
cm-3. The thickness of the gate is 120 nm, and the charge density at the Si-SiO2 interface is 3x1011 cm-2.
(a) Calculate the flat-band voltage

1
 (b) Calculate the turn-on voltage
(c) Draw the energy band diagram of the system under thermal equilibrium and at the onset of strong
inversion.

6. Consider an n-channel MOS capacitor made on p-silicon substrate with NA = 1015 cm-3 and the oxide
thickness and surface charge densities the same as in problem 5. Calculate VFB, Vth and compare these
results with those of problem 5.

7. The experimental C-V characteristic shown in Figure 4 was

observed under the following conditions: The dc bias was
changed very slowly from point (1) to point (2). At point (2) the
Vg sweep rate was increased substantially. Upon arriving at
point (3) the sweep was stopped and the capacitance reached to
point (4). Use Figure 4 to select the correct answers
a) The depletion width at point (2) is
i. greater than the depletion width at point (3)
ii. equal to the depletion width at point (3) Vg
iii. smaller than the depletion width at point (3)
b) The capacitance increases from point (3) to (4) due to Figure 4
i. the generation of minority carrier -electrons
ii. the generation of minority carrier holes
iii. the recombination of majority carrier –electrons
iv. the recombination of majority carrier holes in the near–surface region

8. Show that the strong inversion layer capacitance can

be expressed approximately by Cinv  q Qinv 2kT
φm/ = 3.5 eV

𝛘/ = 3.33 eV
9. An energy band diagram for MOS structure with Efm
uniform doping silicon substrate under a specific gate
bias is shown in figure 5. The device is maintained at 1.5 eV
Ec
T = 300 oK , Tox= 0.2 μm, Qit = 0 and Ef - Ei = 0 at the
Efs
surface of the semiconductor. Use the energy band 0.29 eV
Ei
diagram and the specified values in answering the 0.56 eV
following questions. Ev
M O S
0 x
xd
9.1 The electrostatic potential (ψ) inside the Figure 5
semiconductor is as sketched:

2
 9.2 The electric field (  ) inside the semiconductor is roughly as sketched next:

9.3 Do equilibrium conditions prevail inside the semiconductor?

(a)Yes (b)No (c)Can’t be determined

9.4 On a semilog plot the eletron conentration versus position inside the semicondutor is roughly as
sketched next.

9.5 ND=??
(a) 3.97 x 1014 cm-3 (b) 7.29 x 1014 cm-3 (c) 1.18 x 1010 cm-3 (d) 1.20 x 1015 cm-3

9.6 Vg =
(a) 0.29V (b) -0.29V (c) 1.5 V (d) –1.5V (e) 0V

9.7 What is the voltage drop ( Vox ) across the oxide?

(a) –1.11V (b) 1.38V (c) – 0.83 V (d) –1.5V (e) 1.11V

9.8 What is the voltage drop ( s ) across the semiconductor?

(a) -0.98V (b) 0.29V (c) – 0.29 V (d) 0.83V (e) – 0.83V

9.9 What is the metal-semiconductor work function difference ( ms )?

(a) 0.46V (b) 0.1V (c) – 0.1V (d) – 0.39V

9.10 The total charge in the oxide must be very small. One comes to this conclusion because:
(a) There is no band bending in the metal.
(b)The fields in the oxide and the semiconductor have the same polarity at the oxide semiconductor
interface
(c) The bands in the oxide are a linear function of position
(d)The voltage drop a cross the oxide only slightly exceeds the voltage drop across the semiconductor.
9.11 Qox/Cox= ? [Note: If the energy band diagram is examined very carefully, one concludes Dox = Dsi at
the oxide-semiconductor interface.]
(a) 0V (b) -0.28V (c) 0.58V (d) 0.27V (e) 1.5V

9.12 The normalized small signal capacitance, C/Cox , at the applied bias point.
(a) 0.091 (b) 0.23 (c) 0.45 (d) 0.63 (e) 1.00

3
10. Figure 6 shows the energy band diagrams at room temperature for MOS structure with 1015 cm-3 uniform
doping silicon substrate at two different biasing conditions. The silicon dioxide thickness is 114 nm and
its electron affinity is 0.95 eV. Use the cited energy band diagram and the specified values in answering
the following questions.
(a) What is the flat band voltage?
(b) What is the voltage drop ( s ) across the semiconductor in Fig. 6-a?
(c) For the pictured condition in Fig. 6-a the MOS structure is
(i) accumulated (ii) depleted (iii) strongly inverted (iv) weakly inverted
(d) Calculate the depletion width of the device shown in Fig.6-a?
(e) Estimate the total charge in the oxide.
(f) What is the gate voltage at the onset of strong inversion?
(g) Calculate the silicon work function.
(h) Find the electric field intensity in the oxide at the two different biasing conditions shown in Fig.6.

(a) (b)

Figure 6

11. The C-V characteristics of an MOS capacitor (SiO2/Si) having a gate area of 104 μm is measured at
2

100 kHz and the following results are obtained.

V (Volts) -0.8 -0.6 -0.4 -0.2 0.0 0.2 0.4 0.6 0.8
C(pF) 3.45 3.45 3.45 3.1 2.84 2.63 2.45 2.45 2.45
From these measurements determine as accurate as you can:

(a) The substrate type.

(b) The oxide thickness.
(c) The flat-band voltage VFB
(d) The maximum depletion width xdm
(e) The substrate doping concentration.