Synchronous and Asynchronous Communication (Serial Devices)

Introduction to Serial Communication

Serial communication is a method of transmitting data bit by bit sequentially over a communication
channel or data bus. Unlike parallel communication, which sends multiple bits at once, serial
communication sends one bit at a time, making it simpler and cheaper in terms of wiring.

Serial communication can be of two types based on the synchronization technique used:

1. Synchronous Communication

2. Asynchronous Communication

Synchronous Communication
Synchronous communication is a data transmission method where both the sender and receiver
operate in perfect timing using a shared clock signal. This synchronization ensures accurate and
continuous data exchange, making it ideal for high-speed, timing-sensitive communication. Data is
sent in blocks or frames, with each bit aligned to clock pulses. The sender transmits bits in sync with
the clock, while the receiver samples them at the same rate, enabling efficient, reliable, and full-
duplex transmission.

Working of Synchronous Communication:

In synchronous communication, the sender and receiver share a common clock to maintain precise
timing. Data is transmitted in a continuous stream without start or stop bits, and synchronization is
maintained at the bit level. This enables faster and more efficient data transfer, especially for large
volumes.

How It Works:

There are two main methods for managing the clock signal:

• Separate Clock Line: A dedicated wire carries the clock signal alongside data (e.g., in SPI
communication).

• Embedded Clock: The clock is integrated into the data stream using encoding techniques like
Manchester coding, as seen in protocols such as HDLC and USB.

This tight synchronization ensures accurate and high-speed communication between devices.

Structure of Data Transmission

Unlike asynchronous communication (which uses start/stop bits), synchronous communication sends
continuous data without framing each byte. The data is grouped into frames, which may contain:

[Start of Frame] [Address] [Control][Data] [Error Check] [End of Frame]

• Start of Frame (SOF): Indicates the beginning of a data packet.

• Control/Address: Contains destination, commands, or flags.

• Data: The actual payload.

• Error Check: Often CRC (Cyclic Redundancy Check).

 • End of Frame (EOF): Marks end of transmission block.

Advantages

• High Speed: Since there's no start/stop bit per byte, more data can be transmitted in less
time.
• Efficiency: Better bandwidth utilization.
• Low Latency: Ideal for systems requiring low communication delays.
• Good for Large Transfers: Best for large blocks of data like audio/video streaming, memory
transfers.

Disadvantages

• Clock Synchronization Required: Needs extra hardware or protocol for maintaining

synchronization.
• More Complex Hardware: Circuits must support synchronization mechanisms.
• Less Flexible: Not ideal for low-volume or irregular data transmission.
• Sensitive to Clock Skew: If the clock signal is misaligned due to noise or propagation delay,
data can be corrupted.

Applications of Synchronous Communication

• Communication between microcontrollers and high-speed peripherals (sensors, displays).

• High-speed data acquisition systems.
• Networking (e.g., Ethernet, HDLC).
• Real-time industrial control.
• Streaming media (e.g., audio over I2S – Inter-IC Sound).

Asynchronous Communication:

Asynchronous communication is a type of serial transmission where data is sent one byte or
character at a time without a shared clock between the sender and receiver. Instead, each byte is
framed with control bits to mark its beginning and end, allowing independent and intermittent data
transfer.

Instead of synchronizing every bit with a clock signal, the sender adds control bits (start, stop, and
sometimes parity bits) around each data byte to help the receiver identify when data transmission
starts and ends.

This half-duplex transmission method is simple, flexible, and ideal for scenarios where data is sent
occasionally rather than continuously.

Asynchronous transmission is like sending individual text messages without knowing exactly when
the other person will read them.
How Asynchronous Communication Works:

In asynchronous communication, the sender and receiver first agree on a common baud rate (bits
per second) to ensure consistent timing. When idle, the communication line remains at a logic HIGH
level.

Transmission Process:

1. Start Bit: Communication begins when the sender pulls the line LOW to indicate the start of
a new data frame.
2. Data Bits: Typically, 5 to 9 bits representing the actual character.
3. Optional Parity Bit: Used for basic error checking.
4. Stop Bit(s): One or more bits set too HIGH to signal the end of the data frame.

The receiver detects the start bit, then uses an internal clock to sample each bit at expected
intervals. After reading the data, the optional parity bit, and the stop bit(s), the receiver
resynchronizes and waits for the next start bit. This method allows byte-by-byte transmission
without continuous clock synchronization.

Data Frame Format:

[Start Bit] [Data Bits] [Parity Bit (optional)] [Stop Bit(s)]

Example (8N1 format):

• 8 Data bits
• No Parity
• 1 Stop bit

Total = 1 (start) + 8 (data) + 1 (stop) = 10 bits per byte

Advantages

• Simple hardware: Only two wires needed – Tx (Transmit), Rx (Receive)

• Low cost: No need for clock synchronization circuitry
• Flexible: Can transmit at irregular intervals (not continuous)
• Good for short, occasional data: Ideal for keyboard, GPS modules, sensors, etc.

Disadvantages

• Lower efficiency: Due to overhead of start/stop/parity bits

 • Slower: Compared to synchronous communication
• Limited error detection: Basic parity only
• Requires precise baud rate matching between sender and receiver

Applications of Asynchronous Communication

• Communication between microcontrollers and PCs.

• Debugging via Serial Monitor in Arduino, STM32, etc.
• GPS Modules, Bluetooth modules, GSM modules.
• Legacy devices like modems, serial mice, etc.
UART - Universal Asynchronous Receiver Transmitter

UART is a hardware-based communication protocol used for asynchronous serial communication

between digital devices.

It is built into most microcontrollers and PCs and is one of the simplest and most commonly used
communication protocols in embedded systems.

Purpose of UART

UART converts parallel data from the CPU into serial form for transmission and serial data from
receiver into parallel form for processing. It allows full-duplex communication using only two main
lines:
• Tx (Transmit)
• Rx (Receive)

Functions of UART:
• Baud Rate Generator: Determines the transmission speed.
• Transmit Buffer (Tx): Temporarily holds data before sending.
• Receive Buffer (Rx): Collects incoming data.
• Parity Generator/Checker: For basic error checking.

UART Data Frame Format

Each data frame typically consists of:
[Start Bit] [Data Bits] [Parity Bit (optional)] [Stop Bit(s)]
Example: 8N1 Format
• 8 data bits
• N = No parity
• 1 stop bit
Total: 1 + 8 + 1 = 10 bits per character
Explanation of Each Bit
• Start Bit (1 bit): Indicates start of transmission (line goes LOW).
• Data Bits (5–9 bits): Actual payload (usually 8 bits).
• Parity Bit (optional): For simple error detection (Even/Odd).
• Stop Bit(s) (1 or 2 bits): Signals end of data frame (line goes HIGH).

Functional Block Diagram

The functional block diagram of a typical UART comprises several key components, each playing a
crucial role in data transmission and reception.
1. Baud Rate Generator
• Purpose: Generates timing signals to control the rate of data transmission and reception.
• Functionality: Divides the system clock to produce the desired baud rate, ensuring
synchronization between the transmitter and receiver.
2. Transmit Buffer (Holding Register)
• Purpose: Temporarily holds data from the CPU before transmission.
• Functionality: Acts as an interface between the CPU and the transmit shift register, allowing
the CPU to load data for transmission.
3. Transmit Shift Register
• Purpose: Converts parallel data from the transmit buffer into serial form.
 • Functionality: Adds framing bits (start, optional parity, stop) to the data and shifts it out bit
by bit through the TX line.
4. Receive Shift Register
• Purpose: Receives serial data bit by bit from the RX line.
• Functionality: Removes framing bits and converts serial data into parallel form for the receive
buffer
5. Receive Buffer (Holding Register)
• Purpose: Stores received parallel data before it's read by the CPU.
• Functionality: Acts as an interface between the receive shift register and the CPU, allowing
the CPU to read incoming data.
6. Control Logic
• Purpose: Manages the operation of the UART based on control signals.
• Functionality: Handles enabling/disabling of transmitter and receiver, parity selection, stop
bit configuration, and interrupt generation.
7. Status Registers
• Purpose: Provide information about the UART's current state.
• Functionality: Indicate conditions like transmit buffer empty, receive buffer full, parity errors,
framing errors, and overrun errors.

Applications of UART

• Microcontroller to PC communication
• Bluetooth/GSM/GPS modules
• Debugging using Serial Monitors (e.g., Arduino Serial Monitor)
• Bootloaders for firmware flashing
• Sensor communication in IoT systems
Advantages

• Simple and low-cost

• Requires only 2 data lines
• Widely supported in microcontrollers
• Can operate reliably over short to medium distances
Disadvantages

• Lower speed compared to synchronous protocols

• No clock signal – risk of timing mismatches
• No built-in addressing for multi-device communication
• Limited error detection (only parity bit)

HDLC – High-Level Data Link Control

HDLC is a bit-oriented, synchronous data link layer protocol used for transmitting data over serial
links. It was developed by ISO and is commonly used in WAN (Wide Area Network) communication
systems.

It provides reliable, error-free data transfer by using framing, error checking, and flow control.

Key Characteristics

• Synchronous Communication: Requires clock synchronization between sender and receiver

to maintain accurate data timing.
• Framing and Control: Uses special flags (01111110) to mark frame boundaries and includes
control fields to manage flow and acknowledgments.
• Error Detection: Employs Cyclic Redundancy Check (CRC) to detect transmission errors.
• Duplex Support: Operates in both full-duplex and half-duplex modes depending on the link
configuration.
• Transmission Flexibility: Suitable for point-to-point and multipoint communication links,
making it versatile in network topologies.

Frame Structure of HDLC

An HDLC frame has the following structure:

The fields of a HDLC frame are −

• Flag − It is an 8-bit sequence that marks the beginning and the end of the frame. The bit
pattern of the flag is 01111110.

• Address − It contains the address of the receiver. If the frame is sent by the primary station,
it contains the address(es) of the secondary station(s). If it is sent by the secondary station, it
contains the address of the primary station. The address field may be from 1 byte to several
bytes.

• Control − It is 1- or 2-bytes containing flow and error control information.

• Payload − This carries the data from the network layer. Its length may vary from one network
to another.

• FCS − It is a 2 byte or 4 bytes frame check sequence for error detection. The standard code
used is CRC (cyclic redundancy code)
Types of HDLC Frames

HDLC uses 3 types of frames, each with a specific role in communication:

1. Information Frames (I-frames): I-frames or Information frames carry user data from the
network layer. They also include flow and error control information that is piggybacked on
user data. The first bit of control field of I-frame is 0.

2. Supervisory Frames (S-frames): S-frames or Supervisory frames do not contain information

field. They are used for flow and error control when piggybacking is not required. The first
two bits of control field of S-frame is 10.

o Common types include:

▪ RR (Receive Ready): Ready to receive more frames.

▪ RNR (Receive Not Ready): Temporarily cannot receive data.

▪ REJ (Reject): Requests retransmission from a specific frame.

▪ SREJ (Selective Reject): Requests retransmission of only the specific frame

with an error.

3. Unnumbered Frames (U-frames):

o Used for control purposes like establishing or terminating a connection.

o It may contain an information field, if required. The first two bits of control
field of U-frame is 11.
o Carry commands and responses such as:

▪ SABM (Set Asynchronous Balanced Mode): Start communication.

▪ DISC (Disconnect): Terminate the connection.

▪ UA (Unnumbered Acknowledgment): Acknowledge unnumbered commands.

These frames together ensure reliable, controlled, and structured communication between HDLC-
connected devices.
Bit Stuffing (Transparency Technique)

• HDLC uses a flag 01111110 to mark the start and end of a frame.

• To prevent this flag from accidentally appearing in data, HDLC uses bit stuffing.

• Rule: After five consecutive 1s in the data, insert a 0.

• Receiver: Removes the 0 after every five 1s.

• This keeps data and control (flag) distinct and unambiguous.

Example:
Original data: 01111110 → Stuffed: 011111010

Working Principle of HDLC

1. Framing: The sender formats the data into HDLC frames, adding control fields.

2. CRC and Flag Bits: A CRC is added for error detection, and flag bits (01111110) are placed at
the beginning and end of each frame.

3. Synchronous Transmission: The framed data is transmitted synchronously using a shared

clock between sender and receiver.

4. Reception and Validation: The receiver detects the flag bits, extracts the frame, and
validates it using the CRC.

5. Acknowledgment: The receiver sends back an S-frame or U-frame to acknowledge receipt or

control the communication

Modes of HDLC Operation:

1. Normal Response Mode (NRM):

Used in master-slave setups where the secondary device can only transmit when allowed by
the primary. Common in older or unidirectional systems.

2. Asynchronous Response Mode (ARM):

The secondary device can initiate transmission but only after getting permission from the
primary. Offers more flexibility than NRM.

3. Asynchronous Balanced Mode (ABM):

A peer-to-peer mode where both devices can send and receive frames independently. It is
the most commonly used mode due to its efficiency and balanced control.

Error Control in HDLC –

1. CRC Check: Errors are detected using Cyclic Redundancy Check (CRC) included in the Frame
Check Sequence (FCS) field.

2. Acknowledgment: The receiver sends RR (Receive Ready) frames to acknowledge successful

reception.

3. Retransmission: If an error is detected or a REJ (Reject) frame is received, the sender

retransmits the affected frame.
 4. Sequence Numbers: Frames include sequence numbers to track order and ensure reliable,
in-sequence delivery.

Advantages of HDLC

Supports Full and Half-Duplex: Flexible communication based on system requirements.

Reliable Data Delivery: Ensures accuracy with built-in error detection and flow control
mechanisms.
Versatile Network Support: Works efficiently over both point-to-point and multipoint links.
Bit-Oriented Protocol: More efficient than character-based protocols due to compact and
flexible framing.

Disadvantages of HDLC

Complex Frame Processing: Requires more logic for handling framing, control, and error checks.
Bit Stuffing Overhead: Increases data size and processing time when many '1's occur in data.
Inefficient for Small Data Packets: Frame structure and overhead make it less suitable for short
or infrequent transmissions.

Applications of HDLC – Key Points:

WAN Protocols: Forms the basis for protocols like Frame Relay, ISDN, X.25, and PPP (which uses
HDLC-like framing).
Telecommunications: Used in satellite links and router-to-router communications for reliable
synchronous transmission.
Embedded Systems: Ideal for synchronous serial communication in microcontroller-based
systems.
Point-to-Point Communication: Ensures efficient and error-checked data transfer between two
devices.
Multipoint Networks: Supports communication across multiple devices sharing a common
channel.

{More content: https://www.tutorialspoint.com/high-level-data-link-control-hdlc}

Parallel Port Devices

Parallel port communication is a method of data transfer where multiple bits (typically 8, 16, or 32)
are transmitted simultaneously over multiple data lines, allowing for high-speed communication over
short distances. It is commonly used in computers and microcontrollers to connect external devices.

Key Features

1. Communication Type: Transfers multiple bits simultaneously using parallel lines.

2. Speed: Faster than serial communication over short distances.

3. Cable Size: Requires bulkier cables due to multiple data lines.

4. Direction: Can be unidirectional (standard) or bidirectional (enhanced modes).

5. Example Devices: Commonly used with printers, scanners, and external storage devices.

Sure! Here's a slightly more detailed yet still concise version:

Types of Parallel Ports

1. SPP (Standard Parallel Port):

The earliest version of the parallel port, designed for printers. It supports only unidirectional
data flow (PC to device) and has limited speed, making it suitable for simple output tasks.

2. EPP (Enhanced Parallel Port):

Introduced to improve speed and functionality, EPP supports bidirectional communication. It
allows faster data transfer and is ideal for connecting devices like external hard drives,
scanners, and other peripherals.

3. ECP (Extended Capabilities Port):

The most advanced type, ECP supports bidirectional data transfer, along with DMA (Direct
Memory Access) and data compression. It's designed for high-speed communication with
multifunction devices like printers with scanning and faxing features.

Advantages of Parallel Port Communication – Key Points:

High-Speed Transfer: Allows fast data transfer by sending multiple bits simultaneously — ideal
for bulk data.
Easy Microcontroller Integration: Simple and effective for interfacing with microcontrollers in
embedded systems.
Device Compatibility: Well-suited for connecting printers, scanners, and other parallel-interface
peripherals.

Disadvantages of Parallel Port Communication – Key Points:

Short Range: Effective only over short distances due to signal degradation.
Bulky Setup: Requires thick, multi-wire cables, making it less compact.
Obsolete Technology: Largely replaced by USB and other modern interfaces in current systems.