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L5300AH7

The L5300AH7 is a 5V low dropout linear regulator with a maximum input voltage of 40V and a current capability of 300mA. It features low quiescent current, thermal shutdown, and programmable reset functions, making it suitable for microprocessor control applications. The device operates over a wide temperature range and requires only a low-value ceramic capacitor for stability.

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0% found this document useful (0 votes)
12 views23 pages

L5300AH7

The L5300AH7 is a 5V low dropout linear regulator with a maximum input voltage of 40V and a current capability of 300mA. It features low quiescent current, thermal shutdown, and programmable reset functions, making it suitable for microprocessor control applications. The device operates over a wide temperature range and requires only a low-value ceramic capacitor for stability.

Uploaded by

fs motherboard
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
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L5300AH7

5 V low drop voltage regulator

Features
Max DC supply voltage Vs 40 V
Max output voltage tolerance ΔV0 +/-2 %
Max dropout voltage Vdp 500 mV
Output current I0 300 mA
5 µA(1) GA P GC FT00135
Quiescent current Iqn
55 µA(2) HPAK
1. Typical value with regulator disabled
2. Typical value with regulator enabled
Description
■ Operating DC supply voltage range 5.6 V to L5300AH7 is a low dropout linear regulator with
40 V microprocessor control functions such as power
■ Low dropout voltage on reset, low voltage reset, ON/OFF control. In
■ 300 mA current capability addition, only low value ceramic capacitor is
■ Low quiescent current required for stability (above or equal 220 nF).
■ Very low consumption mode Typical quiescent current is 60 µA at output
■ Precision output voltage 5 V +/-2% current equal to 0 and enable high. It drops to
■ Reset circuit sensing the output voltage 10 µA in “not enabled” mode.
■ Programmable reset pulse delay with external On chip trimming results in high output voltage
capacitor accuracy (2%). Accuracy is kept over wide
■ Thermal shutdown and short circuit protection temperature range, line and load variation.
■ Wide temperature range (Tj = -40°C to 150°C)
The maximum input voltage is 40 V. The max
■ Enable input for enabling / disabling the voltage
output current is internally limited. Internal
regulator
temperature protection disables the voltage
regulator output.

Table 1. Device summary


Order codes
Package
Tube Tape and reel
HPAK L5300AH7 L5300AH7TR

February 2012 Doc ID 15476 Rev 11 1/23


www.st.com 1
Contents L5300AH7

Contents

1 Block diagram and pins description . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

2 Electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.1 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.2 Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.3 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
2.4 Electrical characteristics curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

3 Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
3.1 Voltage regulator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
3.2 Reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
3.3 Enable . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

4 Package and PC board thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . 16


4.1 HPAK thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

5 Package and packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19


5.1 ECOPACK® . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
5.2 HPAK mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

6 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

2/23 Doc ID 15476 Rev 11


L5300AH7 List of tables

List of tables

Table 1. Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1


Table 2. Pins description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Table 3. Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Table 4. Thermal data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Table 5. General . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Table 6. Reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Table 7. Enable. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Table 8. Thermal parameter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Table 9. HPAK mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Table 10. Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

Doc ID 15476 Rev 11 3/23


List of figures L5300AH7

List of figures

Figure 1. Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5


Figure 2. Configuration diagram (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Figure 3. Output voltage vs Tj . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Figure 4. Output voltage vs VS. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Figure 5. Output voltage vs VEn . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Figure 6. Drop voltage vs output current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Figure 7. Current consumption vs output current. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Figure 8. Current consumption vs output current (at light load condition) . . . . . . . . . . . . . . . . . . . . . 10
Figure 9. Current consumption vs input voltage (IO = 0.1 mA) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Figure 10. Current consumption vs input voltage (IO = 100 mA) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Figure 11. Current limitation vs Tj . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Figure 12. Current limitation vs input voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Figure 13. Short-circuit current vs Tj . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Figure 14. Short-circuit current vs input voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Figure 15. VEn_high vs Tj . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Figure 16. VEn_low vs Tj . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Figure 17. VRhth vs Tj . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Figure 18. VRlth vs Tj . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Figure 19. Icr vs Tj . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Figure 20. Idr vs Tj . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Figure 21. Application schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Figure 22. Stability region . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 23. Maximum load variation response . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 24. Reset time diagram. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 25. PC board. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Figure 26. Rthj-amb vs PCB copper area in open box free air condition . . . . . . . . . . . . . . . . . . . . . . . 16
Figure 27. HPAK thermal impedance junction ambient single pulse . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Figure 28. Thermal fitting model of a single-channel HSD in HPAK . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Figure 29. HPAK dimension. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

4/23 Doc ID 15476 Rev 11


L5300AH7 Block diagram and pins description

1 Block diagram and pins description

Figure 1. Block diagram

9V 9R

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5HV

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Figure 2. Configuration diagram (top view)

      

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Doc ID 15476 Rev 11 5/23


Block diagram and pins description L5300AH7

Table 2. Pins description


N° Name Function

1 VS Supply voltage, block directly to GND on the IC with a capacitor.


Enable input. A high signal switches the regulator ON. Connect to
2 En
VS if not needed.
Reset output. Internally connected to Vo through a 20 KΩ pull up
3 Res resistor. This pin is pulled low when Vo < Vo_th. Keep open if not
needed.

4 GND Ground reference.

Reset delay. Connect an external capacitor between Vcr pin and


5 Vcr
ground to adjust the reset delay time. Keep open if not needed.
6 Vos Output voltage sensing: this pin must be connected to Vo.
5 V regulated output. Block to GND with a ceramic capacitor
7 Vo
(≥ 220 nF for regulator stability).

6/23 Doc ID 15476 Rev 11


L5300AH7 Electrical specifications

2 Electrical specifications

2.1 Absolute maximum ratings


Stressing the device above the rating listed in Table 3: Absolute maximum ratings may
cause permanent damage to the device. These are stress ratings only and operation of the
device at these or any other conditions above those indicated in the Operating sections of
this specification is not implied. Exposure to Absolute Maximum Rating conditions for
extended periods may affect device reliability.

Table 3. Absolute maximum ratings


Symbol Parameter Value Unit

Vsdc DC supply voltage -0.3 to 40 V


Isdc Input current Internally limited
Vodc DC output voltage -0.3 to 6 V
Iodc DC output current Internally limited
Vod Res Open drain output voltage Res -0.3 to VVodc + 0.3 V
Iod Res Open drain output current Res Internally limited
Vcr Vcr voltage -0.3 to VVo + 0.3 V
VEn Enable input -0.3 to 40 V
Tj Junction temperature -40 to 150 °C
VESD HBM ESD HBM voltage level (HBM-MIL STD 883C) +/- 2 kV
VESD CDM ESD CDM voltage level (CDM AEC-Q100-011) +/- 750 V

2.2 Thermal data


m

Table 4. Thermal data


Symbol Parameter Value Unit

Rthj-case Thermal resistance junction to case 4.8 °C/W


Rthj-amb Thermal resistance junction to ambient 45(1) K/W
1. The values quoted are for PCB 77 mm x 86 mm x 1.6 mm, FR4, double layer with thermal vias (one copper
heatsink layer, thickness 0.070 mm, area 8 cm2).

Doc ID 15476 Rev 11 7/23


Electrical specifications L5300AH7

2.3 Electrical characteristics


Values specified in this section are for VS = 5.6 V to 31 V, Tj = -40 °C to 150 °C, unless
otherwise stated.

Table 5. General
Pin Symbol Parameter Test condition Min Typ Max Unit

VS = 8 to 18 V
Vo Vo_ref Output voltage 4.9 5.0 5.1 V
IO = 8 to 300 mA
VS = 5.6 to 31 V
Vo Vo_ref Output voltage 4.85 5.0 5.15 V
IO = 8 to 300 mA
VS = 5.6 to 31 V
Vo Vo_ref Output voltage 4.75 5.0 5.25 V
IO = 0.1 mA to 8 mA
Vo Ishort Short circuit current VS = 13.5 V 0.8 1.8 2.6 A
Vo Ilim Output current limitation(1) VS = 13.5 V 0.6 1.6 2.5 A
VS = 6 V to 28 V
VS, Vo Vline Line regulation voltage 40 mV
IO = 50 mA
VS = 13.5 V
IO = 8 mA to 300 mA 40 mV
Vo Vload Load regulation voltage Tj = 25 °C
VS = 8 V to 18 V
55 mV
IO = 8 mA to 300 mA
VS, Vo Vdp Drop voltage(2) IO = 300 mA 500 mV
VS, Vo SVR Ripple rejection fr = 100 Hz(3) 60 dB
Normal consumption
Vo Ioth_H 8 mA
mode output current
Very low consumption
Vo Ioth_L 1.1 mA
mode output current
Output current switching VS = 13.5 V,
Vo Ioth_Hyst 0.8 mA
threshold hysteresis Tj = 25 °C
Current consumption with
VS = 13.5 V,
VS, Vo Iqs regulator disabled 5 10 µA
En = low
Iqs = IVs – IO
Current consumption with VS = 13.5 V,
VS, Vo Iqn_1 regulator enabled IO < 1 mA, 55 80 µA
Iqn_1 = IVs – IO En = high
Current consumption with VS = 13.5 V,
VS, Vo Iqn_300 regulator enabled IO = 300 mA, 3 4.2 mA
Iqn_300 = IVs – IO En = high
Thermal protection
— Tw 150 190 °C
temperature
Thermal protection
— Tw_hy 10 °C
temperature hysteresis
1. Measured output current when the output voltage has dropped 100 mV from its nominal value obtained at
13.5 V and Io = 75 mA.

8/23 Doc ID 15476 Rev 11


L5300AH7 Electrical specifications

2. VS - Vo measured dropout when the output voltage has dropped 100 mV from its nominal value obtained at
13.5 V and Io = 75 mA.
3. Guaranteed by design

Table 6. Reset
Pin Symbol Parameter Test condition Min Typ Max Unit

Rext = 5 kΩ
Res VRes_l Reset output low voltage 0.4 V
Vo > 1 V
Reset output high leakage
Res IRes_lkg VRes = Vo 1 µA
current
Res RRes Pull up internal resistance Versus Vo 10 20 40 kΩ
Vo out of regulation Below
Res Vo_th Vo decreasing 6% 8% 10%
threshold Vo_ref
Vcr VRlth Reset timing low threshold VS = 13.5 V 16% 19% 22% Vo_ref
Vcr VRhth Reset timing high threshold VS =13.5 V 47% 50% 53% Vo_ref
Vcr Icr Charge current VS = 13.5 V 10 20 30 µA
Vcr Idr Discharge current VS = 13.5 V 10 20 30 µA
Res Trr Reset reaction time Vo = Vo_th - 100 mV 2 µs
VS = 13.5 V,
Res Trd Reset delay time 2 4 6 ms
Ctr = 1 nF

Table 7. Enable
Pin Symbol Parameter Test condition Min. Typ. Max. Unit

En VEn_low En input low voltage 1 V


En VEn_high En input high voltage 3 V
En VEn_hyst En input hysteresis 500 mV
En I_leak Pull down current VEn = 5 V 3 10 µA

Doc ID 15476 Rev 11 9/23


Electrical specifications L5300AH7

2.4 Electrical characteristics curves

Figure 3. Output voltage vs Tj Figure 4. Output voltage vs VS

6O?REF6 6O?REF6
 

 6S  6 
 )O  M!
 
 4C #
 
 )O  M!
 
 

                   
4J # 6S6
'!0'#&4
'!0'#&4

Figure 5. Output voltage vs VEn Figure 6. Drop voltage vs output current

6DP6



 4I #


4I #



       
)OM!
'!0'#&4
'!0'#&4

Figure 7. Current consumption vs output Figure 8. Current consumption vs output


current current (at light load condition)

)QNM!







6S  6

%N  (IGH
 4J   #



       
)OM!
'!0'#&4
'!0'#&4

10/23 Doc ID 15476 Rev 11


L5300AH7 Electrical specifications

Figure 9. Current consumption vs input Figure 10. Current consumption vs input


voltage (IO = 0.1 mA) voltage (IO = 100 mA)

)QN—!
)QNM!

 
 
%N  (IGH  %N  (IGH

4J #  4J #
 
 
 



 
 
           
          
)OM! )OM!
'!0'#&4
'!0'#&4

Figure 11. Current limitation vs Tj Figure 12. Current limitation vs input voltage

)LIMM! )LIMM!
 
 
  4J   #
 6S  6 



 
 
  4J   #
 
 
          
       
4J # '!0'#&4
6S6 '!0'#&4

Figure 13. Short-circuit current vs Tj Figure 14. Short-circuit current vs input


voltage

)SHORTM!
)SHORTM!

 
 
 6S  6 
 4J   #
 
 
 
 
 4J   #
 
          
4J #        
'!0'#&4
6S6 '!0'#&4

Doc ID 15476 Rev 11 11/23


Electrical specifications L5300AH7

Figure 15. VEn_high vs Tj Figure 16. VEn_low vs Tj

6EN?HIGH6 6EN?LOW6

 


 6S  6 TO 6 
 6S  6 TO 6
 
 
 
 
 
 
 
          
4J #          
'!0'#&4 4J # '!0'#&4

Figure 17. VRhth vs Tj Figure 18. VRlth vs Tj

6RHTH6O?REF 6RLTH6O?REF

 
 
 
 6S  6 TO 6  6S  6 TO 6
 
 
 
 
 
 
 
         
         
4J #
'!0'#&4 4J # '!0'#&4

Figure 19. Icr vs Tj Figure 20. Idr vs Tj

)DR—!
,FU —$






9V 9WR9  6S  6 TO 6

 
 
 
 



 
          
7M ƒ&          
'!0'#&4 4J # '!0'#&4

12/23 Doc ID 15476 Rev 11


L5300AH7 Application information

3 Application information

3.1 Voltage regulator


The voltage regulator uses a P-channel MOS transistor as a regulating element. With this
structure a very low dropout voltage at current up to 300 mA is obtained. The output voltage
is regulated up to input supply voltage of 40 V. The high-precision of the output voltage (2%)
is obtained with a pre-trimmed reference voltage. The voltage regulator automatically adapts
its own quiescent current to the output current level. In light load conditions the quiescent
current goes down to 55 µA only (low consumption mode). This procedure features a certain
hysteresis on the output current (see Figure 8). Short-circuit protection to GND and a
thermal shutdown are provided.

Figure 21. Application schematic

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The input capacitor C1 ≥ 100 µF is necessary as backup supply for negative pulses which
may occur on the line. The second input capacitor C2 ≥ 220 nF is needed when the C1 is too
distant from the VS pin and it compensates smooth line disturbances. The C0 ceramic
capacitor, connected to the output pin, is for bypassing to GND the high-frequency noise
and it guarantees stability even during sudden line and load variations. Suggested value is
C0 = 220 nF with ESR ≥ 100 mΩ.
Stability region is reported in Figure 22.

Doc ID 15476 Rev 11 13/23


Application information L5300AH7

Figure 22. Stability region





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Note:
The curve which describes the minimum ESR is derived from characterization data on the regulator with connected ceramic
capacitors which feature low ESR values (at 100 kHz). Any capacitor with further lower ESR than the given plot value must be
evaluated in each and every case.

Figure 23. Maximum load variation response

Vo = 50 mV/div
Io = 100 mA/div

VS = 13.5 V
Io = 8 to 300 mA
Tc = 25 °C
Co = 220 nF

GAPGCFT00128

14/23 Doc ID 15476 Rev 11


L5300AH7 Application information

3.2 Reset
The reset circuit monitors the output voltage Vo. If the output voltage becomes lower than
Vo_th then Res goes low with a delay time (trr). When the output voltage becomes higher than
Vo_th then Res goes high with a delay time Trd. This delay is obtained by 512 periods of
oscillator. The oscillator period is given by:

Equation 1
Tosc = [(VRhth-VRlth) x Ctr] / Icr + [(VRhth-VRlth) x Ctr] / Idr

and reset pulse delay Trd is given by:

Equation 2
trd = 32 x Tosc

Where:
Icr = 20 µA is an internally generated charge current,
Idr = 20 µA is an internally generated discharge current,
VRhth = 2.5V (typ) and VRlth = 0.95V (typ) are two voltage thresholds,
Ctr is an external capacitor put between Vcr pin and GND.

Figure 24. Reset time diagram

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3.3 Enable
L5300AH7 is also provided by an enable input, a high signal switches the regulator ON. In
standby mode the output is disabled and the current consumption of the device (quiescent
current) is less than 10 µA.

Doc ID 15476 Rev 11 15/23


Package and PC board thermal data L5300AH7

4 Package and PC board thermal data

4.1 HPAK thermal data


Figure 25. PC board

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Note:
Layout condition of Rth and Zth measurements (Board finish thickness 1.6 mm +/- 10 %; Board double layer; Board dimension
78 mm x 86 mm; Board Material FR4; Cu thickness 0.070 mm (front and back side); Thermal vias separation 1.2 mm; Thermal
via diameter 0.3 mm +/- 0.08 mm; Cu thickness on vias 0.025 mm; Footprint dimension 6.4 mm x 7 mm).

Figure 26. Rthj-amb vs PCB copper area in open box free air condition

RTHjamb

90

80

70
RTHjamb
60

50

40

30
0 2 4 6 8 10
GAPGCFT00131

16/23 Doc ID 15476 Rev 11


L5300AH7 Package and PC board thermal data

Figure 27. HPAK thermal impedance junction ambient single pulse

ZTH (°C/W)
100

Cu=8 cm2
Cu=2 cm2
Cu=f oot print

10

1
0.01 0.1 1 10 100 1000
Time (s)
GAPGCFT00132

Figure 28. Thermal fitting model of a single-channel HSD in HPAK

GAPGCFT 00133

Note:
The fitting model is a simplified thermal tool and is valid for transient evolutions where the embedded protections (power
limitation or thermal cycling during thermal shutdown) are not triggered.

Doc ID 15476 Rev 11 17/23


Package and PC board thermal data L5300AH7

Equation 3: pulse calculation formula

Z THδ = R TH ⋅ δ + Z THtp ( 1 – δ )

where δ = tP/T

Table 8. Thermal parameter


Area/island (cm2) Footprint 4 8

R1 (°C/W) 3

R2 (°C/W) 4

R3 (°C/W) 6

R4 (°C/W) 7

R5 (°C/W) 28 18.5 11

R6 (°C/W) 31 22 14

C1 (W.s/°C) 0.0005

C2 (W.s/°C) 0.001

C3 (W.s/°C) 0.005

C4 (W.s/°C) 0.05

C5 (W.s/°C) 0.8 2 3

C6 (W.s/°C) 3 6 9

18/23 Doc ID 15476 Rev 11


L5300AH7 Package and packing information

5 Package and packing information

5.1 ECOPACK®
In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK® packages, depending on their level of environmental compliance. ECOPACK®
specifications, grade definitions and product status are available at: www.st.com.
ECOPACK® is an ST trademark.

5.2 HPAK mechanical data


Figure 29. HPAK dimension

GAPGCFT00134

Doc ID 15476 Rev 11 19/23


Package and packing information L5300AH7

Table 9. HPAK mechanical data


Millimeter
Dim
Nom Min Max

A 2.20 2.40
A1 0.90 1.10
A1 0.03 0.23
b 0.45 0.60
b4 5.20 5.40
c 0.45 0.60
c2 0.48 0.60
D 6.00 6.20
D1 5.10
E 6.40 6.60
E1 5.20
e 0.85
e1 1.60 1.80
e2 3.30 3.50
e3 5.00 5.20
H 9.35 10.10
L 1
(L1) 2.80
L2 0.80
L4 0.60 1.00
R 0.20
V2 0° 8°

20/23 Doc ID 15476 Rev 11


L5300AH7 Revision history

6 Revision history

Table 10. Document revision history


Date Revision Changes

09-Aug-2007 1 Initial release.


Changed features table on the cover page:
- quiescent current with regulator disabled changed from 10 to 5 µA.
15-Oct-2007 2
- quiescent current with regulator enabled changed from 60 to 55 µA.
Table 5: General - Added typical value of Iqs and Iqn_1 parameters.
Changed features table on the cover page
Table 5: General
– Vo_ref: deleted row and added 3 new rows
Table 6: Reset
– IRes_lkg: deleted Test condition
– Vo_th: deleted IO = 1 to 300 mA and VS = 5.6 to 31V, added “Vo
12-Mar-2009 3 decreasing“ for test condition
– VRlth: changed min/typ/max values
– Trd: changed min/typ/max values
Updated Table 7: Enable
Section 3.2: Reset
– trd: changed coefficient
– VRlth: changed coefficient
Changed status from target specification to preliminary data.
Updated following tables:
– Table 4: Thermal data
23-Jul-2010 4
– Table 5: General
Added Section 2.4: Electrical characteristics curves.
Added Chapter 4: Package and PC board thermal data
Updated Figure 27: HPAK thermal impedance junction ambient
02-Sep-2010 5
single pulse
15-Sep-2010 6 Updated Table 4: Thermal data
12-Oct-2010 7 Updated Section 3.1: Voltage regulator

Doc ID 15476 Rev 11 21/23


Revision history L5300AH7

Table 10. Document revision history (continued)


Date Revision Changes

Updated following tables:


Table 2: Pins description:
– Updated pins sequence
Table 3: Absolute maximum ratings:
– Isdc: changed symbol from IVsdc
– Iodc: changed symbol from IVodc
Table 5: General:
– Ishort: changed min/typ/max value
– Ilim: changed min/typ/max value, changed parameter
09-Mar-2011 8
– Vline: changed test condition
– Iqn_300: changed typ value
– Updated tablefootnote
Table 6: Reset:
– VRes_l: changed test condition
– VRes_lkg: added test condition
Table 7: Enable:
– Ileak: changed typ value
Updated Section 3.2: Reset
Table 9: HPAK mechanical data:
18-Nov-2011 9
– b: updated values
26-Jan-2012 10 Updated Figure 22: Stability region on page 14.
07-Feb-2012 11 Modified Figure 22: Stability region on page 14.

22/23 Doc ID 15476 Rev 11


L5300AH7

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