Mapping

Mapping in computer architecture refers to the process of associating logical addresses

(also known as virtual addresses) used by programs with physical addresses in
computer memory.
This mapping is essential for the operating system to manage memory efficiently,
ensuring that programs can access the correct memory locations without conflicts or
unauthorized access.
 Mapping Instruction

A unique type of branch exists when a microinstruction defines a branch to the first word
in control memory where a micro-program routine for instruction is placed. The status bits
for this type of branch are the bits in the operation code part of the instruction
It has an operation code of four bits which can specify up to 16 distinct instructions.
It can consider that the control memory has 128 words, needing an address of seven
bits.
For each operation code, there exists a micro-program routine in control memory
that executes the instruction.
The mapping procedure converts the 4-bit operation code to a 7-bit address for
control memory
This mapping consists of placing a 0 in the most significant bit of the address, transferring the
four operation code bits, and clearing the two least significant bits of the control address
register.
This provides for each computer instruction a micro-program routine with a capacity of four
microinstructions.
The mapping function is sometimes implemented through an integrated circuit called
programmable logic device or PLD. A PLD is similar to ROM in concept except that it uses AND
and OR gates with internal electronic fuses.
The interconnection between inputs, AND gates, OR gates, and outputs can be programmed as
in ROM.
A mapping function that can be expressed in terms of Boolean expressions can be implemented
conveniently with a PLD.
Subroutines
In computer architecture, a subroutine, also known as a procedure, function, or method, is
a sequence of instructions that performs a specific task or calculation within a program.
Subroutines play a crucial role in software development as they allow for code reuse,
modularity, and abstraction, making programs more organized, maintainable, and efficient.

subroutine register

A subroutine register, also known as a subroutine return address register or simply a return
address register, is a hardware register used in computer architecture to store the return
address of a subroutine call. When a program calls a subroutine or function, the current
execution address (the address of the instruction after the subroutine call) needs to be
stored temporarily so that the program can return to it after the subroutine finishes its
execution.
 Microprogram Example

Microprogramming is a technique used in computer architecture to implement the control

unit of a CPU (Central Processing Unit). In microprogramming, the control signals needed to
execute machine-level instructions are stored in a control memory as microinstructions.

Computer Configuration
In the figure uses two multiplexers (MUX) for combining multiple inputs and giving single
output. These MUX are needed in transferring information which is from many sources to
the single or common destination.

The MUX 1 is taking input from AC, Memory and PC and these inputs are transferring
collectively to DR.

The MUX 2 is taking input from PC and DR and these inputs are transferring collectively to
AR.
Note
Add computer instruction format with example for computer architecture.

Microinstruction Format
A microinstruction format includes 20 bits in total. They are divided into four elements as
displayed in the figure.

F1, F2, F3 are the micro-operation fields. They determine micro-operations for the computer.

CD is the condition for branching. They choose the status bit conditions.

BR is the branch field. It determines the type of branch.

AD is the address field. It includes the address field whose length is 7 bits.
 Branch Field

The BR (branch) field includes 2 bits. It can be used by connecting with the AD (address)
field. The reason for connecting with the AD field is to select the address for the next
microinstruction. The table illustrates the various branch fields and their functions.
Symbolic Microinstructions

The microinstructions can be determined by symbols. It is interpreted to its binary format

with an assembler. The symbols should be represented for each field in the
microinstruction. The users should be enabled to represent their symbolic addresses. Each
line in an assembly language represents symbolic instruction. These instructions are divided
into five fields such as label, micro-operations, CD, BR, and AD.

The label field may be empty or it may specify a symbolic address. A label is terminated with
a colon (:).
The micro-operations field consists of one, two, or three symbols, separated by commas.
But each F field includes only a single symbol.
The CD field has one of the letters U, I, S, or Z.
The BR field contains one of the four symbols defined.
The AD field specifies a value for the address field of the microinstruction in one of
three possible ways −
With a symbolic address, which must also appear as a label.
With the symbol NEXT to designate the next address in sequence.
When the BR field includes a RET or MAP symbol, the AD field is left null and is
transformed to seven zeros by the assembler.

ORG

"org code" typically refers to the use of the ORG directive. This directive is used in
assembly language programming to specify the starting address for the subsequent
instructions or data in memory.
Fetch Routine

The control unit includes 128 words, each including 20 bits. The value of each bit should
be specified to microprogram the control memory.
Between the 128 words, the first 64 are composed for the routines of 16 instructions.
The remaining 64 can be used for different goals.
The best opening location for the fetch routine to start is the 64th address

The microinstructions necessary for fetch routine are −

AR ← PC
DR ← M[AR], PC ← PC + 1
AR ← DR(0 − 10), CAR(2 − 5) ← DR(11 − 14), CAR(0,1,6) ← 0
Microinstructions that are situated in addresses 64, 65, and 66 are important for the fetch
routine. There are various symbolic language is as follows −
Symbolic Microprogram

A symbolic microprogram is a method of writing microinstructions in a more readable,

human-friendly format using symbolic names and labels instead of binary codes. This
approach simplifies the design, debugging, and documentation of microprograms by
abstracting low-level details and presenting the microprogram in a format that is easier to
understand and maintain.
Here is a simple example of a symbolic microprogram for a hypothetical CPU:
Execution of Instructions

Branch Instructions
Branch instructions alter the normal sequential flow of execution by changing the Program
Counter (PC) to a different address. They are used for implementing control flow
mechanisms such as loops, conditionals, and function calls.

Store Instructions
Store instructions write data from a register to a specified memory location. They are used to
save data from the CPU to memory.

Exchange Instructions
Exchange instructions swap the contents of two locations, which can be either registers or
memory locations. These are less common but are useful for certain algorithms and data
structures.
Binary Microprogram
A binary microprogram represents microinstructions in a format that the control
memory can directly understand and execute. This is the lowest level of
microprogramming where each microinstruction is encoded as a binary word. The
control unit of the CPU reads these binary microinstructions to generate the
appropriate control signals for executing machine-level instructions.
The Control Unit is the part of the computer’s central processing unit (CPU), which directs the
operation of the processor. It was included as part of the Von Neumann Architecture by John
von Neumann.

Examples of devices that require a CU are:

Control Processing Units(CPUs)
Graphics Processing Units(GPUs)
Functions of the Control Unit
It coordinates the sequence of data movements into, out of, and between a processor’s
many sub-units.
It interprets instructions.
It controls data flow inside the processor.
It receives external instructions or commands to which it converts to sequence of
control signals.
It controls many execution units(i.e. ALU, data buffers and registers) contained within a
CPU.
It also handles multiple tasks, such as fetching, decoding, execution handling and storing
results.
Decoding of Micro Opera Fieldsions
Microprogram Sequencer

Micro Instructions Sequencer is a combination of all hardware for selecting the next
micro-instruction address.
The micro-instruction in control memory contains a set of bits to initiate micro-
operations in computer registers and other bits to specify the method by which the
address is obtained.
Microprogram Sequencer Diagram
Microprogram sequencer diagram explanation
Control Address Register(CAR) : Control address register receives the address from
four different paths. For receiving the addresses from four different paths,
Multiplexer is used.
Multiplexer : Multiplexer is a combinational circuit which contains many data inputs
and single data output depending on control or select inputs.
Branching : Branching is achieved by specifying the branch address in one of the
fields of the micro instruction. Conditional branching is obtained by using part of the
micro-instruction to select a specific status bit in order to determine its condition.
Mapping Logic : An external address is transferred into control memory via a mapping
logic circuit.
Incrementer : Incrementer increments the content of the control address register by
one, to select the next micro-instruction in sequence.
 Functions of a Microprogram Sequencer

Fetching Microinstructions:
The sequencer fetches the next microinstruction from the control memory based on the
current microinstruction address.
Determining the Next Address:
It determines the address of the next microinstruction. This can be the next sequential
address, a branch address, or a conditional address based on the results of the current
microinstruction.
Handling Branches and Jumps:
The sequencer handles branches and jumps in the microprogram by updating the address
register to the appropriate target address.

Generating Control Signals:

It generates control signals that are used to control the operations of the CPU components
during the execution of each microinstruction.
Thank you