Scribd
Upload
5 views4 pages

QP - CLT1 Set A

The document outlines the details of an offline examination for the course 'Computer Organization and Architecture' (COA) at SRM Institute of Science and Technology for the academic year 2023-24. It includes information about the test date, duration, maximum marks, and a course articulation matrix detailing the learning outcomes and their corresponding assessments. Additionally, the document provides a series of questions categorized into parts A, B, and C, covering various topics related to computer hardware, logic circuits, and number systems.

Uploaded by

HEMAN PRASAD
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as DOC, PDF, TXT or read online on Scribd
5 views4 pages

QP - CLT1 Set A

The document outlines the details of an offline examination for the course 'Computer Organization and Architecture' (COA) at SRM Institute of Science and Technology for the academic year 2023-24. It includes information about the test date, duration, maximum marks, and a course articulation matrix detailing the learning outcomes and their corresponding assessments. Additionally, the document provides a series of questions categorized into parts A, B, and C, covering various topics related to computer hardware, logic circuits, and number systems.

Uploaded by

HEMAN PRASAD
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as DOC, PDF, TXT or read online on Scribd
You are on page 1/ 4

SRM Institute of Science and Technology

Mode of Exam
College of Engineering and Technology
School of Computing OFFLINE
(Common to all Branches)
SRM Nagar, Kattankulathur – 603203, Chengalpattu District, Tamilnadu

Academic Year: 2023-24 (ODD)

Test: CLAT-1 Date: 18-08-2023


Course Code & Title: 21CSS201T COA Duration: 100 minutes
Year & Sem: II & III SET A Max. Marks: 50

Course Articulation Matrix:

Course
P P P P P P P P P P P P
Learning At the end of this course,
O O O O O O O O O O O O
Outcome learners will be able to:
1 2 3 4 5 6 7 8 9 10 11 12
s (CLO)
Identify the computer
hardware and how software - - - - - - -
CO-1 H H - -
interacts with computer
hardware
Apply Boolean algebra as
related to designing computer
- - - - - - -
CO-2 logic, through simple H H - -
combinational and sequential
logic circuits

Part – A
(1 x 10 = 10 Marks)
Instructions: Answer all
Q. Questions Marks BL CO PO PI
No Code
1 Convert the given decimal number 245 to hexadecimal 1 M 1 2 2.1.2
____________
a) (OxF5)16
b) (OxE5)16
c) (OxFF)16
d) (Ox2F)16

2 Which type of computer is typically used by large 1 L 1 2 2.1.2


organizations for data processing, business applications,
and centralized computing?
a) Minicomputer
b) Personal Computer
c) Mainframe Computer
d) Tablet Computer
3 Convert the excess-3 code 0110 to Gray code. 1 H 1 2 2.1.2
a) 0011
b) 0101
c) 1101
d) 1011
4 Which of the following is true about the 2's complement 1 M 1 2 2.1.2
representation?
a) The leftmost bit is the sign bit.
b) Positive numbers are represented by a leading 0.
c) Negative numbers are represented by a leading 1.
d) Positive numbers have a negative counterpart 0101.

5 Which logic gate produces an output of 0 only when all of 1 L 1 2 2.1.2


its inputs are 1?
a) AND gate
b) OR gate
c) NAND gate
d) NOR gate

6 Which integer representation is commonly used in digital 1 H 1 2 2.1.2


computers for arithmetic operations?
a) Roman numeral
b) Binary-coded decimal (BCD)
c) Excess-3
d) Two's complement

7 How are negative numbers represented in sign-magnitude? 1 L 1 2 2.1.2


a) By setting all bits to 1
b) By setting the sign bit to 1 and the magnitude bits to the
binary representation of the absolute value
c) By setting the sign bit to 0 and the magnitude bits to the
binary representation of the absolute value

d) By setting the sign bit to 1 and the magnitude bits to the


one's complement of the absolute value
8 In BCD addition, if the sum of two BCD digits is greater 1 H 1 2 2.1.2
than 9, what additional step is necessary?
a) Subtract 10
b) Carry over to the next digit
c) Convert to binary
d) Round up

9 What is the minimum number of bits required to address 1 M 1 2 2.1.2


1024 distinct memory locations?
a) 6 bits
b) 10 bits
c) 16 bits
d) 32 bits

10 In a little-endian memory system, where is the least 1 L 1 2 2.1.2


significant byte (LSB) of a multi-byte data stored?
a) At the highest memory address
b) At the lowest memory address
c) In the middle of the memory
d) In a separate memory location

Part – B
( 4*4 = 16 Marks)
Answer all four questions
11 Perform Signed number subtraction using two's 4 L 1 2 2.1.2
complement representation.
 Subtract: 6 - 3
 Subtract: -8 - (-3)

12 Draw the circuit diagram for the following logic expression 4 M 1 2 2.1.2
AB + BC(B + C).
13 Convert the BCD number 725 to Gray code. 4 M 1 2 2.1.2

14 Convert decimal (42)10 to Excess-3. 4 M 1 2 2.1.2

15 Write in detail about the Bus structure in COA. 4 L 2 1 1.3.1

Part – C
( 2*12 = 24 Marks)

20 Perform the following conversion 12 M 1 2 2.1.2


(i) You are a computer systems engineer working on a
project that involves converting numbers between
different bases. One of your tasks is to convert the
octal number (176.35)8 to its binary equivalent.
(ii) Perform the binary to decimal conversion for the
given number, (1011100011001.01)₂. Describe the
steps you take to convert the binary fractional part
to its decimal equivalent, and explain how you
combine the integer and fractional parts to obtain
the final decimal result.
(iii) You are a systems hardware engineer working on a
project that involves converting numbers between
different bases. One of your tasks is to convert the
decimal number (7892) 10 to hexadecimal
equivalent.
iv) Perform BCD addition on the following numbers
652.21 and 345.12
12 H 1 2 2.1.2
(OR)
b. i) A student approaches you with a question about
subtracting (-19) from (23) using two's complement
notation. Explain the step-by-step process of performing
this subtraction using the two's complement method.
Show the necessary binary conversions, including finding
the two's complement of the negative number, and then
walk through the binary subtraction and any necessary
carry operations. Finally, interpret the binary result
back to decimal.
ii) Imagine you're designing a digital circuit that needs to
multiply two binary numbers: 01101 and 11010. Perform
the binary multiplication step by step, showing all
intermediate products and the final result.
iii) Using binary division, compute the quotient and
remainder when dividing 011111002 by 00102
Begin by converting the numbers to binary representation
and then demonstrate the step-by-step process of binary
division. Highlight the key steps involved in each iteration
of the division process, including how you determine the
next quotient bit and how you adjust the remainder.
Conclude by providing the final quotient and remainder in
binary and decimal formats.
21 i) Convert excess-3 1001 to binary. 12 H 1 2 2.1.2
ii) Convert decimal 0 to excess-3 code.
iii) Convert binary 1111 to excess-3 code

(OR)
b. Describe how the different functional units of the CPUs
collaborate to execute a simulation effectively. Explain the
roles of the input unit, output unit, memory unit, and 2.1.2
control unit in processing the simulation's computational 12 M 2 1
and memory-intensive tasks.
*Performance Indicators are available separately for Computer Science and Engineering in AICTE
examination reforms policy.

Course Outcome (CO) and Bloom’s level (BL) Coverage in Questions

Approved by the Audit Professor/Course Coordinator

You might also like

pFad - Phonifier reborn

Pfad - The Proxy pFad of © 2024 Garber Painting. All rights reserved.

Note: This service is not intended for secure transactions such as banking, social media, email, or purchasing. Use at your own risk. We assume no liability whatsoever for broken pages.


Alternative Proxies:

Alternative Proxy

pFad Proxy

pFad v3 Proxy

pFad v4 Proxy