Cadence

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Cadence

Front to Back End


Adil Sarwar

March 2004

1 CADENCE DESIGN SYSTEMS, INC. CADENCE CONFIDENTIAL


Presentation Overview

• Tool Setup
• Virtuoso Schematic Editor (Composer) for design entry
• Analog Design Environment (Analog Artist) for netlisting and
simulation.
• Virtuoso LE for layout
• Diva for physical Verification
• Mixed-signal simulations / AMS Designer

2 CADENCE CONFIDENTIAL
Tool Setup

• Source new cshrc file , IC 5.0 installed


• Icfb –W -> to check the version of tool
• cds.lib -> file in directory from where you want to run the tool
• .cdsinit and .env files for initialization and bindkeys
• icms , layoutPlus and icfb

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Cadence Flow Diagram

Affirma Spectre Parasitic re-simulation


Analog Simulator
Virtuoso Schematic Editor
back annotation
schematics

Virtuoso Custom Diva


Virtuoso XL DRC LVS LPE
Router

Virtuoso Layout Editor

Physical Design Physical Verification

PCell Libraries and Rules files,


technology files technology files
GDSII

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CIW Window

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Library Manager

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Creating Directories and cds.lib file

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Creating Schematic Cell

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Inverter Schematic

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CDF Parameters

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Adding Pins and Wire names

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Virtuoso – Cell Creation and LSW

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Virtuoso layout

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Inverter Layout

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Giving Terminal Names

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Diva DRC

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DRC Results in CIW Window

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LVS Setup

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LVS Results

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Model and Libraries

• Models from NCSU Kit or From Mosis site


• analogLib library was used for voltage sources and gnd
• basic library was used for pins
• dfII database and environment was used

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Tutorials and Useful sites

• Tutorials available in Cadence Setup


- Go to install directory, the tutorials should be here
- <install_dir>/tools/dfII/samples/tutorials
- cp –r cell_design ~/
- http://www.owlnet.rice.edu/~elec522/w9/virtuoso_layout/
• http://www.ee.princeton.edu/~cadence/usr/
• NCSU site for tarred kit

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