Viterbi

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FPGA IMPLEMENATION OF VITERBI DECODER FOR OFDM

APPLICATION(LDACS 1)
INTRODUCTION
1.OFDM
2.LDACS 1
3.Viterbi decoder
OFDM
• Orthogonal Frequency Division Multiplexing or OFDM is a modulation format that is being
used for many of the latest wireless and telecommunications standards.
• OFDM is the combination of both modulation and multiplexing. It is known that
modulation is the process of changing of carrier frequency, phase or amplitude or
combination according to the data signal and multiplexing is a method of sharing the
bandwidth with other independent data channels.
• The main concept in OFDM is orthogonality of the sub-carriers. As these
subcarriers are orthogonal, they do not interfere with each other.
• OFDM uses many slowly modulated narrow band signals rather
than using one rapidly modulated wideband signal. The low symbol rate in OFDM makes the
use of a guard interval between symbols affordable, making it possible to eliminate inter
symbol interference (ISI).
OFDM Block diagram Simulation Screenshot

LDACS 1
LDACS is under development as data link
communication between Aircraft Stations and
Ground station for Air traffic control and
maintenance. LDACS stands for L-Band Digital
Aeronautical Communication System. There
are two systems proposed by
EUROCONTROL, viz. LDACS1 and LDACS2.
• LDACS1 is based on OFDM modulation
scheme and supports FDD topology. LDACS2
is based on GSM and supports TDD
configuration. Transmission link from Aircraft
Station (AS) to the Ground Station(GS) is
referred as reverse link and transmission link
from Ground Station(GS) to Aircraft Station is
referred as forward link.
• LDACS1 physical layer for the reverse link is
divided into transmitter part used in AS and
receiver part used in GS.
LDACS-OFDM Tranmister
and Reciever
Transmister Reciever
Viterbi Decoder
Convolutional codes are the forward error correcting codes which has been widely used in digital communication
systems to make the transmission more reliable.
In order to transmit the data over a noisy channel convolutional codes offer better results in comparison to block
codes. In covolutional encoding extra bits are added to the input bits to reduce the error probability. One of the
efficient methods of decoding the convolutional codes is the viterbi decoder.
Branch Metric unit (BMU), Add Compare Select unit (ACS) and Trace Back Unit (TB) are the three main units in
viterbi decoder.
Branch metric unit is intended to find the branch metric values of the states. We have taken the hard decision type
decoder, so it uses the hamming distance to calculate the metric values.
ACS unit comprises of adder, comparator and Multiplexer. This unit is used to select the state metric with minimum
value.State metric is the summation of current branch metric and previous state metric of minimum value at that
state.
Trace back unit is to find the original bits that are given to the convolutional encoder.
PROPOSED MODEL FOR FPGA IMPLEMENTATION OF CONVOLUTION
ENCODER AND VITERBI DECODER

Input UART

SERIAL
FPGA
PROTOCOL

output
LITERATURE SURVEY
1. FPGA Implementation of Viterbi Decoder for Software
Defined Radio Applications,Swathi and S. Rajaram,Electronics
and Communication Engineering, Thiagarajar College of
Engineering, Madurai 625015, India
TIMELINE
September -October 2019: OFDM basic understanding and how
it is used in wireless communication

October-November 2019: OFDM block diagram simulation on


simulink and understanding the baisc working of viterbi decoder
and partial coding for LDACS 1.
December-January 2019-20: Verilog coding for viterbi
encoder.(70% Project completion)
Febuary-March 2020: UART protocol interface and Hardware
implementation(FPGA) for viterbi decoder.
Budget estimation
Spartan 3an: Rs.3000/-
Virtex FPGA kit: Rs. 2,00,000/-
Thank you!

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