8051 Instruction Set

8051 Instruction Set

• The microcontroller 8051 instructions set includes 110 instructions, 49 of which are single
• byte instructions, 45 are two bytes instructions and 17 are three bytes instructions. The
• instructions format consists of a function mnemonic followed by destination and source
field.
• All the instructions of microcontroller 8051 may be classified based on the functional aspect
are given below
• Data transfer group.
• Arithmetic group.
• Logical group.
• Bit manipulation group.
• Branching or Control transfer group.
Types of Instructions in 8051 Microcontroller Instruction Set

• An 8051 Instruction consists of an Opcode (short of Operation –

Code) followed by Operand(s) of size Zero Byte, One Byte or Two
Bytes.
• The Op-Code part of the instruction contains the Mnemonic, which
specifies the type of operation to be performed. All Mnemonics or the
Opcode part of the instruction are of One Byte size.
The format of instruction is as follows:

MNEMONIC DESTINATION OPERAND, SOURCE OPERAND 

Types of Instructions in 8051 Microcontroller Instruction Set

MNEMONIC DESTINATION OPERAND, SOURCE OPERAND 

The operand can be any of the following:

• No Operand
• Data value
• I/O Port
• Memory Location
• CPU register
 8051 Instruction Set Clssification
DATA ARITHMETIC LOGICAL BOOLEAN PROGRAM BRANCHING
TRANSFER
MOV ADD ANL CLR LJMP
MOVC ADDC ORL SETB AJMP
MOVX SUBB XRL MOV SJMP
PUSH INC CLR JC JZ
POP DEC CPL JNC JNZ
XCH MUL RL JB CJNE
XCHD DIV RLC JNB DJNZ
DA A RR JBC NOP
    RRC ANL LCALL
SWAP ORL ACALL
      CPL RET
RETI
        JMP
Data Transfer Instructions
• The Data Transfer Instructions are associated with transfer of data
between registers or external program memory or external data
memory.
• The contents of the source location are unchanged.
• The Mnemonics associated with Data Transfer are given below.

Mnemonic Description

MOV Move Data

MOVC Move Code

MOVX Move External Data

PUSH Move Data to Stack

POP Copy Data from Stack

XCH Exchange Data between two Registers

XCHD Exchange Lower Order Data between two Registers

Data Transfer Instructions
1. MOV
Instruction format Example Function

MOVA, Rn MOV A, R1 Move byte form register Rn to accumulator

MOV Rn, A MOV R5, A Move data from accumulator to register Rn
MOV Rn, direct MOV R3, 30H Move data from direct address to register Rn.
MOV Rn, # data MOV R7, #20H Move immediate data to register Rn.
MOV direct, A MOV 80H, A Move data from accumulator to direct address
MOV direct, Rn MOV 30H, R5 Move data from register to direct address
MOV direct, direct MOV 20H, 30H Move data form source direct address to the destination
direct address.
MOV direct, @Ri MOV 20H, Move data from address specified in register Ri to direct
@R1 address.
MOV direct, #data MOV 10H, Move immediate data to direct address
#10H
MOV @Ri, A MOV @ R0,A Move data form accumulator to memory location pointed by
Ri
Data Transfer Instructions
2. MOVC – All data is moved from the code memory to A register
Instruction Example Description

MOVC A, @A+DPTR MOV DPTR, #1234h Copy the immediate no. 1234 to DPTR
MOV A, #56h Copy the immediate no 56 to A
MOVC A, @A+DPTR Copy the content of the address 128Ah found
at ROM to A.
MOVC A, @A+PC This instruction will copy the contents of
code memory location formed by adding
PC and A, to the accumulator.
Data Transfer Instructions
3. MOVX- Normally used with external RAM, I/O address. All external
data move must involve A register

Instruction Example Description

MOVX A, @Ri MOVX A, @R0 This instruction will copy the data from 8 bit address
pointed by register Ri of the selected register bank to the
accumulator.
MOVX A, @DPTR MOVX A, @DPTR This instruction will copy the contents of external data
memory location, pointed by DPTR to the accumulator.

MOVX @Ri, A MOVX @R1, A This instruction will copy the contents of the accumulator
to the external data memory location pointed by register
Ri of selected register bank.
MOVX @ DPTR, A MOVX @ DPTR, A This instruction will copy the contents of the accumulator
to the 16-bit address, pointed by DPTR.
4. PUSH
PUSH ADDR; Increment SP, copy the data in the address to the internal
RAM address contained in SP.
4. POP
POP ADDR; copy the data in the internal RAM address contained in SP.to address,
decrement SP
5. XCH –Exchange the contents from destination to source and source to destination
Example Description
XCH A, R1 This instruction will load the contents of register R1 of selected register bank in the
accumulator and at the same time the contents of original accumulator will be copied in
register R1

XCH A, 10H This instruction will load the contents of memory location whose address is 10H to the
accumulator and at the same time the contents of accumulator are transferred to the
memory location whose address is 10H

XCH A,@RO This instruction will load the contents of memory location pointed by register R0 of selected
register bank to the accumulator and at the same time the contents of accumulator arc copied
to the memory location pointed by R0 register of the selected register bank.

XCHD A, @R0 This instruction exchange the lower nibble of accumulator (bit 3-0) with the lower nibble of
the memory location indirectly addressed by the specified register R0/R1.
 List of All Possible Data Transfer Instruction

Note
1. Direct- Address
2. Rn- R0 to R7
 Instruction

Note
1. Direct- Address
2. Rn- R0 to R7
3. Ri- R0 or R1
4. @- Indirect Address
Arithmetic Group
• Using Arithmetic Instructions, you can perform addition, subtraction,
multiplication and division.
• The arithmetic instructions also include increment by one, decrement
by one and a special instruction called Decimal Adjust Accumulator.
Arithmetic Group
Mnemonic Description

ADD Addition without Carry

ADDC Addition with Carry

SUBB Subtract with Carry

INC Increment by 1

DEC Decrement by 1

MUL Multiply

DIV Divide

DA A Decimal Adjust the Accumulator (A Register)

ADD Instruction
Mnemonic Example Description
ADD A, Rn ADD A, R0 This instruction will add the byte in register Rn of the selected
register bank with the byte in accumulator. The result is contained
in the accumulator
ADD A, direct ADD A, 20H This instruction will add the contents of the memory location
whose direct address is specified in the instruction with the
accumulator contents. The result of addition will he stored in the
accumulator.
ADD A, @ Ri ADD A, @ R0 This instruction will add the contents of memory location whose
address is pointed by register Ri of the selected register bank with
contents of the accumulator. The result of addition is stored in the
accumulator
ADD A, # data ADD A, # 30H This instruction will add the immediate 8 bit data with data in the
accumulator. The result of addition is stored in the accumulator.
ADDC Instruction
Mnemonics Addressing Example Description
mode
ADDC A, Rn ADDC A, Rl This instruction will add the contents of accumulator with
Register addressing
the contents of register Rn of the selected register bank
and carry flag. The result of addition is stored in
accumulator.
ADDC A, ADDC A, 10H This instruction will add the contents of memory location
Direct addressing
direct whose direct address is specified in the instruction with the
contents of accumulator and carry. The result of addition is
stored in the accumulator.

ADDC A, @Ri Register Indirect ADDC A, This instruction will add the contents of memory location
@R0 pointed by register Ri of selected register bank with the
accumulator and earn' flag. The result is stored in
accumulator.
ADDC A, #data Immediate ADDC A, #40H This instruction will add the contents of accumulator with
addressing immediate data specified in the instruction along with
carry.
SUBB Instruction
Mnemonics Addressing Example Description
mode
SUBB A, Rn Register addressing SUBB A, Rl This instruction will subtract the contents of register Rn
of the current register bank and carry flag together,
from the accumulator. The result is stored in
accumulator.
SUBB A, Direct addressing SUBB A, 10H This instruction will subtract the contents of memory
direct location whose direct address is specified in the
instruction and carry flag together from the contents of
accumulator. The result is stored in accumulator.
SUBB A, Register Indirect SUBB A, @R0 This instruction will subtract the contents of memory
@Ri location pointed by register Ri and contents of carry flag
from the accumulator. The result is stored in
accumulator.
SUBB A, Immediate SUBB A. #40H This instruction will subtract the contents of data
#data addressing specified m the instruction and contents of carry flag
from the contents of accumulator.
The result is stored in accumulator.
INC Instruction and DEC Instruction
Mnemonics Addressing Example Description Mnemonics Addressing Example Description
mode mode
INC Rn Register INC R5 This instruction will
addressing increment the contents of DEC Rn DEC R5
Register This instruction will decrement
register Rn of selected addressing the contents of register Rn of
register bank by 1. selected register bank by 1-
INC direct Direct addressing INC 10H This instruction will
increment
the contents of memory DEC direct Direct addressing DEC 10H This instruction will decrement
location whose address is the contents of memory
specified in the instruction by location whose direct address is
1 specified in the instruction by 1.
INC @Ri Register Indirect INC, @R0 This instruction will DEC @Ri Register Indirect DEC @R0 This instruction will decrement
increment the contents of the
memory location that is contents of memory location
pointed by register Ri by 1. that is pointed by register Ri by
1.
MUL AB
• This instruction multiplies an eight bit unsigned integer in the Accumulator and the
13 register. The low-order byte of the sixteen-bit product is left in the accumulator,
and the high-order byte in B.
• Example: Let A = 50 H, B = A0 H after execution of MUL AB the content of register B =
32 H and register A = 00 H (as (50H) X (A0 M) = (3200H)).
DIV AB
• This instruction divides the unsigned number in accumulator with the
unsigned number in register B.
• Accumulator contents the quotient of the result and register B contains
the remainder.
• Example; Let [A] = FB H and [B] = 12 H then DIV AB will result [A] = 0DH
(quotient), [B] = 11 H (remainder)
DAA
• Decimal Adjust Accumulator for addition, to adjust to BCD format(0 to 9)
• All no. must be in BCD before addition, only ADD and ADDC are adjusted to
BCD
Logical Instructions
• The next group of instructions are the Logical Instructions, which
perform logical operations like AND, OR, XOR, NOT, Rotate, Clear and
Swap. Logical Instruction are performed on Bytes of data on a bit-by-
bit basis.
Mnemonic Description
ANL Logical AND
ORL Logical OR
XRL Ex-OR
CLR Clear Register
CPL Complement the Register
RL Rotate a Byte to Left
RLC Rotate a Byte and Carry Bit to Left
RR Rotate a Byte to Right
RRC Rotate a Byte and Carry Bit to Right
SWAP Exchange lower and higher nibbles in a Byte
Rotate
Bit Manipulation Instruction
Examples
• SET B 00h
• CPL 7Fh
• CLR C
• CLR ACC.5
• ANL P0, #0Fh
• SETB TR1
Branching Instructions in 8051

• A microcontroller sequentially executes instructions but in some

cases, transferring this control to another block of code becomes
essential.
• The branching instructions in the 8051 microcontroller are
responsible for performing this operation, Tasks like looping, calling
delays, and conditional execution of code can be performed using
these branching instructions.
 List of Branching Instructions in 8051
Operation Mnemonics Description
ACALL Address11 Calls a subroutine in the maximum address range of 2K bytes
Call
LCALL Address16 Calls a subroutine in the maximum address range of 64K bytes
RET Returns the control from subroutine
Return
RETI Returns the control from an interrupt subroutine
AJMP Address11 Jumps to an address in a 2KB range
LJMP Address16 Jumps to an address in a 64KB range
Jumps to an address in a 256-byte range (0 to 127 (0-7FH) range and -1 to -128 (FFH-
SJMP Relative address
80H).
JMP @A+DPTR [DPTR]<-[DPTR+A]
JZ Relative address Jumps to address when accumulator=0
JNZ Relative address Jumps to address when accumulator!=0
CJNE A, Direct address,
Relative address Jumps to relative address when accumulator=data stored at a direct address
Jump
CJNE A, #Data,Relative Jumps to relative address when accumulator=data given by the programmer
address
CJNE @Rn, #Data,Relative Jumps to relative address when data at memory location stored in register=data
address given by the programmer
DJNZ Rn, Relative address Decrements value in Rn and jump to relative address till Rn!=0
DJNZ Direct address, Relative Decrements value at memory location stored in a register and jump to relative
address address till memory location stored in register =0
Call and Return instructions in 8051

• In some cases, a microcontroller needs to perform the same tasks multiple numbers of times
across the program, such as generating a delay.
• A subroutine is responsible for performing these repetitive tasks. Using subroutines saves
memory and makes the program more efficient.
• Instead of repeating the same few lines of code for some task you need to execute multiple
times, you can just write it once and give it a label.
• Every time you need those lines to execute, just use the label to jump to the area where you
had stored the labeled code.
• In essence, a subroutine is like a function, and it is placed at a different memory location then
the program memory.
• The call instruction is used to transfer the control from the presently executing program code
to the subroutine, and the return instruction is used to return the control to the program
code
Stack and control transfer
• The stack of the 8051 plays a crucial role in the transfer of control when it
comes to call instructions.
• When the call instruction executes, the program counter increments so that it
points to the next instruction.
• The contents of the program counter are pushed into the stack (lower byte
first).
• After this, the program counter is loaded with the starting instruction of the
subroutine transferring the control.
• Once the RET instruction is encountered, the contents stored in the stack are
popped back into the program counter, and the microcontroller starts
executing the program code from where it had left it.
Stack and control transfer in CALL
 LCALL Instruction Flags affected
Execution Auxilary
Opcode Operand Description Size Carry Overflow
Time carry
Transfers the

LCALL ADDRESS(16 control to

the specified 3 bytes 24 clock Unaffected Unaffected Unaffected
BIT) cycles
address(64K
B)

LCALL instruction can access an address of 16 bits. Due to this reason, this instruction can access any memory location in
the ROM space, but this instruction takes up 3 bytes of space and can waste memory resources. To save memory, the ACALL
instruction is used.
 Example (LCALL)

ORG 0000H; Directive for starting address of the program code

MOV A,#50H; Moves 50H into the accumulator
MOV R0,#25H; Moves 25H into the accumulator
LCALL Delay; Calls delay subroutine
ADD A, R0; Adds A and R0. stores the result in A
ORG 1000H; Directive for starting address of delay subroutine
DELAY: NOP; Performs no operation for 1 machine cycle
NOP; Performs no operation for 1 machine cycle
RET; Returns control to program code
 ACALL Instruction
Flags affected
Execution
Opcode Operand Description Size
Time Carry Overflow Auxilary carry
Transfers the
control to the
ACALL ADDRESS(11 specified 2 bytes 24 clock cycles Unaffected Unaffected Unaffected
BIT) address
restricted to a
page of 2KB

The ACALL instruction is 2 bytes in size and can be used to access any address in a 2KB page. This
instruction affects only 11 bits or the program counter as compared to 16 in the case of LCALL.
When this instruction is executed, the PC saves its current value on the stack, then the lower byte of
the ADDRESS is stored in the lower byte section of PC, the remaining 3 bits of ADDRESS are stored in
bits 0, 1, and 2 of PC. The bits 3-7 of the PC are empty.
Example

• Example
ORG 0000H; Directive for starting address of the program code
MOV A,#50H; Moves 50H into the accumulator
MOV R0,#25H; Moves 25H into the accumulator
ACALL Delay; Calls delay subroutine
ADD A, R0; Adds A and R0. stores the result in A
ORG 0300H; Directive for starting address of delay subroutine
DELAY: NOP; Performs no operation for 1 machine cycle
NOP; Performs no operation for 1 machine cycle
RET; Returns control to program code
 RET Instruction
Flags affected
Opcode Operand Description Size Execution Time
Carry Overflow Auxilary carry
Returns control
RET NONE to the program 1 byte 24 clock cycles Unaffected Unaffected Unaffected
code

The RETI instruction is used to return from interrupt subroutines and works in the same way as the RET instruction if
used outside a subroutine. When used inside a subroutine, RETI first enables interrupts of equal and lower priorities
to the interrupt that it is used in. The program execution continues at the address that is calculated by popping the
topmost 2 bytes off the stack. The most-significant-byte is popped off the stack first, followed by the least-
significant-byte.
Jumps in 8051

• The jump instruction is also used to transfer control in the 8051

microcontroller.
• But unlike a Call instruction, it does not call a subroutine and jumps to
an address in the same program memory.
• Jumps in the 8051 microcontroller are used to perform looping and
conditional execution of program code. Jumps in the 8051 are of two
types
• Unconditional jumps- as the name suggests these jumps do not
evaluate a condition to transfer the control to another address.
• Conditional jumps- these jumps evaluate a particular condition to
transfer the control to another address in the program code. All
conditional jumps are short jumps.
 Unconditional jumps
Flags affected
Opcode Operand Description Size Execution Time
Carry Overflow Auxilary carry
Transfers control
within program
code. The
LJMP ADDRESS(16 BITS) 3 bytes 24 clock cycles Unaffected Unaffected Unaffected
maximum range
of this jump is
64KB
Transfers control
within program
AJMP ADDRESS(11 BITS) code. The 2 bytes 24 clock cycles Unaffected Unaffected Unaffected
maximum range
of this jump is
2KB
Uses the given
address as an
offset to the
executing address
SJMP Relative Address and transfers the 2 bytes 24 clock cycles Unaffected Unaffected Unaffected
control to the
new address. The
maximum range
of 256 bytes
Example
MOV TMOD #0110000B ; sets counter1, mode 2,C/T=1(counts external pulses)
MOV TH1, #0 ; clears TH1 register
AGAIN:SETB P3.5;sets P3.5 as input port (all ports are configured as output ports by default)
BACK: MOV A,TL1; sends the value in TL1 to accumulator
MOV P2, A ; sends values to port 2
JNB TF1,BACK ; checks overflow condition
CLR TR1; stops the counter
CLR TF1; makes TF=0
SJMP AGAIN; performs tasks infinitely
 Conditional jumps in 8051
Flags affected
Opco Execution
Operand Description Size
de Time Carry Overflow Auxilary carry
Uses the given address as
an offset to the executing
address and transfers the
Relative control to the new address
JZ 2 bytes 24 clock cycles Unaffected Unaffected Unaffected
Address if the value in the
accumulator=0. The
maximum range of 256
bytes
Uses the given address as
an offset to the executing
address and transfers the
Relative control to the new address
JNZ 2 bytes 24 clock cycles Unaffected Unaffected Unaffected
Address if the value in the
accumulator !=0. The
maximum range of 256
bytes
 Conditional jumps in 8051
Opco Executio Flags affected
Operand Description Size Auxilary
de n Time Carry Overflow
carry
A, Direct Compares the data stored in the
accumulator with the data stored at
address, 24 clock
Relative the direct address. If the values are 3 bytes cycles Unaffected Unaffected Unaffected
the same, then the control is
address transferred to the relative address
Compares the data stored in the
A, accumulator with the data given by 24 clock
CJNE #Data,Relative the programmer. If the values are the 3 bytes Unaffected Unaffected Unaffected
cycles
address same, then the control is transferred
to the relative address
Compares the data stored at the
@Rn, address stored in the register with the 24 clock
#Data,Relative data given by the programmer. If the 3 bytes Unaffected Unaffected Unaffected
cycles
address values are the same, then the control
is transferred to the relative address
 Conditional jumps in 8051
Flags affected
Execution
Opcode Operand Description Size
Time Carry Overflow Auxilary carry
This instruction is used for looping
Rn, in 8051. It decrements the value 2
Relative stored in Rn and jumps to the byte 24 clock cycles Unaffected Unaffected Unaffected
address relative address till the value in the s
DJNZ register!=0
This instruction is used for looping
Direct in 8051. It decrements the value 3
address,
stored at the given address and byte 24 clock cycles Unaffected Unaffected Unaffected
Relative
address jumps to the relative address till s
the value in the address!=0
 Example

The program given below adds 3 ten times to the accumulator. It uses the DJNZ
instruction for looping.
MOV A,#0; clears the accumulator
MOV R2,#10; moves 10 into r2 which cats as a counter
AGAIN: ADD A,#03; adds 3 into the accumulator till r2!=0
DJNZ R2,AGAIN; decrements value in r2 and jumps to again label till value !=0
MOV R5,A; Moves the result into R5