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    Arithmetic Logic Shift Unit in Computer Architecture: Sri Varsha Cheruku 22B81A6674 - CSE AI&ML-B

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    Arithmetic Logic Shift Unit in Computer Architecture: Sri Varsha Cheruku 22B81A6674 - CSE AI&ML-B

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    Arithmetic Logic Shift Unit in Computer Architecture: Sri Varsha Cheruku 22B81A6674 - CSE AI&ML-B

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    22eg107a11

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    of 7

    ARITHMETIC LOGIC SHIFT UNIT IN

    COMPUTER ARCHITECTURE
    SRI VARSHA CHERUKU
    22B81A6674 – CSE AI&ML-B
    Content List
    • INTRODUCTION
    • MULTIPLEXER REPRESENTATION
    • CONCLUSION
    INTRODUCTION
    The Arithmetic Logic Shift Unit(ALSU)
    is part of a computer system's
    Arithmetic Logic Unit(ALU). It can be
    defined as a digital circuit that
    performs arithmetic, logical, and shift
    operations. Instead of having
    individual registers performing
    microoperations directly, computer
    systems employ many storage
    registers connected to a common
    operational unit ALU.
    We can combine and make one ALU with common selection variables by adding arithmetic, logic, and shift circuits. We can
    see the, One stage of an arithmetic logic shift unit in the diagram below. Some particular micro operations are
    selected through the inputs S1 and S0.
    4 x 1 multiplexer at the output chooses between associate arithmetic output between Ei and a logic output in Hi. The
    data in the multiplexer are selected through inputs S3 and S2 and the other two data inputs to the multiplexer obtain
    the inputs Ai – 1 for the shr operation and Ai + 1 for the shl operation
    • Characteristics of the ALSU

    1. Arithmetic logic shift unit in digital circuit performs all the logical and arithmetic
    operations.
    2. The operations like addition, subtraction, multiplication and division are referred as
    Arithmetic operations.
    3. The logical operations refer to operations on numbers and special character operations.

    • The ALSU is responsible for the conditions given below:

    1. Equal to
    2. Less than
    3. Greater than
    Functions of the ALSU
    A particular microoperation is selected with
    inputs S1 and S0. A 4 x 1 multiplexer at the
    output chooses between an arithmetic output
    in Ei and a logic output in Hi. The data in the
    multiplexer are selected with inputs S3 and S2.
    The other two data inputs to the multiplexer
    receive inputs Ai — 1 for the shift-right
    operation and Ai + 1 for the shift-left operation.
    The output carry Ci + 1 of a given arithmetic
    stage must be connected to the input carry Ci
    of the next stage in sequence. The input carry
    to the first stage is the input carry Cin, which
    provides a selection variable for the arithmetic
    operations
    • CONCLUSION
    • In conclusion, the Arithmetic and Logic Shift Unit (ALU) is a fundamental
    component in the architecture of modern processors, playing a crucial role in
    executing a variety of computational tasks. The ALU is responsible for performing
    arithmetic operations such as addition, subtraction, multiplication, and division, as
    well as logical operations including AND, OR, XOR, and NOT. Additionally, the unit
    manages bit-shifting operations which are essential for tasks such as data
    manipulation, efficient computation, and optimizing memory usage
    • In essence, the Arithmetic and Logic Shift Unit remains a cornerstone of computer
    architecture, embodying the intersection of mathematical precision and logical
    processing. Its ongoing development and optimization will continue to drive
    forward the capabilities of digital systems in a wide range of applications.

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