Chapter 3 (Comp. Arch)

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Computer Architecture & Organization

ELE5361

Chapter 3: Data Representation

Computer Arch. &Org.


Data Representation 1

DATA REPRESENTATION*

3.1 Data Types

3.2 Complements

3.3 Fixed Point Representations

3.4 Floating Point Representations

3.5 Other Binary Codes

3.6 Error Detection Codes

* Note: These slides were adapted from Prof. Hyunsoo Yoon, CS. Dept. KAIST
Computer Arch. &Org.
Data Representation 2 Data Types

DATA REPRESENTATION

Information that a Computer is dealing with


* Data
- Numeric Data
Numbers( Integer, real)
- Non-numeric Data
Letters, Symbols
* Relationship between data elements
- Data Structures
Linear Lists, Trees, Rings, etc
* Program(Instruction)

Computer Arch. &Org.


Data Types
Data Representation 3

NUMERIC DATA
DataREPRESENTATION
Numeric data - numbers(integer, real)
Non-numeric data - symbols, letters

Number System
Nonpositional number system
-Roman number system
Positional number system
- Each digit position has
a value called a weight
associated with it
- Decimal, Octal, Hexadecimal, Binary
Base (or radix) R number
- Uses R distinct symbols for each digit
- Example AR = an-1 an-2 ... a1 a0 .a-1…a-m
i Radix point(.) separates the integer
- V(AR ) = ai R portion and the fractional portion

R = 10 Decimal number system, R = 2 Binary


R = 8 Octal, R = 16 Hexadecimal
Computer Arch. &Org.
Data Representation 4 Data Types
WHY POSITIONAL NUMBER SYSTEM IN DIGITAL COMPUTERS ?

Major Consideration is the COST and TIME

- Cost of building hardware


Arithmetic and Logic Unit, CPU, Communications
- Time to processing

Arithmetic - Addition of Numbers - Table for Addition Binary Addition Table


0 1
0 0 1
* Non-positional Number System
- Table for addition is infinite 1 1 10

--> Impossible to build, very expensive even Decimal Addition Table


if it can be built 0 1 2 3 4 5 6 7 8 9
0 0 1 2 3 4 5 6 7 8
1 9
2 1 2 3 4 5 6 7 8 9 10
* Positional Number System 3 2 3 4 5 6 7 8 9 1011
- Table for Addition is finite 4 3 4 5 6 7 8 9 101112
5 4 5 6 7 8 9 10111213
--> Physically realizable, but cost wise 6 5 6 7 8 9 1011121314
7 6 7 8 9 101112131415
the smaller the table size, the less 8 7 8 9 10111213141516
expensive --> Binary is favorable to 9 8 9 1011121314151617
9 101112131415161718
Decimal
Computer Arch. &Org.
Data Representation 5 Data Types
REPRESENTATION OF NUMBERS - POSITIONAL NUMBERS

Decimal Binary Octal Hexadecimal


00 0000 00 0
01 0001 01 1
02 0010 02 2
03 0011 03 3
04 0100 04 4
05 0101 05 5
06 0110 06 6
07 0111 07 7
08 1000 10 8
09 1001 11 9
10 1010 12 A
11 1011 13 B
12 1100 14 C
13 1101 15 D
14 1110 16 E
15 1111 17 F

Binary, octal, and hexadecimal conversion


1 2 7 5 4 3 Octal
1 0 1 0 1 1 1 1 0 1 1 0 0 0 1 1 Binary
A F 6 3 Hexa
Computer Arch. &Org.
Data Representation 6 Data Types

CONVERSION OF BASES
Base R to Decimal Conversion
A = an-1 an-2 an-3 … a0 . a-1 … a-m
V(A) =  ak Rk
(736.4)8 = 7 x 82 + 3 x 81 + 6 x 80
+ 4 x 8-1
= 7 x 64 + 3 x 8 + 6 x 1 + 4/8 =
(478.5)10
(110110)2 = ... = (54)10
(110.111)2 = ... = (6.785)10
(F3)16 = ... = (243)10
(0.325)6 = ... =
(0.578703703 .................)10

Decimal to Base R number


- Separate the number into its integer and fraction parts and
convert each part separately.
- Convert integer part into the base R number
→ successive divisions by R and accumulation of the remainders.
Computer- Convert fraction
Arch. &Org. part into the base R number
Data Representation 7 Data Types

EXAMPLE
Fraction = 0.6875
Convert 41.6875 10 to base 2.
0.6875
Integer = 41 x 2
41 1.3750
20 1 x 2
10 0 0.7500
5 x 2
0 1.5000
2 x 2
1 1.0000
1
(41)10 = (101001)2 (0.6875)10 = (0.1011)2
0
0
1 (41.6875)10 = (101001.1011)2

Exercise
Convert (63)10 to base 5: (223)5
Convert (1863)10 to base (3507)8
Convert (0.63671875)10
8: to hexadecimal: (0.A3)16

Computer Arch. &Org.


Data Representation 8 Complements

COMPLEMENT OF NUMBERS

Two types of complements for base R number system:


- R's complement and (R-1)'s complement

The (R-1)'s Complement


Subtract each digit of a number from (R-1)
Example
- 9's complement of 83510 is 16410
- 1's complement of 10102 is 01012(bit by bit complement operation)

The R's Complement


Add 1 to the low-order digit of its (R-1)'s complement

Example
- 10's complement of 83510 is 16410 + 1 = 16510
- 2's complement of 10102 is 01012 + 1 = 01102
Computer Arch. &Org.
Data Representation
9 Fixed Point Representations
FIXED POINT NUMBERS
Numbers: Fixed Point Numbers and Floating Point
Numbers

Binary Fixed-Point Representation

X = xnxn-1xn-2 ... x1x0. x-1x-2 ... x-m

Sign Bit(xn): 0 for positive ; 1 for

negative Remaining Bits(xn-1xn-2 ... x1x0. x-1x-

2 ... x-m)

Computer Arch. &Org.


Data Representation 10

SIGNED NUMBERS

Need to be able to represent both positive and negative numbers

- Following 3 representations

Signed magnitude representation


Signed 1's complement representation
Signed 2's complement
representation

Example: Represent +9 and -9 in 7 bit-binary number

Only one way to represent +9 ==> 0 001001


Three different ways to represent -9:
In signed-magnitude: 1 001001
In signed-1's complement: 1 110110
In signed-2's complement: 1 110111

In general, in computers, fixed point numbers are represented


either integer part only or fractional part only.
Computer Arch. &Org.
Data Representation 11 Fixed Point Representations
CHARACTERISTICS OF 3 DIFFERENT REPRESENTATIONS
Complement
Signed magnitude: Complement only the sign bit
Signed 1's complement: Complement all the bits including
sign bit Signed 2's complement: Take the 2's complement of the
number,
including its sign bit.

Maximum and Minimum Representable Numbers and Representation of Zero


X = xn xn-1 ... x0 . x-1 ... x-m
Signed Magnitude
Max: 2n - 2-m 011 ... 11.11 ... 1
Min: -(2n - 2-m) 111 ... 11.11 ... 1
Zero: 000 ... 00.00 ... 0
100 ... 00.00 ... 0
+0
Signed 1’s Complement
-0 Signed 2’s Complement
Max: 2n - 2-m 011 ... Max: 2n - 2-m 011 ... 11.11 ... 1
11.11 ... 1 Min: -2n 100 ... 00.00 ... 0
Zero: -(2+0
Min: n - 2-m) 000 ... 00.00 ... 0 Zero: 0 000 ... 00.00 ... 0
-0 ... 0111 ... 11.11 ... 1
100 ... 00.00

Computer Arch. &Org.


Data Representation 12
2’s COMPLEMENT REPRESENTATION WEIGHTS

• Signed 2’s complement representation follows a “weight” scheme


similar to that of unsigned numbers
– Sign bit has negative weight
– Other bits have regular weights

X = xn xn-1 ... x0
n-1

+
V(X) = - xn  2n  x2
i=0
i
i

Computer Arch. &Org.


Data Representation 13 Fixed Point Representations
ARITHMETIC ADDITION: SIGNED MAGNITUDE
1 Compare their signs
2 If two signs are the same ,
ADD the two magnitudes - Look out for an overflow
3 If not the same , compare the relative magnitudes of the numbers and
then SUBTRACT the smaller from the larger --> need a subtractor to
add
4 Determine the sign of the result
6+9 -6 + 9
6 0110 9 1001
+) 9 1001 - ) 6 0110
15 1111 -> 3 0011 -> 00011
01111
-6 + (-9)
6 + (- 9)
6 0110
9 1001 +) 9 1001
-) 6 0110 -15 1111 -> 11111
Overflow 9 + 9 or (-9) + (-9)
- 3 9 0011 ->
1001
10011
+) 9 1001
overflow (1)0010
Computer Arch. &Org.
Data Representation 14 Fixed Point Representations
ARITHMETIC ADDITION: SIGNED 2’s COMPLEMENT
Add the two numbers, including their sign bit, and discard any carry out of
leftmost (sign) bit - Look out for an overflow

Example
6 0 0110 -6 1 1010
+) 9 0 1001 +) 9 0 1001
15 0 1111 3

0011
6 0 0110 -9 x’n-1y’n-1sn-1
(cn-1  cn)
9 0 1001 overflow1
+) 9 0 1001 2 operands have the same sign
18 1 0010 and the result sign changes
0111
+) -9 1 0111 xn-1 yn s’ n-1 +) -9
xn-1yn-1s’n-1 + x’n-1y’n-1sn-1 = cn-1
 cn )
(cn-1

Computer Arch. &Org. 1cn


Data Representation 15 Fixed Point Representations
ARITHMETIC ADDITION: SIGNED 1’s COMPLEMENT

Add the two numbers, including their sign bits.


- If there is a carry out of the most significant (sign) bit, the result is
incremented by 1 and the carry is discarded.

Example end-around carry


6 0 -6 1 1001
+) 01101 0110
-9 +) 9 0 1001

-3 1 1100 +) (1) 0(1)00101


3 0 0011
not overflow (cn-1  cn) = 0

-9 1 0110 9 0 1001
+) -9 1 0110 +) 9 0 1001
(1)0 1100 1
+) 1 (1)0010
0 1101
overflow
(cn-1  cn)

Computer Arch. &Org.


Data Representation 16 Fixed Point Representations
COMPARISON OF REPRESENTATIONS

* Easiness of negative conversion

S + M > 1’s Complement > 2’s Complement


* Hardware

- S+M: Needs an adder and a subtractor for Addition


- 1’s and 2’s Complement: Need only an adder

* Speed of Arithmetic

2’s Complement > 1’s Complement(end-around C)


* Recognition of Zero

2’s Complement is fast

Computer Arch. &Org.


Data Representation
17 Fixed Point Representations

ARITHMETIC SUBTRACTION

Arithmetic Subtraction in 2’s complement

Take the complement of the subtrahend (including the sign bit)


and add it to the minuend including the sign bits.

(A)-(-B) =(A)+ B
(A)- B=(A)+( -B)

Computer Arch. &Org.


Data Representation 18 Floating Point Representation

FLOATING POINT NUMBER REPRESENTATION


* The location of the fractional point is not fixed to a certain location
* The range of the representable numbers is wide

F = EM
mn ekek-1 ... e0 … m0 . m-1 … m
mn-1mn-2 -m
sign exponent mantissa
- Mantissa
Signed fixed point number, either an integer or a fractional number
- Exponent
Designates the position of the radix point

Decimal Value

V(F) = V(M) * RV(E) M: Mantissa


E:
Exponent R:
Radix
Computer Arch. &Org.
Data Representation
19 Floating Point Representation

FLOATING POINT NUMBERS


Example sign sign
0 .1234567 0
04
mantissa
==> +.1234567 x 10+04 exponent
Note:
In Floating Point Number representation, only Mantissa(M) and
Exponent(E) are explicitly represented. The Radix(R) and the
position of the Radix Point are implied.

Example
A binary number +1001.11 in 16-bit floating point number representation
(6-bit exponent and 10-bit fractional mantissa)

0 0 00100 100111000
Sign Exponent Mantissa
or
0 0 00101
010011100

Computer Arch. &Org.


Data Representation 20 Floating Point Representation
CHARACTERISTICS OF FLOATING POINT NUMBER REPRESENTATIONS
Normal Form

- There are many different floating point number representations


of the same number
→ Need for a unified representation in a given computer

- the most significant position of the mantissa contains a non-zero


digit

Representation of Zero
- Zero
Mantissa = 0
- Real Zero
Mantissa = 0
Exponent
= smallest representable number
which is represented as
00 ... 0
 Easily identified by the
hardware
Computer Arch. &Org.
Data Representation 21
INTERNAL REPRESENTATION AND EXTERNAL REPRESENTATION

Another
Computer External

Representation

External
Internal
Representation Human
Representation

CPU
Memory

External
Representation
Device

Computer Arch. &Org.


Data Representation
22 External Representations
EXTERNAL REPRESENTATION
Numbers
Most of numbers stored in the computer are eventually changed
by some kinds of calculations
→ Internal Representation for calculation efficiency
→ Final results need to be converted to as External Representation
for presentability

Alphabets, Symbols, and some Numbers


Elements of these information do not change in the course of
processing
→ No needs for Internal Representation since they are not
used
for calculations Decimal BCD Code
0 0000
Example 1 0001
Decimal Number: 4-bit Binary Code 2 0010
BCD(Binary Coded Decimal) 3 0011
4 0100
5 0101
6 0110
7 0111
8 1000
9 1001

Computer Arch. &Org.


Data Representation 23 External Representations

OTHER DECIMAL CODES


Decimal BCD(8421) 2421 84-2-1 Excess-3
0 0000 0000 0000 0011
1 0001 0001 0111 0100
2 0010 0010 0110 0101
3 0011 0011 0101 0110
4 0100 0100 0100 0111
5 0101 1011 1011 1000
6 0110 1100 1010 1001
7 0111 1101 1001 1010 Note: 8,4,2,-2,1,-1 in this table is the weight
associated with each bit position.
8 1000 1110 1000 1011
9 1001 1111 1111 1100 d3 d2 d1 d0: symbol in the codes

BCD: d3 x 8 + d2 x 4 + d1 x 2 + d0 x 1
 8421 code.
2421:

d3 x 2 + d2 x 4 + d1 x 2 + d0 x 1
84-2-1: d3 x 8 + d2 x 4 + d1 x (-2) +
d0 x (-1)
Excess-3: BCD + 3

Computer BCD:
Arch. &Org. It is difficult to obtain the 9's complement.
Data Representation 24 Other Binary codes

GRAY CODE
* Characterized by having their representations of the binary integers differ
in only one digit between consecutive integers
* Useful in some applications

Decimal Gray Binary


g3 g2 g0 b3 b2 b0
number g1 b1
0 0 0 0 0 0 0 0 0
1 0 0 0 1 0 0 0 1
2 0 0 1 1 0 0 1 0
3 0 0 1 0 0 0 1 1
4-bit Gray codes 4 0 1 1 0 0 1 0 0
5 0 1 1 1 0 1 0 1
6 0 1 0 1 0 1 1 0
7 0 1 0 0 0 1 1 1
8 1 1 0 0 1 0 0 0
9 1 1 0 1 1 0 0 1
10 1 1 1 1 1 0 1 0
11 1 1 1 0 1 0 1 1
12 1 0 1 0 1 1 0 0
13 1 0 1 1 1 1 0 1
14 1 0 0 1 1 1 1 0
15 1 0 0 0 1 1 1 1
Computer Arch. &Org.
Data Representation 25 Other Binary codes

GRAY CODE - ANALYSIS


Letting gngn-1 ... g1 g0 be the (n+1)-bit Gray code
for the binary number bnbn-1 ... b1b0

gi = , 0  i  n-
 bi+1
bi 1
Reflection of Gray codes
gn =
 0 0 0 0 00 0 000
bnband= gn  gn-1  . . .  gn-i 1 0 1 0 01 0 001
n-i
bn = gn 1 1 0 11 0 011
1 0 0 10 0 010
1 10 0 110
1 11 0 111
1 01 0 101
Note: 1 00 0 100
1 100
The Gray code has a reflection property 1 101
1 111
- easy to construct a table without calculation,
1 010
- for any n: reflect case n-1 about a 1 011
mirror at its bottom and prefix 0 and 1 1 001
1 101
to top and bottom halves, respectively 1 000

Computer Arch. &Org.


Data Representation 26 Other Binary codes

CHARACTER REPRESENTATION ASCII


ASCII (American Standard Code for Information Interchange) Code

MSB (3 bits)
0 1 2 4 5 6 7
3
LSB 0 NUL DLE SP 0 @ P . p
(4 bits) 1 SOH DC1 ! 1 A Q a q
2 STX DC2 “ 2 B R b r
3 ETX DC3 # 3 C S c s
4 EOT DC4 $ 4 D T d t
5 ENQ NAK % 5 E U e u
6 ACK SYN & 6 F V f v
7 BEL ETB ‘ 7 G W g w
8 BS CAN ( 8 H X h x
9 HT EM ) 9 I Y I y
A LF SUB * : J Z j z
B VT ESC + ; K [ k {
C FF FS , < L \ l |
D CR GS - = M ] m }
E SO RS . > N ^ n ~
F SI US / ? O _ o DEL

Computer Arch. &Org.


Data Representation 27 Other Binary codes

CONTROL CHARACTER REPRESENTAION (ACSII)

NUL Null DC1 Device Control 1


Start of Heading (CC) Device Control 2
SOH Start of Text (CC) DC2 Device Control 3
STX End of Text (CC) Device Control 4
ETX End of Transmission (CC) DC3 Negative Acknowledge (CC)
Enquiry (CC) Synchronous Idle (CC)
EOT Acknowledge (CC) DC4 End of Transmission Block (CC)
Bell Cancel
ENQ Backspace (FE) NAK End of Medium
Horizontal Tab. (FE) Substitute
ACK Line Feed (FE) SYN Escape
Vertical Tab. (FE) File Separator (IS)
BEL Form Feed (FE) ETB Group Separator (IS)
BS Carriage Return (FE) Record Separator (IS)
HT Shift Out CAN Unit Separator (IS)
LF Shift In EM Delete
VT Data Link Escape SUB
FF (CC)
CR ESC
SO (CC) CommunicationFS Control
SI (FE) Format EffectorGS
DLE RS
(IS) Information Separator
US
Computer Arch. &Org. DEL
Data Representation 28 Error Detecting codes

ERROR DETECTING CODES

Parity System
- Simplest method for error detection
- One parity bit attached to the information
- Even Parity and Odd Parity
Even Parity
- One bit is attached to the information so that
the total number of 1 bits is an even
number
1011001 0
1010010 1
Odd Parity
- One bit is attached to the information so that
the total number of 1 bits is an odd number
1011001 1
1010010 0

Computer Arch. &Org.


Data Representation 29

PARITY BIT GENERATION

Parity Bit Generation

For b6b5... b0(7-bit information); even parity bit beven

beven = b6  b5  ...  b0

For odd parity bit

bodd = beven  1 =

beven

Computer Arch. &Org.


Data Representation 30 Error Detecting codes
PARITY GENERATOR AND PARITY CHECKER

Parity Generator Circuit (even parity)


b6
beven
b5

b4

b3

b2

b
Parity Checker
1

b0
beven
b6

b5

b4
Even Parity
b3
error indicator
b2
Computer Arch. &Org.

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