EE/EC5103 Embedded Systems

Communication for Embedded

Systems
Instructor
Dr. Bharghava Rajaram
Introduction
• Embedded & Real-time systems could be standalone or connected
• A real-time system is often composed from a number of periodic
(time triggered) and sporadic (event triggered) tasks which
communicate their result by passing messages.
• In a distributed real-time systems these messages are sometimes
sent between processors across a communication device. (from Urban Bilstrup)
Introduction (cont.)
• To guarantee that the timing requirements of all tasks are met, the
communications delay between a sending task and a receiving task
being able to access that message must be bounded.
For examples
• Control systems: between sensors and actuators via central computer
• Multiprocessors: between processors, tasks communicating
OSI Reference model
• Protocols used to have orderly communication
• Who initiates communication?
• Order of communication?
• How long can I talk?
• How loud can I speak?
• Do I have to say something specific at beginning
or end?
• Do I have to add meta information?
• What do I do if I get interrupted?
• What do I do if I was not understood?
Open System Interconnection (OSI)
Application – user interface e.g. Internet
explorer
Presentation – data formatting e.g.
compression and encoding
Session – handle overall connection e.g. OS,
scheduling programs
Transport – ensures data transfer, error
checking e.g. TCP
Network – logical addressing, routing e.g. IP
(from TCP/IP)
Data link – prepares data for transfer,
physical addressing such as Media Access
Control (MAC)
Physical – wires and cables, hubs, repeaters.
Network Protocols (“Protocol Stack”)
Application Application
Layer Layer

Presentation Presentation
Layer Layer

Session Session
Layer Layer

Transport Transport
Layer Communication Network Layer

Network Network Network Network

Layer Layer Layer Layer

Data Link Data Link Data Link Data Link

Layer Layer Layer Layer

Physical Physical Physical Physical

Layer Layer Layer Layer
Copyright ©2000 The McGraw Hill Companies

Figure 2.6
Network Protocols (Headers/Trailers)
Application A Application B
data
Application Application
Layer data ah Layer

Presentation Presentation
Layer data ph Layer

Session Session
Layer data sh Layer

Transport Transport
Layer data th Layer

Network Network
Layer data nh Layer

Data Link Data Link

Layer dt data dh Layer

Physical Physical
Layer bits Layer
Why A Layered Design?
• An explicit structure for dealing with a complex system
• Simplifies the design process
• Modularity of layers eases maintenance and updating of
system components
• Accommodates incremental changes
Embedded Communication
• Point-to-point networks
• Each node connected to every node
• Simple and reliable
• Dedicated links make it easy to meet real-time deadlines
• Costly due to many wires required
• Shared media networks
• Nodes are connected via bus or other topologies
• Less wiring and hence cheaper
• Easily extendable by adding new nodes to network
• Complex network protocol
• Being the system of focus from now on
 Complex distributed architecture
From Urban Bilstrup

Internal External
Wireless Wireless
GREEN CAN
Communication Communication
System System
LIN
HMI Gateway
MOST
Tuners Playback Audio
Audio
Audio
modules
Audio
modules
modules
module
RED CAN
Topologies
Parallel communication
• Multiple data, control, and possibly power wires
• One bit per wire
• High data throughput with short distances
• Typically used when connecting devices on same IC or same circuit board
• Bus must be kept short
• long parallel wires result in high capacitance values which requires more time to charge/discharge
• Data misalignment between wires increases as length increases
Parallel Transfer
• Higher cost, bulky
D0

Sender Receiver

D7
12
Serial communication
• Single data wire, possibly also control and power wires
• Words transmitted one bit at a time
• Higher data throughput with long distances
• Less average capacitance, so more bits per unit of time
• Cheaper, less bulky
• More complex interfacing logic and communication protocol
• Sender needs to decompose word into bits
• Receiver needs to recompose bits into word Serial Transfer
• Control signals often sent on same wire as data increasing protocol
complexity

Sender Receiver

13
Serial bus interface motivations
• Motivation
• Connect different systems together
• Two embedded systems
• A desktop and an embedded system
• Connect different chips together in the same embedded system
• MCU to peripheral
• MCU to MCU
• Without using a lot of I/O lines
• I/O lines require I/O pads which cost $$$ and size
• I/O lines require PCB area which costs $$$ and size
• Often at relatively low data rates
• But sometimes at higher data rates
• So, what are our options?
• Universal Synchronous/Asynchronous Receiver Transmitter
• Also known as USART (pronounced: “you-zart”)
14
Serial bus design space

• Number of wires required?

• Asynchronous or synchronous?
• How fast can it transfer data?
• Can it support more than two endpoints?
• Can it support more than one master (i.e. txn initiator)?
• How do we support flow control?
• How does it handle errors/noise?

15
Direction
Simplex Transmitter Receiver

Transmitter Receiver
Half
Duplex
Receiver Transmitter

Transmitter Receiver

Full
Duplex
Receiver Transmitter

16
Synchronous vs. Asynchronous
• Synchronous • Asynchronous
• No clock

data data data data

clk clk

17
Line coding
• Representing 1 and 0 using signals
• Level line coding
• TTL
• CMOS
• RS232

TTL RS232
18
Network resources & qualitative
parameters
• Network resources
• Bandwidth
• Buffer space
• Protocol efficiency (data bits/bandwidth). Depends on
• Message overhead
• Media access overhead
• Determinacy (ability to calculate worst-case response time)
• Robustness
• cost
Application-oriented
• Event based communication
• E.g. alarm, user inputs, requests for data from other systems

• State based communication

• E.g. regular sensor readings
• Predictability
Event based system
• Efficient use of network resource
• Needs high reliability (event based data comes once in a while)
• May need acknowledgement
• Hard to predict delay in case of overloading (e.g. alarm)
State based system
• Messages sent at predefined, regular intervals.
• Less efficient due to regular occupation of communication channel by
nodes.
• More tolerance. Missed message may be ok, since the next one will
be coming.
• Transient data problem. Sending node has to keep data long enough
for other to see. E.g. button pressed may need to be repeated.
Best Protocol?
• No best protocol, depends on applications.
• Embedded systems tends to focus on level 1 and 2 of OSI model, for
simplicity and overhead reduction.
• Physical link (Layer 1) – transmission medium
• Data link (Layer 2) provides Media Access Control (MAC)
Media Access Control (MAC)
• Many protocols are taken from computer networks

• Connection oriented protocols

• CSMA/CD
• CSMA/CA
• Polling
• Token passing
• TDMA
• Binary countdown (Bit dominance)
Protocol overview
Connection oriented protocols

• 2 nodes per each connection only

• If nodes are not directly connected, data is relayed
• Deterministic delay between directly connected nodes,
high delay for indirectly connected nodes
Connection oriented protocols cont.
• Suitable to systems with low communication requirements.
• Node with pass-through traffic can be fully occupied.
• E.g. telephone network service
Polling

• Simple and deterministic

• Needs a master node
• Master periodically polls slave nodes
• Consumes bandwidth
• E.g. military aircraft communication
• Simple slave nodes, complex master
Time Division Multiple Access (TDMA)

• Masters broadcasts sync signal to synchronise all clocks

• Then each node sends data on its time slot.
• Similar but more efficient than polling (synchronise once vs polling all nodes
individually.
• more complex nodes due to timing requirements.
• Fixed length messages (inflexible)
• E.g. satellite communications
.

Token ring

• Ring shape network

• Token (signal) is passed from node to node
• Node can hold token, send message all the way round
the ring, and pass token on
• Deterministic under heavy load
Token ring cont.
• Some token overhead
• Can add priority by having extra field in token
• More complexity in detecting token lost
• Cable break disrupts network (needs dual ring)
• E.g. many Wide Area Networks (WANs)
Token bus

• Similar to token ring

• Token is passed via bus simultaneously
• Cable break can be dealt with by reconfiguration (like
when a node is added to or taken off the network.
• Applied in manufacturing
Binary countdown (Bit Dominance)
• All nodes wait for channel to be free before sending.
• Simultaneous channel access (contention) resolved by detecting
broadcasting signal for unique identification
• Bus must provide dominance bit e.g. ‘1’ can override ‘0’
• A node stop transmitting when seeing dominance bit opposite to its
own broadcasting.
• Hence messages require priority as IDs rather than node IDs.
• Good throughput & high efficiency (no contention loss)
Binary countdown cont. [5]
Binary countdown cont.
• Heavy load can cause long delay for low priority messages (no bound)
• Applied in industrial and automotive Controller Area Network (CAN)
and SAE standard J 1850
Carrier Sense Multiple Access with
Collision Detection (CSMA/CD)

• Nodes wait for idle channel before transmitting.

• When simultaneously transmission is detected, each
node stops and waits for random time before
resending.
CSMA/CD cont.
• Easy to add or take off new nodes without
initialisation and configuration
• Low overhead at light traffic
• Unbound overhead at heavy traffic (messages keeps
colliding) hence low determinacy and efficiency.
• Requires detection circuit
Carrier Sense Multiple Access with
Collision Avoidance (SCMA/CA)
CSMA/CA cont.
• Hybrid between light traffic efficiency of CSMA/CA and heavy traffic
efficiency of token-based protocols.
• Nodes waits for free network before sending.
• When collision happens, jam signal is sent to notify all nodes,
synchronises clocks and start contention time slot.
• Unique time slot is assigned to each node
• Rotate time slot for fairness
• Network return to normal state when all slots are unused.
 CSMA/CA cont.
• Variations
• Reservation CSMA – no. of slots equal to no. of nodes
• Not practical if networks has many nodes.
• No. of slots less than no. of nodes – randomly allocate slots to nodes.
Media access comparison
Addressing modes in Buses
• Subscriber oriented methods
• Nodes are specifically addressed
• Message Oriented methods
• Sent to all nodes.
• Receivers decide whether message
intended for them or not
• Transmission oriented methods
• Mostly Time based
• Sometimes event based
Automotive standards
Controller Area Network (CAN)
Event triggered, Arbitration
Time Triggered Protocol (TTP)
Time triggered, TDMA
Local Interconnect Network (LIN)
Time triggered, master-slave
Media Oriented System Transport (MOST)
Manufacturing Automation
Standards
Controller Area Network (CAN)
Arbitration
Process Network (P-NET)
Token passing and master-slave
PROcess Field Bus (PROFIBUS)
Token passing and master-slave
Factory Instrumentation Protocol (World FIP)
Centralised arbitration
 Military Standards
MIL-STD 1553
The current 1553 data bus is widely used in military applications, with a
nominal throughput of 1 Mb/s.

MIL-STD 1773
Mil-Std-1773 defines a fiber optic bus. This system is widely used for on-board
command and telemetry transfer between military spacecraft components,
subsystems and instruments, and within complex components themselves.
1773 AS, has a dual rate of 1 Mb/s or 20 Mb/s.

ARINC 429
A commercial aircraft data bus. It is widely implemented in the commercial
aircraft avionics industry. Performance is 100Kb/s or 12.5Kb/s.
Classification of Serial Buses
 traps &
exceptions
C
Assembly
ldr (read)
Software SVC# str (write) Machine Code
ISA
Hardware CPU
fault
INT#

interrupts System Buses

AHB/APB
Interrupts

Internal
&
GPIO/INT Timers USART DAC/ADC
External
Memory

Internal
External

C
Ca pare
e
Ou put

C
te t
pt

C
UA I
C

RT

EM
ur
I n tpu

SP

DA
AD
I2
rru

pt
In

m
Co
UART
• Universal Asynchronous Receiver/Transmitter
• Hardware that translates between parallel and serial
forms
• Commonly used in conjunction with communication
standards such as EIA, RS-232, RS-422 or RS-485
• The universal designation indicates that the data format
and transmission speeds are configurable and that the
actual electric signaling levels and methods (such as
differential signaling etc.) typically are handled by a
special driver circuit external to the UART.

Most of the UART stuff (including images) Taken from Wikipedia!

Protocol
• Each character is sent as
• a logic low start bit
• a configurable number of data bits (usually 7 or 8,
sometimes 5)
• an optional parity bit
• one or more logic high stop bits
• with a particular bit timing (“baud”)
• Examples
• “9600-N-8-1” 
<baudrate><parity><databits><stopbits>
• “9600-8-N-1” 
<baudrate><databits><parity><stopbits>
Variations and fun times
• UART is actually a generic term that includes a large number of
different devices/standards.
• RS-232 is a standard that specifies
• “electrical characteristics and timing of signals, the meaning of signals, and the physical
size and pin out of connectors.

50
Signals (only most common)
• The RXD signal of a UART is the signal receiving the data. This will be an input and is usually
connected to the TXD line of the downstream device.

• The TXD signal of a UART is the signal transmitting the data. This will be an output and is usually
connected to the RXD line of the downstream device.

• The RTS# (Ready to Send) signal of a UART is used to indicate to the downstream device that the
device is ready to receive data. This will be an output and is usually connected to the CTS# line of
the downstream device.

• The CTS# (Clear to Send) signal of a UART is used by the downstream device to identify that it is
OK to transmit data to the upstream device. This will be an input and is usually connected to the
RTS# line of the upstream device.
DB9 stuff
• DTE vs DCE
• Pinout of a DCE?
• Common ground?
• Noise effects?

Wiring a DTE device to a DCE device for communication is easy.

The pins are a one-to-one connection, meaning all wires go from pin x to pin x.
A straight through cable is commonly used for this application.
In contrast, wiring two DTE devices together requires crossing the transmit and receive wires.
This cable is known as a null modem or crossover cable.
RS-232 transmission example
Discussion Questions
• How fast can we run a UART?
• What are the limitations?
• Why do we need start/stop bits?
• How many data bits can be sent?
• 9600-8-N-1 is ok. Is 9600-8192-N-1 ok too?

54
Introduction
 What is it?
 Basic Serial Peripheral Interface
(SPI)
 Capabilities
 Protocol
 Pro / Cons and Competitor
 Uses
Serial Peripheral Interface
 Conclusion http://upload.wikimedia.org/wikipedia/commons/thumb/e/ed/
SPI_single_slave.svg/350px-SPI_single_slave.svg.png
What is SPI?

• Serial Bus protocol

• Fast, Easy to use, Simple
• Everyone supports it
SPI Basics
 A communication protocol using 4
wires
 Also known as a 4 wire bus
 Used to communicate across small
distances
 Multiple Slaves, Single Master
 Synchronized
Capabilities of SPI
 Always Full Duplex
 Communicating in two directions at
the same time
 Transmission need not be meaningful
 Multiple Mbps transmission speed
 Transfers data in 4 to 16 bit
characters
 Multiple slaves
 Daisy-chaining possible
Protocol
 Wires:
 Master Out Slave In (MOSI)

 Master In Slave Out (MISO)

 System Clock (SCLK)

 Slave Select 1…N

 Master Set Slave Select low

 Master Generates Clock
 Shift registers shift in and out data
Wires in Detail
 MOSI – Carries data out of Master
to Slave
 MISO – Carries data from Slave to
Master
 Both signals happen for every
transmission
 SS_BAR – Unique line to select a
slave
 SCLK – Master produced clock to
synchronize data transfer
Shifting Protocol

Master shifts out data to Slave, and shift in data from Slave
http://upload.wikimedia.org/wikipedia/commons/thumb/b/bb/SPI_8-bit_circular_transfer.svg/400px-SPI_8-bit_circular_transfer.svg.png
 Diagram

Some wires have been renamed

Master and multiple daisy-

chained slaves
Master and multiple independent http://www.maxim-ic.com/appnotes.cfm/an_pk/3947

slaves
http://upload.wikimedia.org/wikipedia/commons/thumb/f/fc/
SPI_three_slaves.svg/350px-SPI_three_slaves.svg.png
Clock Phase (Advanced)
 Two phases and two polarities of
clock
 Four modes
 Master and selected slave must be
in same mode
 Master must change polarity and
phase to communicate with slaves
of different numbers
Timing Diagram

Timing Diagram – Showing Clock polarities and phases

http://www.maxim-ic.com.cn/images/appnotes/3078/3078Fig02.gif
Pros and Cons
Pros:
 Fast and easy

 Fast for point-to-point connections

 Easily allows streaming/Constant data inflow

 No addressing/Simple to implement

 Everyone supports it

Cons:
 SS makes multiple slaves very complicated

 No acknowledgement ability

 No inherent arbitration

 No flow control
Uses
 Some Serial Encoders/Decoders,
Converters, Serial LCDs, Sensors,
etc.
 Pre-SPI serial devices
Summary
 SPI – 4 wire serial bus protocol
 MOSI MISO SS SCLK wires
 Full duplex
 Multiple slaves, One master
 Best for point-to-point streaming
data
 Easily Supported
What is I C (or I2C)?
2
Where is it Used?

69
Basic Description

70
Connecting devices using I2C
• SDA: Serial Data
• SCL: Serial Clock
• Open-collector devices (Wire AND)

SDA

SCL

71
Clock

72
Sending bits of data
• The SDA values changes when SCL is low.
• The receiver reads SDA on the falling edge of SCL.

1
SDA
0

1
SCL
0
73
Start and Stop conditions
1
SDA

• Start 0

1
SCL
0

1
SDA
• Stop 0

1
SCL
0

74
Packet Format
• Each packet is 9 bits long.
• First 8 bits are put on SDA by the transmitter
• The 9th bit is an acknowledge by the receiver
• NACK
MSB(leave high) or ACK (pull down) LSB ACK
1
SDA
0

1
SCL
0 Time

1 2 3 4 5 6 7 8 9

Sent by sender

Sent by receiver

75
Master vs. Slave
• Master
• Begins the communication
• Chooses the slave
• Makes clock
• Sends or receives data
• Slave
• Responds to the master
• Each slave has a unique 7-bit address

76
Master vs. Slave (Cont.)
• There might be more than 1 master on an I2C bus
• Each device can be both Master and Slave

77
Steps of a communication
1. Start
2. Address
3. Send or Receive (Write or read)
4. Acknowledge
5. Send/receive a byte of data
6. Acknowledge
7. Stop

78
Sending a byte
• Sending 19 to device 25.

1 0 0 1 1 0 0 1 0 0 0 0 0 1 0 0 1 1 0
(Write) (ACK) (ACK)
SDA
0
1
SCL
0 Time

Start Address of slave (25) Send 19 Receive stop

R/W Accept
ACK

Sent by master

Sent by slave

79
Receiving a byte from Device 9

1 0 0 1 1 0 0 1 1 0 0 0 0 1 1 0 1 1 0
(ACK) (ACK)
(Read)
SDA
0
1
SCL
0 Time

Start Address of slave (9) Send 27 Receive stop

R/W Accept
ACK

Sent by master

Sent by slave

80
Multi-byte Burst Write
• Master can send multiple bytes of data to slaves.
• E.g. To store data in memories with I2C interface, first the address and then
data is sent. VCC

0x38 0x0F 0x05 0x16 0x0B Rpull-up

Rpull-up

SDA SCL SDA SCL

….
0x38
0x0F
0x05

….
0x16
0x0B
0x0E
0x0F
0x10
0x11
0x12

….
MCU 1 Device 0x38
81
Repeated start
• A new Start condition before the Stop condition

1
SDA
0 ….
1
SCL
0 ….
Start Repeated
start

82
Repeated-Start and Multi-byte Burst
Read
• Reading from location 0x0F of memory:
• Send the address of memory for write
• Write the address of memory location to be read (0x0F)
• Make a repeated-start and send the address of memory for read
• Get data and send Ack. as long as, you want to get the next byte

83
Exercise: How fast can I2C run?
• How fast can you run it?
• Assumptions
– 0’s are driven
– 1’s are “pulled up”
• Some working figures
– Rp = 10 kΩ
– Ccap = 100 pF
– VDD = 5 V
– Vin_high = 3.5 V
• Recall for RC circuit
– Vcap(t) = VDD(1-e-t/τ)
– Where τ = RC

84
Exercise: Bus bit rate vs Useful data rate
• An I2C “transactions” involves the following bits
– <S><A6:A0><R/W><A><D7:D0><A><F>
• Which of these actually carries useful data?
– <S><A6:A0><R/W><A><D7:D0><A><F>
• So, if a bus runs at 400 kHz
– What is the clock period?
– What is the data throughput (i.e. data-bits/second)?
– What is the bus “efficiency”?

85
LIN (Local Interconnect Network)
• LIN protocol was developed in the end of 1990 by group of automotive OEMs and suppliers
joined with semiconductor and tool producer
• LIN is a universal asynchronous receiver-transmitter (UART) – based
• LIN network is a single-master, multiple-slave networking architecture
LIN (Local Interconnect Network)
Key benefits:
• LIN protocol provides a cost-effective networking option for connecting switches, sensors and
lamps in the vehicle where the bandwidth and versatility of CAN is not required
• LIN master node can be connected to higher level of network such as CAN to extend the
communication of in-vehicle networking all the way to individual sensor or actuator
• Complements CAN as a cost-effective sub-network
• LIN protocol can be generated by standard asynchronous communication interfaces (SCI,
UART) with no hardware required
• Synchronization mechanism means no quartz oscillator required at slave nodes
• No protocol license fee
LIN (Local Interconnect Network)
Typical Applications:
• Steering Wheel: Cruise Control, Wiper, Turning Light, Climate Control, Radio
• Roof: Rain Sensor, Light Sensor, Light Control, Sunroof
• Engine/Climate: Sensors, Small Motors, Control Panel (Climate)
• Door/Seat: Mirror, Central ECU, Mirror Switch, Window Lift, Door Lock, Seat Position
Motors, Occupant Sensors, Seat Control Panel
 FlexRay

supports data rates up to 10 Mbit/s

supports both star and "party line" bus topologies

has two independent data channels for fault-tolerance

bus operates on a time cycle, divided into two parts:
 static segment: preallocated into slices for individual communication
types, providing stronger determinism thanits predecessor CAN
 dynamic segment: operates more like CAN, with nodes taking control of
 the bus as available, allowing event-triggered behavior
 FlexRay

Each ECU has an independent clock
 clock drift must be not more than 0.15% from the reference clock (max clock difference will be 0.3%)
 if ECU-s is a sender and ECU-r is a receiver, then for every 300 cycles of the sender there will be between
299 and 301 cycles of the receiver
 Clocks resynchronized frequently

only one ECU writes to the bus.

Each bit to be sent is held on the bus for 8 sample clock cycles.

The receiver keeps a buffer of the last 5 samples, and uses the majority of the last 5 samples as
the input signal.

If nothing is being communicated, the bus is held in state 1 (high voltage), so every receiver
knows that the communication started when the voltage drops to 0.

Physical Frame format [Tx start (TSS) – 0, Frame Start (FSS) – 1, M x (BSS0 (1), BSS1 (0),
Data), Frame End (FES) – 0, Transmission End (TES) – 1]
CAN (Controller Area
Network)
• CAN protocol was developed in 1980 by Robert Bosch for automotive applications
• The protocol was official released in 1986 by Society of Automotive Engineer (SAE).
• Since 1993 CAN was standardized and available as ISO standard (ISO 11898)
• CAN network made up of CAN nodes (ECUs) with CAN interface
• ECUs exchange data over their individual CAN interfaces and a transmission medium (CAN
bus) that interconnects all the CAN nodes
Before CAN

92
With CAN
The solution to this problem was the connection of the control systems via a serial bus
system. This bus had to fulfill some special requirements due to its usage in a vehicle. With
the use of CAN, point-to-point wiring is replaced by one serial bus connecting all control
systems. This is accomplished by adding some CAN-specific hardware to each control unit
that provides the "rules" or the protocol for transmitting and receiving information via the
bus.

93
The CAN bus

• CAN is a broadcast type of bus.

• This means that all nodes can "hear" all transmissions. There is no way
to send a message to just a specific node; all nodes will invariably pick
up all traffic. The CAN hardware, however, provides local filtering so
that each node may react only on the “interesting” messages.

94
Basic Configuration

95
CAN Bus Overview
• The physical layer uses differential transmission on a twisted pair wire. The bus
uses Non-Return To Zero (NRZ) with bit-stuffing.
• The nodes are connected to the bus in a wired-and fashion: if just one node is
driving the bus to a logical 0, then the whole bus is in that state regardless of the
number of nodes transmitting a logical 1.
• Max. transfer rate of 1000 kilobits per second at a maximum bus length of 40
meters or 130 feet when using a twisted wire pair which is the most common bus
medium used for CAN.
• Message length is short with a maximum of 8 data bytes per message and there
is a low latency between transmission request and start of transmission. The
messages are protected by a CRC type checksum

96
CAN Bus Overview
• The bus access is handled via the advanced serial communications protocol
Carrier Sense Multiple Access/Collision Detection with Non-Destructive
Arbitration. This means that collision of messages is avoided by bitwise
arbitration without loss of time.
• There is no explicit address in the messages, instead, each message carries a
numeric value which controls its priority on the bus, and may also serve as an
identification of the contents of the message.
• An elaborate error handling scheme that results in retransmitted messages when
they are not properly received.
• There are effective means for isolating faults and removing faulty nodes from the
bus.

97
Basic Bit Encoding

98
CAN Bus Characterstics

99
Bus Characteristics – Wired AND

Only if all nodes transmit recessive bits If any one node transmits a dominant bit
(ones), the Bus is in the recessive state. (zero), the bus is in the dominant state.

T is Transmitter, R is receiver. Note nodes can therefore check the line while
transmitting. This is important particularly during arbitration.

100
Bus Access and Arbitration – CSMA/CD NDA
CSMA/CD NDA – Carrier Sense Multiple Access/Collision avoidance by Non Destructive
arbitration

101
Bus Transmission Speed
Arbitration limits bus speed. Maximum speed = 2 x tpd
tpd = propagation delay of electrical medium

104
The Can Protocol
• Specifies how small packets of data may be transported from point A
to point B using a shared communications medium.
• It (quite naturally) contains nothing on topics such as
• flow control
• transportation of data larger than can fit in a 8-byte message
• node addresses
• establishment of communication, etc.

105
The CAN Standard
• The CAN standard defines four message types
• Data Frame – the predominantly used message type
• Remote Frame
• Error Frame
• Overload Frame
• The messages uses a clever scheme of bit-wise arbitration to control access to the
bus, and each message is tagged with a priority.
• The CAN standard also defines an elaborate scheme for error handling and
confinement.
• CAN may implemented using different physical layers, and there are also a
number of different connector types in use.

106
1. The Data Frame
• Summary: "Hello everyone, here's some data labeled X,
hope you like it!"
• The Data Frame is the most common message type. It comprises the following
major parts (a few details are omitted for the sake of brevity):
• the Arbitration Field, which determines the priority of the message when two or
more nodes are contending for the bus. The Arbitration Field contains:
• For CAN 2.0A, an 11-bit Identifier and one bit, the RTR bit, which is dominant for data
frames.
• For CAN 2.0B, a 29-bit Identifier (which also contains two recessive bits: SRR and IDE)
and the RTR bit.
• the Data Field, which contains zero to eight bytes of data.
• the CRC Field, which contains a 15-bit checksum calculated on most parts of the
message. This checksum is used for error detection.
• an Acknowledgement Slot; any CAN controller that has been able to correctly
receive the message sends an Acknowledgement bit at the end of each message.
The transmitter checks for the presence of the Acknowledge bit and retransmits
the message if no acknowledge was detected.
107
CAN Data Frames
Note 1: It is worth noting that the presence of an Acknowledgement Bit on the bus does not mean that
any of the intended addressees has received the message. The only thing we know is that one or more
nodes on the bus has received it correctly
Note 2: The Identifier in the Arbitration Field is not, despite of its name, necessarily identifying the
contents of the message.
• CAN 2.0A (“standard CAN” 11-bit ID) Data Frame.

 CAN 2.0B (“extended CAN” 29-bit ID) Data Frame.

108
2. The Remote Frame
• Summary: "Hello everyone, can somebody please produce the data
labeled X?"

• The Remote Frame is just like the Data Frame, with two important differences:
• It is explicitly marked as a Remote Frame (the RTR bit in the Arbitration Field is
recessive), and
• there is no Data Field.
• The intended purpose of the Remote Frame is to solicit the transmission of the
corresponding Data Frame. If, say, node A transmits a Remote Frame with the
Arbitration Field set to 234, then node B, if properly initialized, might respond
with a Data Frame with the Arbitration Field also set to 234.
• Remote Frames can be used to implement a type of request-response type of bus
traffic management. In practice, however, the Remote Frame is little used. It is
also worth noting that the CAN standard does not prescribe the behaviour
outlined here. Most CAN controllers can be programmed either to automatically
respond to a Remote Frame, or to notify the local CPU instead.

109
Remote Frame (contd.)
• There's one catch with the Remote Frame: the Data Length Code
must be set to the length of the expected response message.
Otherwise the arbitration will not work.
• Sometimes it is claimed that the node responding to the Remote
Frame is starting its transmission as soon as the identifier is
recognized, thereby "filling up" the empty Remote Frame. This is
not the case.
• A Remote Frame (2.0A type):

110
3. The Error Frame
Summary: (everyone, aloud) "OH DEAR, LET'S TRY AGAIN"
Simply put, the Error Frame is a special message that violates the framing rules of a
CAN message. It is transmitted when a node detects a fault and will cause all other
nodes to detect a fault - so they will send Error Frames, too. The transmitter will then
automatically try to retransmit the message. There is an elaborate scheme of error
counters that ensures that a node can't destroy the bus traffic by repeatedly
transmitting Error Frames.

The Error Frame consists of an Error Flag, which is 6 The Error Frame
bits of the same value (thus violating the bit-stuffing
rule) and an Error Delimiter, which is 8 recessive
bits. The Error Delimiter provides some space in
which the other nodes on the bus can send their
Error Flags when they detect the first Error Flag.

111
4 The Overload Frame
Summary: "I'm a very busy little 82526 device, could you please wait for a
moment?"
• The Overload Frame is mentioned here just for completeness. It is very similar to
the Error Frame with regard to the format and it is transmitted by a node that
becomes too busy. The Overload Frame is not used very often, as today's CAN
controllers are clever enough not to use it. In fact, the only controller that will
generate Overload Frames is the now obsolete 82526

112
ISO Physical Layer
One of the most common and
cheapest implementations is to
use a twisted wire pair. The bus
lines are then called "CAN_H" and
"CAN_L". The two bus lines
CAN_H and CAN_L are driven by
the nodes with a differential
signal. The twisted wire pair is
terminated by terminating
resistors at each end of bus line,
typically 120 ohms.

113
CAN Transceiver

A CAN transceiver always has two bus pins: one for the CAN high line (CANH) and one for the CAN low
line (CANL).
CAN and EMI

Due to the differential nature of transmission CAN is insensitive to electromagnetic

interference, because both bus lines are affected in the same way which leaves the
differential signal unaffected.
To reduce the sensitivity against electromagnetic interference even more, the bus lines
can additionally be shielded. This also reduces the electromagnetic emission of the bus
itself, especially at high baudrates.
115
Standardisation
•Vehicle bus system applications can be separated in three different categories according
to their real-time capabilities.
• Class A for a low speed bus with bit rates up to 10 kbps, e.g for body control
applications,
• Class B for a low speed bus with bit rates from 10 kbps to 125 kbps, e.g. for
dashboard and diagnostics,
• Class C for a high speed bus with bit rates from 125 kbps to 1 Mbps for real time
applications like engine management, Gearbox, ABS etc.
•

For the use of CAN in vehicles two standards have

been defined for the bus interface:
CAN High Speed according to ISO-IS 11898 for
bit rates between 125 kbps and 1 Mbps
CAN Low Speed according to ISO-IS 11519-2 for
bit rates up to 125 kbps

116
Standard and Implementation
Bus Levels according to ISO-IS
11898

• These are the bus levels according to ISO-IS 11898. A recessive bit is represented by
both CAN bus lines driven to a level of about 2.5 V so that the differential voltage
between CAN_H and CAN_L is around 0 V.
• A dominant bit is represented by CAN_H going to about 3.5 V and CAN_L going to
about 1.5 V. This results in a differential voltage for a dominant bit of about 2V.
• ISO 11898-3 allows data rates up to 125 kbit/s. It is primarily used in the convenience
area of the automobile. ISO 11898-2 allows data rates up to 1 Mbit/s. Consequently,
ISO 11898-2 is primarily used in the powertrain and chassis areas of the automobile.
118
A Basic CAN controller

• Cheap CAN controller – CPU could get overrun with messages even
if it didn’t need them.

120
Full CAN Controller
• Hardware message filters sort & filter messages without
interrupting CPU

121
CAN (SAE J1939) Example: Caterpillar 797

125
Caterpillar example

126
Caterpillar example

127
128