cs401 PDF

04 May
2012
MIDTERM EXAMINATION CS401- All Mcqz and Subjective

Solved With Reference -:: SOLVED BY:SaHeR
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MIDTERM EXAMINATION
CS401- Computer Architecture and Assembly Language Programming
All Mcqz and Subjective Solved With Reference
SOLVED BY: SaHeR
For any help in studies contact my id
Serious.sahar6@gmail.com
04 May
2012

OBJECTIVE (MCQZ):-
Question No: 1 ( Marks: 1 ) - Please choose one

After the execution of SAR instruction
The msb is replaced by a 0
The msb is replaced by 1
The msb retains its original value
The msb is replaced by the value of CF
RETF will pop the offset in the
BP
IP ref page :69
SP
SI
Reference:
RETF will pop the offset in the instruction
Pointer followed by popping the segment in the code segment register.
The routine that executes in response to an INT instruction is called
ISR ref page no 103
IRS
ISP
IRT
MIDTERM EXAMINATION
SOLVED BY: SaHeR
04 May
2012

Reference:The routine that executes in response to an INT instruction is called the interrupt
service routine (ISR) or the interrupt handler.
The first instruction of COM file must be at offset:
0x0010
0x0100 ref page no :20
0x1000
0x0000
Ref:The first instruction of a COM file must be at
offset 0100 (decimal 255) as a requirement.
Far jump is not position relative but is _____
memory dependent
Absolute ref page no :46
temporary
indirect
Reference :Far jump is not position relative but is absolute.

Only _ instructions allow moving data from memory to memory.
string ref page no: 29
word
indirect
stack
Reference:Only string instructions allow moving data from
memory to memory
Question No: 7
( Marks: 1 )
- Please choose one
MIDTERM EXAMINATION
SOLVED BY: SaHeR
04 May
2012

After the execution of instruction RET 2
SP is incremented by 2
SP is decremented by 2
SP is incremented by 4
Question No: 8 ( Marks: 1 )
DIV instruction has
- Please choose one
Two forms ref page no :85

Three forms
Four forms
Five forms
Reference:
There are two forms of the
DIV instruction. The first form divides a 32bit number in DX:AX by its 16bit
operand and stores the 16bit quotient in AX and the 16bit remainder in DX.
When the operand of DIV instruction is of 16 bits then implied dividend will be of
8 bits
16 bits
32 bits
page no:85
64 bits
For example DIV BL
has an 8bit operand, so the implied dividend is 16bit and is stored in the AX
register and DIV BX has a 16bit operand, so the implied dividend is 32bit
After the execution of MOVS instruction which of the following registers are updated
MIDTERM EXAMINATION
SOLVED BY: SaHeR
04 May
2012

SI only
DI only
SI and DI only
Reference Page no: 98
SI, DI and BP only

In 8088 architecture, whenever an element is pushed on the stack
SP is decremented by 2 Page no :68
Reference:
Whenever an element is pushed on the stack SP is decremented by two as
the 8088 stack works on word sized elements.
When a very large number is divided by very small number so that the quotient is larger
than the space provided, this is called
Divide logical error
Divide overflow error Page no:85
Divide syntax error
An illegal instruction
Reference:
If a large number is divided by a very small number it is possible that the
quotient is larger than the space provided for it in the implied destination. In
this case an interrupt is automatically generated and the program is usually
terminated as a result. This is called a divide overflow error.
MIDTERM EXAMINATION
SOLVED BY: SaHeR
04 May
2012

In the word designated for one screen location, the higher address contains holds the
Foreground and background colors for the character
The character code
The attribute byte
The parameters
The dimensions
page no:81
Reference:The second byte in the word designated for one screen location holds the
foreground and background colors for the character. This is called its video
attribute or attribute byte.

Which of the following options contain the set of instructions to open a window to the
video memory?
mov AX, 0xb008
mov ES, AX
mov AX, 0xb800
mov ES, AX
page no : 85 and 86
mov AX, 0x8b00
mov ES, AX
mov AX, 0x800b
mov ES, AX
Reference:ES is initialized to video memory. AX holds the number to be
printed. BX is the desired base, and can be loaded from a parameter.
CX holds the number of digits pushed on the stack. This count is
Initialized to zero, incremented with every digit pushed and is used
when the digits are popped one by one
MIDTERM EXAMINATION
SOLVED BY: SaHeR
04 May
2012

In a video memory, each screen location corresponds to
One byte
Two bytes page no: 86
Four bytes
Eight bytes
Refernce:The next screen location is two bytes ahead so DI is incremented by
two. The process is repeated CX times which holds the number of
digits pushed on the stack.
Question No: 16 (Marks: 1) - Please choose one
The execution of the instruction mov word [ES: 0], 0x0741 will print character A on
screen , background color of the screen will be
Black page no:81
White
Red
Blue
Refernce:Now the
following instruction will print an A on the top left of the screen in white
color on black background.
mov word [es:0], 0x0741
Stack is a ______ that behaves in a first in last out manner.
Program
data structure page no 67
Heap
None of the Given
Reference:
Stack is a data structure that behaves in a first in last out manner.
The physical address of the stack is obtained by
MIDTERM EXAMINATION
SOLVED BY: SaHeR
04 May
2012

SS:SI combination
SS:SP combination page no :68
ES:BP combination
ES:SP combination
Reference:
The physical address
of the stack is obtained by the SS:SP combination.
Foreground and background parameter will be
32bits
16bits
8bits
4bits
The clear screen operation initialize whole block of memory
0741
page no :91
0417
0714
0174
Reference:
The clear screen operation
initializes this whole block to 0741.
In STOSB instruction, when DF is Set, SI is
Incremented by 1
Incremented by 2
Decremented by 1
page no :92
Decremented by 2
Reference:
SI will be incremented by one or two depending of whether STOSB or STOSW is used.
If DF is set SI will be decremented by one or two depending of whether
STOSB or STOSW is used.
Assembly language is:

Low-level programming language
High-level programming language
MIDTERM EXAMINATION
SOLVED BY: SaHeR
04 May
2012

Also known as machine language
Not considered closer to the computer
It is so easy
A 32 Bit processor has accumulator of -------- 8 bit
16 bit
32 bit page no :12
64 bit
Reference:
The word size of a processor is defined by the width of its
accumulator. A 32bit processor has an accumulator of 32 bits.
To transfer control back the RET instruction take
1 argument
1 argument
3 arguments
No arguments page no:64
Refernce:
RET takes no arguments and transfers control back to the
instruction following the CALL that took us in this subroutine.
RET is executed, it recovers the values from

Register
Stack
Data segment
Code segment
To convert any digit to its ASCII representation
Add 0x30 in the digit
page no :80
Subtract 0x30 from the digit
Add 0x61 in the digit
Subtract 0x61 from the digit
Reference:For example converting the case of characters by adding or subtracting
0x20 from it. It also helps in converting a digit into its ASCII representation
by adding 0x30 to it.
MIDTERM EXAMINATION
SOLVED BY: SaHeR
04 May
2012

The prevalent convention in most high level languages is stack clearing by the
Caller
Callee
page no : 74
RET
Stack
Refernce:- Therefore the prevalent convention in most high

level languages is stack clearing by the callee.
After execution of JCXZ instruction CX will changed with flag affect.

CF
OF
DF
None of Above page no :43
Reference:One jump is special that it is not dependant on any flag. It is JCXZ, jump
if the CS register is zero. This is because of the special treatment of the CX
register as a counter. This jump is regardless of the zero flag. There is no
counterpart or not form of this instruction.
Execution of the instruction mov word [ES: 0], 0x0741 will print
A appear on the top left of screen page no :81
A appear on the top right of screen
A appear on the center of screen
A appear on the bottom left of screen
Reference:Since the first word is written to, the character will appear at the top left of
the screen.
If contains decimal -2 and BX contains decimal 2 then after the execution of instructions:
CMP AX, BX
JA label
Jump will be taken
MIDTERM EXAMINATION
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04 May
2012

Zero flag will set page no: 39
ZF will contain value -4
Jump will not be taken
Reference:For example a number 2 is represented in a word as 0002 while the
number -2 is represented as FFFE. In a byte they would be represented as 02
and FE. Now both have the same magnitude however the different sign has
caused very different representation in twos complement form. Now if the
intent is to use FFFE or decimal 65534 then the same data would be placed
in the word as in case of -2. In fact if -2 and 65534 are compared the
processor will set the zero flag signaling that they are exactly equal.
If D is 35 is shift to left 2 bits the new value
35
70
140
page no 52
17
Reference:
The shift logical left operation is the exact opposite of shift logical right. In
this operation the zero bit is inserted from the right and every bit moves one
position to its left with the most significant bit dropping into the carry flag.
Shift arithmetic left is just another name for shift logical left.
Execution of the instruction mov word [ES: 160], 0x1230 will print the character color
will
Green
page no : 81
White
Red
Black
Refernce:This is displayed 80 words after the start and there are 80 characters in
one screen row. Therefore this is displayed on the first column of the second
line. The ASCII code used is 30, which represents a 0 while the attribute
MIDTERM EXAMINATION
SOLVED BY: SaHeR
04 May
2012

byte is 12 meaning green color on black background.
Question No: 1
( Marks: 1 ) - Please choose one
To transfer control back the RET instruction take
1 argument
1 argument
3 arguments
No arguments
Question No: 2
In STOSB instruction SI is decremented or incremented by
4 12 3
Page: 92
Reference:SI will be
Incremented by one or two depending of whether STOSB or STOSW is used.
Question No: 3
CMPS instruction subtracts the source location to the

destination location. Destination location always lies in
DS:SI
DS:DI
ES:SI
MIDTERM EXAMINATION
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04 May
2012

ES:DI page no:93
Reference:CMPS subtracts the source location DS:SI from the destination location
ES:DI.
Question No: 4
Regarding assembler, which statement is true:
Assembler converts mnemonics to the corresponding OPCODE
Assembler converts OPCODE to the corresponding
mnemonics Assembler executes the assembly code all
at once
Assembler executes the assembly code step by step
Question No: 5
If BB is the OPCODE of the instruction which states to move a

constant value to AX register, the hexadecimal representation (Using
little Endian notation) of the instruction Mov AX,336 (150 in
hexadecimal number system) will be:
0xBB0150
0x5001BB
0x01BB50
0xBB5001
Question No: 6
In the instruction MOV AX, 5 the number of operands are

1
2
MIDTERM EXAMINATION
SOLVED BY: SaHeR
04 May
2012

3
4
Question No: 7
The maximum parameters a subroutine can receive (with the help of registers) are
6
7 page no 72
8
9
Refernce:The maximum parameters a subroutine can receive
are seven when all the general registers are used.
Question No: 8
In assembly the CX register is used normally as a ______________register.

source
counter
index
pointer
Question No: 9
All the addressing mechanisms in iAPX 8 8 return a number called _ _ _ _ _ _ _ _ _ _ _ _ _ address .
effective page no 33
faulty
MIDTERM EXAMINATION
SOLVED BY: SaHeR
04 May
2012

indirect
direct
Reference:All the addressing mechanisms in iAPX88 return a number called effective
address.
Question No: 10
When a 16 bit number is divided by an 8 bit number, the dividend will be in
AX page no 85
BX
CX
DX
Reference:The implied dividend is 16bit and is stored in the AX
register
Question No: 11
In Left-Shift-Operation the left most bit _______

will drop
will go into CF page no:52
Will come to the right most
will be always 1
References:MIDTERM EXAMINATION
SOLVED BY: SaHeR
04 May
2012

The shift logical left operation is the exact opposite of shift logical right. In
this operation the zero bit is inserted from the right and every bit moves one
position to its left with the most significant bit dropping into the carry flag.
Question No: 12
Suppose the decimal number "35" after shifting its binary two bits
to left, the new value becomes _________
35
70
140 page no:52
17
Reference:The left shifting operation is basically multiplication by 2 while the right
shifting operation is division by two.
Question No: 14
Which mathematical operation is dominant during the execution of SCAS instruction

Division
Multiplication
Addition
Subtraction not sure
MIDTERM EXAMINATION
SOLVED BY: SaHeR
04 May
2012

Q=1:
Which bit of attributes byte represents the blue component of foreground color?
0
1
2
3
Page no 81
0 Blue component of foreground color
Q=2:
The clear screen operation initializes the whole block of video memory to:
0417
0714
0741
017
Page no 91
For example the clear screen operation
initializes this whole block to 0741.
Q=3:
When the operand of DIV instruction is of 16 bit then implied dividend will be of
64-bit
32-bits
16-bits
8--bits
Q=4
Which of the following is the pair of register used to access memory in string
instruction?
DI and BP
SI and BP
DI and SI
DS and Si
Page no :91
DI and SI are used to access memory. SI and DI
are called source index and destination index because of string instructions.
Question No: 16 ( Marks: 1 ) - Please choose
MIDTERM EXAMINATION
SOLVED BY: SaHeR
04 May
2012

one In STOSB instruction, when DF is clear, SI
is
1. Incremented by 1
2. Incremented by 2
3. Decremented by 1 page no:92
4. Decremented by 2
References:If DF is set SI will be decremented by one or two depending of whether
STOSB or STOSW is used.
NOTE:The lecture number given before every mcq below is according to lms lecture
schedule not the handouts.
Question # 1
There are three busses to communicate the processor and memory named as
_____________
1) : address bus.,data bus and data bus.
2) : addressing bus.,data bus and data bus.
3) : address bus.,datamove bus and data bus.
4) : address bus.,data bus and control bus..
Correct Option : 4 From : Lecture 1
Question # 2
The address bus is unidirectional and address always travels from processor to
memory.
1) : TRUE
2) : FALSE
3) :
4) :
Question # 3
Data bus is bidirectional because________
1) : To way
2) : Data moves from both, processor to memory and memory to processor,
3) : Data moves from both, processor to memory and memory to data Bus,
4) : None of the Given
Question # 4
Control bus________
1) : is Not Important.
MIDTERM EXAMINATION
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04 May
2012

2) : is Important .
3) : bidirectional.
4) : unidirectional .
Question # 5
A memory cell is an n-bit location to store data, normally ________also called a
byte
1) : 4-bit
2) : 8-bit
3) : 6-bit
4) : 80-bit
Question # 6
The number of bits in a cell is called the cell width.______________ define the
memory completely.
1) : Cell width and number of cells,
2) : cell number and width of the cells,
3) : width
4) : Height
Question # 7
for memory we define two dimensions. The first dimension defines how many
__________bits are there in a single memory cell.
1) : parallel
2) : Vertical
3) : long
4) : short
Question # 8
__________ operation requires the same size of data bus and memory cell
width.
1) : Normal
2) : Best and simplest
3) : first
MIDTERM EXAMINATION
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2012

Question # 9
Control bus is only the mechanism. The responsibility of sending the appropriate
signals on the control bus to the memory is of the_________________.
1) : Data Bus
2) : processor
3) : Address Bus
Question # 10
In total: dw 0 Opcode total is a ___________
1) : Literal
2) : Variable
3) : Label
4) : Starting point
Question # 14
The basic purpose of a computer is to perform operations, and operations need
____________.
1) : order
2) : nothing
3) : operands
4) : bit
Question # 15
Registers are like a scratch pad ram inside the processor and their operation is
very much like normal______________.
1) : Number
2) : opreations
3) : memory cells
Question # 16
There is a central register in every processor called the _______ and The word
size of a processor is defined by the width of its__________.
1) : accumulator,accumulator
2) : data bus,accumulator
MIDTERM EXAMINATION
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04 May
2012

3) : accumulator, Address Bus
4) : accumulator,memory
Question # 17
___________does not hold data but holds the address of data
1) : Pointer, Segment, or Base Register
2) : Pointer, Index, or Base Register
3) : General Registers
4) : Instruction Pointer
Question # 18
The program counter holds the address of the next instruction to be
_____________
1) : executed.
2) : called
3) : deleted
4) : copy
Question # 19
There are _____ types of instruction groups
1) : 4
2) : 5
3) : 3
4) : 2
Question # 20
These instructions are used to move data from one place to another.
1) : TRUE
2) : FALSE
3) :
4) :
Question # 21
mov instruction is related to the _______ *****.
1) : Arithmetic and Logic Instructions
2) : Data Movement Instructions
MIDTERM EXAMINATION
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04 May
2012

3) : Program Control Instructions
4) : Special Instructions
Question # 22
______________allow changing specific processor behaviors and are used to
play with it.
1) : Special Instructions
2) : Data Movement Instructions
3) : Program Control Instructions
4) : Arithmetic and Logic Instructions
Question # 23
8088 is a 16bit processor with its accumulator and all registers of __________.
1) : 32 bits
2) : 6 bits
3) : 16 bits
4) : 64 bits
Question # 24
The __________ of a processor means the organization and functionalities of the
registers it contains and the instructions that are valid on the processor.
1) : Manufactures
2) : architecture
3) : Deal
Question # 25
Intel IAPX88 Architecture is ___________
1) : More then 25 old
2) : New
3) : Not Good
Question # 26
The iAPX88 architecture consists of______registers.
1) : 13
MIDTERM EXAMINATION
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04 May
2012

2) : 12
3) : 9
4) : 14
Question # 27
General Registers are ______________
1) : AX, BX, CX, and DX
2) : XA, BX, CX, and DX
3) : SS,SI and DI
4) : 3
Question # 28
AX means we are referring to the extended 16bit A register. Its upper and lower
byte are separately accessible as ________________.
1) : AH and AL
2) : A Lower and A Upper
3) : AL, AU
4) : AX
Question # 29
AX is General purpose Register where A stands for__________.
1) : Acadmic
2) : Ado
3) : Architecture
4) : Accumulator
Question # 30
The B of BX stands for _________because of its role in memory addressing.
1) : Busy
2) : Base
3) : Better
Question # 31
The D of DX stands for Destination as it acts as the destination in
_____________________.
MIDTERM EXAMINATION
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04 May
2012

1) : I/O operations
2) : operations
3) : memory cells
4) : Memory I/O operations
Question # 32
The C of CX stands for Counter as there are certain instructions that work with
an automatic count in the ___________.
1) : DI register
2) : BX register
3) : CX register
4) : DX register
Question # 33
_________are the index registers of the Intel architecture which hold address of
data and used in memory access.
1) : SI and SS
2) : PI and DI
3) : SI and IP
4) : SI and DI
Question # 34
In Intel IAPX88 architecture ___________ is the special register containing the
address of the next instruction to be executed.
1) : AX
2) : PI
3) : IP
4) : SI
Question # 35
SP is a memory pointer and is used indirectly by a set of ____________.
1) : instructions
2) : Pointers
3) : Indexes
4) : Variables
MIDTERM EXAMINATION
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04 May
2012

Question # 36
___________is also a memory pointer containing the address in a special area
of memory called the stack.
1) : SP
2) : BP
3) : PB
4) : AC
Question # 37
____________is bit wise significant and accordingly each bit is named
separately.
1) : AX
2) : FS
3) : IP
4) : Flags Register
Question # 38
When two 16bit numbers are added the answer can be 17 bits long, this extra bit
that wont fit in the target register is placed in the __________where it can be
used and tested
1) : carry flag
2) : Parity Flag
3) : Auxiliary Carry
4) : Zero Flag
Question # 39
Program is an ordered set of instructions for the processor.
1) : TRUE
2) : FALSE
3) :
4) :
Question # 40
For Intel Architecture operation destination, source is way of writing things.
1) : TRUE
2) : FALSE
3) :
MIDTERM EXAMINATION
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04 May
2012

4) :
Question # 41
Operation code add ax, bx ____________.
1) : Add the bx to ax and change the bx
2) : Add the ax to bx and change the ax
3) : Add the bx to ax and change the ax
4) : Add the bx to ax and change nothing
Question # 42
The maximum memory iAPX88 can access is________________.
1) : 1MB
2) : 2MB
3) : 3MB
4) : 128MB
Question # 43
The maximum memory iAPX88 can access is 1MB which can be accessed with
_______________.
1) : 18 bits
2) : 20 bits
3) : 16 bits
4) : 2 bits
Question # 44
_____________address of 1DED0 where the opcode B80500 is placed.
1) : physical memory
2) : memory
3) : efective
Question # 45
16 bit of Segment and Offset Addresses can be converted to 20bit Address i.e
Segment Address with lower four bits zero + Offset Address with ______ four bits
zero = 20bit Physical Address
1) : Middle
MIDTERM EXAMINATION
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2012

2) : lower
3) : Top
4) : upper
Question # 46
When adding two 20bit Addresses a carry if generated is dropped without being
stored anywhere and the phenomenon is called address______.
1) : wraparound
2) : mode
3) : ping
4) : error
Question # 47
segments can only be defined a 16byte boundaries called _____________
boundaries.
1) : segment
2) : paragraph
3) : Cell
4) : RAM
Question # 48
in a Program CS, DS, SS, and ES all had the same value in them. This is called
_____________________.
1) : equel memory
2) : overlapping segments
3) : segments hidding
4) : overlapping SI
Question # 49
db num1 size of the memory is _____________
1) : 1byte
2) : 4bit
3) : 16bit
4) : 2byte
MIDTERM EXAMINATION
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04 May
2012

Comments for the 4 are :
1) : No comments Will be
2) : ; accumulate sum in add
3) : ; accumulate sum in ax
4) : ; accumulate sum in Bx
Question # 51
In mov ax, bx is _____________ Addressing Modes.
1) : Immediate
2) : Indirect
3) : Direct
4) : Register
Question # 52
In mov ax, [bx] is _____________ Addressing Modes
1) : Based Register Indirect
2) : Indirect
3) : Base Indirect
4) : Immediate
Question # 53
In mov ax, 5 is _____________ Addressing Modes
1) : Immediate
2) : Indirect
3) : Indirect
4) : Register
Question # 54
In mov ax, [num1+bx] is ___________ ADDRESSING
1) : OFFSET+ Indirect
2) : Register + Direct
3) : Indirect + Reference
4) : BASEd REGISTER + OFFSET
Question # 55
base + offset addressing gives This number which came as the result of
MIDTERM EXAMINATION
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04 May
2012

addition is called the _______.
1) : Address
2) : mode
3) : effective address
4) : Physical Address
Correct Option :
Question # 56
mov ax, [cs:bx] associates _________ for this one instruction
1) : CS with BX
2) : BX with CS
3) : BX with AX
Question # 57
For example
BX=0100
DS=FFF0
And Opcode are;
move [bx+0x0100], Ax
now what is the effective memory address;
1) : 0020
2) : 0200
3) : 0300
4) : 0x02
Question # 58
For example
BX=0100
DS=FFF0
And Opcode are;
move [bx+0x0100], Ax
now what is the physical memory address;
1) : 0020
2) : 0x0100
3) : 0x10100
4) : 0x100100
MIDTERM EXAMINATION
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04 May
2012

Question # 59
In mov [1234], al is _____________ Addressing Modes.
1) : Immediate
2) : Indirect
3) : Direct
4) : Register
Question # 60
In mov [SI], AX is _____________ Addressing Modes.
1) : Basef Register Indirect
2) : Indirect
3) : Indexed Register Indirect
4) : Immediate
Question # 61
In mov ax, [bx - Si] is ___________ ADDRESSING
1) : Basef Register Indirect
2) : Indirect
3) : Direct
4) : illegal
Question # 62
In mov ax, [BL] there is error i.e. __________
1) : Address must be 16bit
4) : 8 bit to 16 bit move illegal
Question # 63
In mov ax, [SI+DI] there is error i.e. __________
1) : Two indexes cant use as Memory Address
2) : index cant use as Memory Address
3) : I don't Know
MIDTERM EXAMINATION
SOLVED BY: SaHeR
04 May
2012

Question # 24
The __________ of a processor means the organization and
functionalities of the registers it contains and the instructions that
are valid on the processor.
1) : Manufactures
2) : architecture
3) : Deal
Question # 25
Intel IAPX88 Architecture is ___________
1) : More then 25 old
2) : New
3) : Not Good
Question # 26
The iAPX88 architecture consists of______registers.
1) : 13
2) : 12
3) : 9
4) : 14
Correct Option : 4 From : Lectur
Question # 27
General Registers are ______________
1) : AX, BX, CX, and DX
2) : XA, BX, CX, and DX
3) : SS,SI and DI
4) : 3
Question # 28
AX means we are referring to the extended 16bit A register. Its
upper and lower byte are separately accessible as ________________.
1) : AH and AL
2) : A Lower and A Upper
3) : AL, AU
4) : AX
MIDTERM EXAMINATION
SOLVED BY: SaHeR
04 May
2012

Question # 29
AX is General purpose Register where A stands for__________.
1) : Acadmic
2) : Ado
3) : Architecture
4) : Accumulator
Question # 30
The B of BX stands for _________because of its role in memory addressing.
1) : Busy
2) : Base
3) : Better
Question # 31
The D of DX stands for Destination as it acts as the destination in
_____________________.
1) : I/O operations
2) : operations
3) : memory cells
4) : Memory I/O operations
Question # 32
The C of CX stands for Counter as there are certain instructions that
work with an automatic count in the ___________.
1) : DI register
2) : BX register
3) : CX register
4) : DX register
Question # 33
_________are the index registers of the Intel architecture which hold
address of data and used in memory access.
1) : SI and SS
2) : PI and DI
3) : SI and IP
4) : SI and DI
MIDTERM EXAMINATION
SOLVED BY: SaHeR
04 May
2012

Question # 34
In Intel IAPX88 architecture ___________ is the special register
containing the address of the next instruction to be executed.
1) : AX
2) : PI
3) : IP
4) : SI
Question # 35
SP is a memory pointer and is used indirectly by a set of ____________.
1) : instructions
2) : Pointers
3) : Indexes
4) : Variables
Question # 36
___________is also a memory pointer containing the address in a
special area of memory called the stack.
1) : SP
2) : BP
3) : PB
4) : AC
Question # 37
____________is bit wise significant and accordingly each bit is named
separately.
1) : AX
2) : FS
3) : IP
4) : Flags Register
Question # 38
When two 16bit numbers are added the answer can be 17 bits long, this
extra bit that wont fit in the target register is placed in the
__________where it can be used and tested
1) : carry flag
MIDTERM EXAMINATION
SOLVED BY: SaHeR
04 May
2012

2) : Parity Flag
3) : Auxiliary Carry
4) : Zero Flag
Question # 39
Program is an ordered set of instructions for the processor.
1) : TRUE
2) : FALSE
3) :
4) :
Question # 40
For Intel Architecture operation destination, source is way of writing things.
1) : TRUE
2) : FALSE
3) :
4) :
Question # 41
Operation code add ax, bx ____________.
1) : Add the bx to ax and change the bx
2) : Add the ax to bx and change the ax
3) : Add the bx to ax and change the ax
4) : Add the bx to ax and change nothing
Question # 42
The maximum memory iAPX88 can access is________________.
1) : 1MB
2) : 2MB
3) : 3MB
4) : 128MB
Question # 43
The maximum memory iAPX88 can access is 1MB which can be accessed with
_______________.
1) : 18 bits
2) : 20 bits
3) : 16 bits
4) : 2 bits
MIDTERM EXAMINATION
SOLVED BY: SaHeR
04 May
2012

Question # 44
_____________address of 1DED0 where the opcode B80500 is placed.
1) : physical memory
2) : memory
3) : efective
Question # 45
16 bit of Segment and Offset Addresses can be converted to 20bit Address i.e
Segment Address with lower four bits zero + Offset Address with ______
four bits zero = 20bit Physical Address
1) : Middle
2) : lower
3) : Top
4) : upper
Question # 46
When adding two 20bit Addresses a carry if generated is dropped
without being stored anywhere and the phenomenon is called
address______.
1) : wraparound
2) : mode
3) : ping
4) : error
Question # 47
segments can only be defined a 16byte boundaries called _____________
boundaries.
1) : segment
2) : paragraph
3) : Cell
4) : RAM
Question # 48
in a Program CS, DS, SS, and ES all had the same value in them. This
MIDTERM EXAMINATION
SOLVED BY: SaHeR
04 May
2012

is called _____________________.
1) : equel memory
2) : overlapping segments
3) : segments hidding
4) : overlapping SI
One screen location corresponds to a
Byte
Word
ref page no: 80
Double byte
Double word
Reference:One screen location corresponds to a word in the video memory
After the execution of PUSH AX statement

AX register will reside on the stack
A copy of AX will go on the stack
The value of AX disappear after moving on stack
Stack will send an acceptance message
physical address of the stack is obtained by
SS:SI combination
SS:SP combination
ES:BP combination
ES:SP combination
If the address of memory location Num1 is 0117 and its content is 0005 then after
MIDTERM EXAMINATION
SOLVED BY: SaHeR
04 May
2012

execution of the instruction mov bx, Num1 bx will contain
0005
0117
Num1
1701
In STOS instruction, the implied source will always be in
AL or AX registers page no :92
DL or DX registers
BL or BX registers
CL or CX registers
Reference:
The implied source will always be in AL or AX.
The shift logical right operation inserts
A zero at right
A zero at left page no:52
A one at right
A one at right
Reference:The shift logical right operation inserts a zero from the left
REP will always

Increment CX by 1
Increment CX by 2
Decrement CX by 1 page no :92
Decrement CX by 2
Reference:REP will always decrement CX like the LOOP
instruction and this cannot be changed with the direction flag.
When an item is pushed on the decrementing stack, the top of the stack is
MIDTERM EXAMINATION
SOLVED BY: SaHeR
04 May
2012

First decremented and then element copied on to the stack
First incremented and then element copied on to the stack
Decremented after the element copied on to the stack page no :68
Incremented after the element copied on to the stack
Reference:When an item is pushed on a decrementing stack, the top of the
stack is first decremented and the element is then copied into this space.
Assembly the CX register is used normally as a ______________register.

source
counter
index
pointer
Which is the unidirectional bus ?
(I) Control Bus
(II) Data Bus
(III) Address Bus
I only
II only
III only
I and II only
The basic function of SCAS instruction is to
Compare page no:92
Scan
Sort
Move data
Reference:SCAS compares a source byte or word in register AL or AX with the
destination string element addressed by ES:DI and updates the flags.
_______ register holds the address of next instruction is to be executed
Base pointer
Code segment
Source index
Program counter
MIDTERM EXAMINATION
SOLVED BY: SaHeR
04 May
2012

JC and JNC test the ____________ flag.

carry
parity
zero
sign
Page no 41
This jump is taken if
the last arithmetic
operation generated a
carry or required a
borrow. After a CMP it
is taken if the
unsigned source is
smaller than the
unsigned destination.
After the execution of REP instruction CX will be decremented then which of the
following flags will be affected?
CF
OF
DF
No flags will be affected
page no:92
Reference:REP will always decrement CX like the LOOP
instruction and this cannot be changed with the direction flag.
In string manipulation whenever an instruction needs a memory source, which of the
following will hold the pointer to it?
ES: DI
ES: BP
DS:BP
DS:SI
Refernce:-
page no 91
MIDTERM EXAMINATION
SOLVED BY: SaHeR
04 May
2012

SI and DI
are called source index and destination index because of string instructions.
Whenever an instruction needs a memory source, DS:SI holds the pointer to
it. An override is possible that can change the association from DS but the
default is DS. Whenever a string instruction needs a memory destination,
ES:DI holds the pointer to it.
Which bit sets the character "blinking" on the screen?

5
6
7 page no 81
8
Reference:When bit 7 is set the character keeps on blinking
on the screen.
If we want to divide a signed number by 2, this operation can better be accomplished by

SHR
SAR
SHL
SAL
Refernce:- However for signed numbers division by
two can be accomplished by using shift arithmetic right and not shift logical
right.
After the execution of STOSWB,the CX wil be..

Incremented by 1
Incremented by 2
Decremented by 1 page no :92
Decremented by 2
Refernce:It always
decrements by one
MIDTERM EXAMINATION
SOLVED BY: SaHeR
04 May
2012

Each screen location corresponds to a word; the lower byte of this word contains ____
The character code
The attribute byte
The parameters
The dimensions
not sure
In a video memory, each screen location corresponds to

One byte
Two bytes
Four bytes
Eight bytes
Reference:DI is incremented twice since each screen location corresponds to
two byte in video memory.
:-SUBJECTIVE-:
IF DF=0 what its represent and IF DF=1 what its represent ?
Page no:17
Specifically related to string instructions, this flag tells
whether the current operation has to be done from
bottom to top of the block (D=0) or from top to bottom
of the block (D=1).
IF=It tells whether the processor can be interrupted from
outside or not.
Q.
Relation between RET and CALL is dependent or independent.
Page no :64
The RET
works regardless of the CALL and the CALL works regardless of the RET. If
you CALL a subroutine it will not complain if there is no RET present and
similarly if you RET without being called it wont complain.
Q.
Write all steps of algorithm for printing number 352.
Page no 84
MIDTERM EXAMINATION
SOLVED BY: SaHeR
04 May
2012

For example 253 will be printed as 352. The remainder after
first division was 3, after second division was 5 and after the third division
was 2. We have to somehow correct the order so that the actual number 253
is displayed, and the trick is to use the stack since the stack is a Last In
First Out structure so if 3, 5, and 2 are pushed on it, 2, 5, and 3 will come
out in this order. The steps of our algorithm are outlined below.
Divide the number by base (10 in case of decimal)
The remainder is its right most digit
Convert the digit to its ASCII representation (Add 0x30 to the
remainder in case of decimal)
Save this digit on stack
If the quotient is non-zero repeat the whole process to get the next
digit, otherwise stop
Pop digits one by one and print on screen left to right
Q.
When the instruction "push ax" is executed in decrementing stack how the value of SP
will change
Page no 69
Push ax will push
the current value of the AX register on the stack. The operation of PUSH is
shown below.
SP SP 2
[SP] AX
Q.
Explain MUL instruction in both cases (i) if the source operand is byte (ii) if the source
operand is a word?
Page no 87
MUL (multiply) performs an unsigned multiplication of the source operand
and the accumulator. If the source operand is a byte, then it is multiplied by
MIDTERM EXAMINATION
SOLVED BY: SaHeR
04 May
2012

register AL and the double-length result is returned in AH and AL. If the
source operand is a word, then it is multiplied by register AX, and the
double-length result is returned in registers DX and AX.
Q#21 Mark 2
What are the instructions used by assembly language for permanent and temporary
diversions.
The instructions for permanent diversion in 8088 are the
jump instructions, while the instruction for temporary diversion is the CALL
instruction.
Q#22 Mark 2
Which instruction is used to determine zero bit in string.
MIDTERM EXAMINATION
SOLVED BY: SaHeR
04 May
2012

Q#23 Mark 3
Explain the use of TEST instruction.
Page no: 60
The test instruction is used for bit testing. BX holds the mask and in every next iteration
it is shifting left, as our concerned bit is now the next bit.
Q#24 Mark 3
Explain LES and LDS
Page no: 97
The string instructions need source and destination in the form of a segment offset pair.
LES and LDS load a segment register and a general purpose register from two
consecutive memory locations. LES loads ES while LDS loads DS. Both instructions has
two parameters, one is the general purpose register to be loaded and the other is the
memory location from which to load these registers. The major application of these
instructions is when a subroutine receives a segment offset pair as an argument and the
pair is to be loaded in a segment and an offset register.
Q#25 Mark 5
Describe local variables.
Page no: 75
Another important role of the stack is in the creation of local variables that are only
needed while the subroutine is in execution and not afterwards. They should not take
permanent space like global variables. Local variables should be created when the
subroutine is called and discarded afterwards. So that the spaced used by them can be
reused for the local variables of another subroutine. They only have meaning inside the
subroutine and no meaning outside it.
The most convenient place to store these variables is the stack. We need some special
manipulation of the stack for this task. We need to produce a gap in the stack for our
variables. This is explained with the help of the swap flag in the bubble sort example.
The swap flag we have declared as a word occupying space permanently is only needed
by the bubble sort subroutine and should be a local variable. Actually the variable was
introduced with the intent of making it a local variable at this time. The stack pointer
will be decremented by an extra two bytes thereby producing a gap in which a word can
reside. This gap will be used for our temporary, local, or automatic variable; however we
name it. We can decrement it as much as we want producing the desired space,
MIDTERM EXAMINATION
SOLVED BY: SaHeR
04 May
2012

however
the decrement must be by an even number, as the unit of stack operation is a word. In
our case we needed just one word. Also the most convenient position for this gap is
immediately after saving the value of SP in BP. So that the same base pointer can be
used to access the local variables as well; this time using negative offsets. The standard
way to start a subroutine which needs to access parameters and has local variables is as
under.
push bp
mov bp, sp
sub sp, 2
The gap could have been created with a dummy push, but the subtraction makes it
clear that the value pushed is not important and the gap will be used for our local
variable. Also gap of any size can be created in a single instruction with subtraction. The
parameters can still be accessed at bp+4 and bp+6 and the swapflag can be accessed at
bp-2. The subtraction in SP was after taking the snapshot; therefore BP is above the
parameters but below the local variables. The parameters are therefore accessed using
positive offsets from BP and the local variables are accessed using negative offsets.
Q#26 Mark 5
Describe MOVS and CMPS instructions
Question No: 17
( Marks: 2 )
Why is it necessary to provide the segment and offset address in case of FAR jump ?
Page no 46:
Segment and offset must be given to a far jump. Because, sometimes we may need to
go from one code segment to another, and near and short jumps cannot take us
there. Far jump must be used and a two byte segment and a two byte offset are
given to it. It loads CS with the segment part and IP with the offset part.
Whats your understanding about Incrementing and Decrementing Stack?
MIDTERM EXAMINATION
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04 May
2012

Page no 68:
Whenever an element is pushed on the stack SP is decremented by two and
whenever an element is popped on the stack SP is incremented by two.
A decrementing stack moves from higher addresses to lower addresses as elements
are added in it while an incrementing stack moves from lower addresses to higher
addresses as elements are added.
As the 8088 stack works on word sized elements. Single bytes cannot be pushed or
popped from the stack.
Question No: 19
Number2:
( Marks: 2 )
IF DF=0 what its represent and IF DF=1 what its represent ?

Page no: 17 and Page no: 91
The direction of movement is controlled with the Direction Flag (DF) in the flags
register. If this flag is cleared DF=0, the direction is from lower addresses towards
higher addresses and if this flag is set DF=1, the direction is from higher addresses
to lower addresses. If DF is cleared, DF = 0 this is called the auto increment mode of
string instruction, and if DF is set, DF=1, this is called the auto decrement mode.
There are two instructions to set and clear the direction flag.
What is the Difference between CALL and RET
Page no: 64
The CALL instruction allows temporary diversion and therefore reusability of
code.
The word return holds in its meaning that we are to return from where we came
and need no explicit destination.
Therefore RET takes no arguments and transfers control back to the instruction
following the CALL that took us in this subroutine.

Tell the Formula to scroll up the screen
Page no :99
MIDTERM EXAMINATION
SOLVED BY: SaHeR
04 May
2012

rep movsw
scroll up
scrollup: push bp
mov bp,sp
push ax
push cx
push si
push di
push es
push ds
mov ax, 80 ; load chars per row in ax
mul byte [bp+4]
; calculate source position
mov si, ax
; load source position in si
push si
; save position for later use
shl si, 1
; convert to byte offset
mov cx, 2000
; number of screen locations
sub cx, ax
; count of words to move
mov ax, 0xb800
mov es, ax
; point es to video base
mov ds, ax
; point ds to video base
xor di, di
; point di to top left column
cld
; set auto increment mode
rep movsw
; scroll up
mov ax, 0x0720
; space in normal attribute
pop cx
; count of positions to clear
rep stosw
; clear the scrolled space
pop ds
pop es
pop di
pop si
pop cx
pop ax
pop bp
ret 2
Explain how extended shifting is performed
Page no :56
Using our basic shifting and rotation instructions we can effectively shift a 32bit
number in memory word by word. We cannot shift the whole number at once since
MIDTERM EXAMINATION
SOLVED BY: SaHeR
04 May
2012

our architecture is limited to word operations. The algorithm we use consists of just
two instructions and we name it extended shifting.
num1: dd 40000
shl word [num1], 1
rcl word [num1+2], 1
The DD directive reserves a 32bit space in memory; however the value we placed
there will fit in 16bits. So we can safely shift the number left 16 times.
The least significant word is accessible at num1 and the most significant word is
accessible at num1+2.
The two instructions are carefully crafted such that the first one shifts the lower
word towards the left and the most significant bit of that word is dropped in carry.
With the next instruction we push that dropped bit into the least significant bit of
the next word effectively joining the two 16bit words.
The final carry after the second instruction will be the most significant bit of the
higher word, which for this number will always be zero.
Write a subroutine to calculate the string length.
Page :97
subroutine to calculate the length of a string
; takes the segment and offset of a string as parameters
strlen: push bp
mov bp,sp
push es
push cx
push di
les di, [bp+4]
; point es:di to string
mov cx, 0xffff
; load maximum number in cx
xor al, al
; load a zero in al
repne scasb
; find zero in the string
mov ax, 0xffff
; load maximum number in ax
sub ax, cx
; find change in cx
dec ax
; exclude null from length
pop di
pop cx
pop es
pop bp
ret 4
MIDTERM EXAMINATION
SOLVED BY: SaHeR
04 May
2012

Question No: 17
( Marks: 1 )
Write any two control instructions.

Page no :14
Examples are:
cmp ax, 0
jne 1234
We are changing the program flow to the instruction at 1234 address if the
condition that we checked becomes true
Question No: 18
( Marks: 1 )
RET instruction take how many arguments

Page no 64
The RET
instruction is used for this purpose. The word return holds in its meaning
that we are to return from where we came and need no explicit destination.
Therefore RET takes no arguments and transfers control back to the
instruction following the CALL that took us in this subroutine
Question No: 19
( Marks: 2 )
Explain the fuction of rotate right (ROR) instruction

Page no 53
Rotate Right (ROR)
In the rotate right operation every bit moves one position to the right and
the bit dropped from the right is inserted at the left. This bit is also copied
into the carry flag. The operation can be understood by imagining that the
pipe used for shifting has been molded such that both ends coincide. Now
when the first ball is forced to move forward, every ball moves one step
forward with the last ball entering the pipe from its other end occupying the
first balls old position. The carry basket takes a snapshot of this ball leaving
one end of the pipe and entering from the other.
MIDTERM EXAMINATION
SOLVED BY: SaHeR
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2012

Question No: 20
( Marks: 2 )
Describe the PUSH function

Page no 71
PUSH
PUSH decrements SP (the stack pointer) by two and then transfers a word
from the source operand to the top of stack now pointed to by SP. PUSH
often is used to place parameters on the stack before calling a procedure;
more generally, it is the basic means of storing temporary data on the stack.
Question No: 21
( Marks: 3 )
Write down the names of four segment registers?

Page no: 17
SS
ES
DS
CS
Question No: 22
( Marks: 3 )
For what purpose "INT 4" is reserved?

Page no 106
INT 4, Arithmetic Overflow, change of sign bit
Question No: 23
( Marks: 5 )
Calculate physical address.
CS=1E0F---segment
IP=0109------offset
By converting into 20 bits we have
1E0F0
00109
Physical address= 1E0F+00109
=123120+00109=123229=1E15D
MIDTERM EXAMINATION
SOLVED BY: SaHeR
04 May
2012


What is difference between SHR and SAR instructions?
Page no 52
SHR
The SHR inserts a zero from the left and moves every bit one position to the right and
copy the rightmost bit in the carry flag.
SAR
The SAR shift every bit one place to the right with a copy of the most significant bit left
at the most significant place. The bit dropped from the right is caught in the carry
basket. The sign bit is retained in this operation.
For what purpose "INT 1" is reserved ?
Page no 103
INT 1, Trap, Single step Interrupt
This interrupt is used in debugging with the trap flag. If the trap flag is
set the Single Step Interrupt is generated after every instruction. By
hooking this interrupt a debugger can get control after every
instruction and display the registers etc. 8088 was the first processor
that has this ability to support debugging.
Define implied operand?
Page no 18
It is always in a particular register say the accumulator. It needs to not be mentioned in
the instruction.
1. Explain the fuction of rotate right (ROR) instruction
The rotate right (ROR) and rotate through carry right (RCR) instructions shift all the bits
toward less significant bit positions, except for the least-significant bit, which is rotated
MIDTERM EXAMINATION
SOLVED BY: SaHeR
04 May
2012

to the most-significant bit location
2. Why REP prefix is generally not used with LODS instruction?
The lods instruction is unique among the string instructions. We will never use a repeat
prefix with this instruction. Because it copies the byte or word pointed at by ds:si into
the al, ax, or eax register, after which it increments or decrements the si register by one,
two, or four. Repeating this instruction via the repeat prefix would serve no purpose
whatsoever since the accumulator register will be overwritten each time the lods
instruction repeats. At the end of the repeat operation, the accumulator will contain the
last value read from memory.
3. Write all steps of algorithm for printing number 352.
In this technique the first digit printed is the right most one
Divide the number by base (10 in case of decimal)..The remainder after
first division was 3, after second division was 5 and after the third division
was 2.
The remainder is its right most digit
Convert the digit to its ASCII representation
Save this digit on stack
If the quotient is non-zero repeat the whole process to get the next
digit, otherwise stop.
Pop digits one by one and print on screen left to right. Stack is a Last In First Out
structure so if 3, 5, and 2 are pushed on it, 2, 5, and 3 will come
out in this order.
24. What are the result after performing the instruction
(each carry 1 marks )
1.
and ax,bx
2.
or ax,bx
3.
xor ax,bx
Given that ax = 00110011 and bx = 00010001
25. Describe Local Variables?
A local variable is valid within the statement block in which it is defined and within any
nested statement blocks, unless you redefine the variable within the statement block.
Local variables should be created when the subroutine is called and discarded
MIDTERM EXAMINATION
SOLVED BY: SaHeR
04 May
2012

afterwards. So that the spaced used by them can be reused for the local variables of
another subroutine. They only have meaning inside the subroutine and no meaning
outside it.
It is important role of the stack to create local variables that are only needed while the
subroutine is in execution and not afterwards. They should not take permanent space
like global variables.
The most convenient place to store these variables is the stack. We need some special
manipulation of the stack for this task. We need to produce a gap in the stack for our
variables.
Are valid only for the duration of the SPL routine
Are reset to their initial values or to a value the user passes to the routine, each time the
routine is executed
Cannot have default values
26. Explain the complete operation of Interrupt when it is generated.
Interrupt is the result of an INT instruction (software interrupt) or it is generated by an

external hardware which passes the interrupt number by a different mechanism. The
currently executing instruction is completed, the current value of FLAGS is pushed on
the stack, then the current code segment is pushed, then the offset of the next
instruction is pushed. After this it automatically clears the trap flag and the interrupt flag
to disallow further interrupts until the current routine finishes. After this it loads the
word at nx4 in IP and the word at nx4+2 in CS if interrupt n was generated. As soon as
these values are loaded in CS and IP execution goes to the start of the interrupt handler.
When the handler finishes its work it uses the IRET instruction to return to the caller.
IRET pops IP, then CS, and then FLAGS. The original value of IF and TF is restored which
re-enables further interrupts
LES and LDS Instructions
As Mention in the lecture that the string instructions need their source and destination in
the form of a segment offset pair, there are two special instructions that load a segment
register and a general purpose register from two consecutive memory locations. LES
loads ES while LDS loads DS. These instructions have two parameters, one is the general
purpose register to be loaded and the other is the memory location from which to load
these registers. According to Intel rules of significance the word at higher address is
loaded in the segment register while the word at lower address is loaded in the offset
register. As parameters segment should be pushed first so that it ends up at a higher
address and the offset should be pushed afterwards. When loading the lower address will
be given.
Big-endian and little-endian
MIDTERM EXAMINATION
SOLVED BY: SaHeR
04 May
2012

are terms that describe the order in which a sequence of bytes are stored in
computer memory. Big-endian is an order in which the "big end" (most significant
value in the sequence) is stored first (at the lowest storage address). Littleendian is an order in which the "little end" (least significant value in the
sequence) is stored first. For example, in a big-endian computer, the two bytes
required for the hexadecimal number 4F52 would be stored as 4F52 in storage (if
4F is stored at storage address 1000, for example, 52 will be at address 1001). In
a little-endian system, it would be stored as 524F (52 at address 1000, 4F at
1001).
IBM's 370 computers, most RISC-based computers, and Motorola
microprocessors use the big-endian approach.On the other hand, Intel
processors (CPUs) and DEC Alphas and at least some programs that run on
them are little-endian.
Mnemonic
A word, abbreviation, or acronym that replaces something too complex to remember or
type easily. For example, ADC is the mnemonic for the 8086s add-with-carry
instruction. The assembler converts it into machine (binary) code, so it is not necessary to
remember or calculate the binary form.
Op-Code:
An op-code (operation code) is the portion of a machine language instruction that
specifies the operation to be performed. For every specific operation like add subtract or
multiplication there is an op-code which processor understands. Like add we have 152
and subtract 153.
Program Counter/ Instruction Pointer:
A Program is an ordered set of instructions. Instruction executes one after the other.
Program Counter / Instruction Pointer ensure that instructions are working in order also
Program counter/Instruction Pointer holds the address of the next instruction to be
executed.
Control Bus:
Its the part of computer Bus. CPU communicates with other devices within the computer
through control bus. Through control bus CPU assign different jobs to other parts
(registers, memory, input output) to perform some functionality on data. For Example
Read data from memor Write data on memory Move data in register.
Control Lines:
As CPU have to perform more than one control operations so control bus consist of more
than one lines called control lines. The number and type of lines in a control bus varies
but there are basic lines common to all microprocessors, Read Write
Offset A distance from a given paragraph boundary in memory. The offset usually is given as a
number of bytes.
Segment Registers:
In certain processors memory is segmented (or divided).Its actually not physically
segmented rather logically to store code, data, stack etc in different portions of memory.
MIDTERM EXAMINATION
SOLVED BY: SaHeR
04 May
2012

So there should be some way to specify the starting address of each such segment. Thats
way registers are used called segment registers.
There are four types of these registers CS: Code Segment DS: Data Segment SS: Stack
Segment
ES: Extra Segment CS contains the segment of the current instruction (IP is the offset).
DS is the segment used by default for most data operations or most memory references
come from data segment. SS contains the stack segment (SP is the offset). ES as name
shows extra segment register. String instructions(movs,stos) also use this register.
Logical Address and Physical Address:
The segment, offset pair is called a logical address, while the 20bit address is a physical
address which is the real thing. Logical addressing is a mechanism to access the physical
memory.
Offset:
A distance from a given paragraph boundary in memory. The offset usually is given as a
number of bytes
Word is unit of data, like (bit -1 , nibble -4 , byte-8, word-16, Dword-32, Qword-64) A
word is of 2 bytes = 16bits Dword = 4 bytes Qword= 8 bytes
Registers are like Scratch Pad Ram.What are the meaning of scratch pad ram.
Scratchpad means a high-speed internal memory used for temporary storage of
preliminary information.
An 8-bit register, like AH, AL, BH, BL, can only store one data element at a time. And a
16-bit register can store multiple data element e.g. one in AH and other in AL.
MIDTERM EXAMINATION
SOLVED BY: SaHeR

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04 May

MIDTERM EXAMINATION CS401- All Mcqz and Subjective

MIDTERM EXAMINATION CS401- All Mcqz and Subjective

Question No: 1 ( Marks: 1 ) - Please choose one

MIDTERM EXAMINATION CS401- All Mcqz and Subjective

Question No: 6 ( Marks: 1 ) - Please choose one

- Please choose one

MIDTERM EXAMINATION CS401- All Mcqz and Subjective

- Please choose one

Two forms ref page no :85

MIDTERM EXAMINATION CS401- All Mcqz and Subjective

Reference Page no: 98

SI, DI and BP only

MIDTERM EXAMINATION CS401- All Mcqz and Subjective

Question No: 14 ( Marks: 1 ) - Please choose one

MIDTERM EXAMINATION CS401- All Mcqz and Subjective

MIDTERM EXAMINATION CS401- All Mcqz and Subjective

Assembly language is:

MIDTERM EXAMINATION CS401- All Mcqz and Subjective

RET is executed, it recovers the values from

MIDTERM EXAMINATION CS401- All Mcqz and Subjective

Refernce:- Therefore the prevalent convention in most high

After execution of JCXZ instruction CX will changed with flag affect.

MIDTERM EXAMINATION CS401- All Mcqz and Subjective

MIDTERM EXAMINATION CS401- All Mcqz and Subjective

( Marks: 1 ) - Please choose one

CMPS instruction subtracts the source location to the

MIDTERM EXAMINATION CS401- All Mcqz and Subjective

( Marks: 1 ) - Please choose one

If BB is the OPCODE of the instruction which states to move a

( Marks: 1 ) - Please choose one

In the instruction MOV AX, 5 the number of operands are

MIDTERM EXAMINATION CS401- All Mcqz and Subjective

( Marks: 1 ) - Please choose one

( Marks: 1 ) - Please choose one

In assembly the CX register is used normally as a ______________register.

( Marks: 1 ) - Please choose one

All the addressing mechanisms in iAPX 8 8 return a number called _ _ _ _ _ _ _ _ _ _ _ _ _ address .

MIDTERM EXAMINATION CS401- All Mcqz and Subjective

( Marks: 1 ) - Please choose one

When a 16 bit number is divided by an 8 bit number, the dividend will be in

( Marks: 1 ) - Please choose one

In Left-Shift-Operation the left most bit _______

MIDTERM EXAMINATION CS401- All Mcqz and Subjective

( Marks: 1 ) - Please choose one

( Marks: 1 ) - Please choose one

Which mathematical operation is dominant during the execution of SCAS instruction

MIDTERM EXAMINATION CS401- All Mcqz and Subjective

MIDTERM EXAMINATION CS401- All Mcqz and Subjective

MIDTERM EXAMINATION CS401- All Mcqz and Subjective

MIDTERM EXAMINATION CS401- All Mcqz and Subjective

MIDTERM EXAMINATION CS401- All Mcqz and Subjective

MIDTERM EXAMINATION CS401- All Mcqz and Subjective

MIDTERM EXAMINATION CS401- All Mcqz and Subjective

MIDTERM EXAMINATION CS401- All Mcqz and Subjective

MIDTERM EXAMINATION CS401- All Mcqz and Subjective

MIDTERM EXAMINATION CS401- All Mcqz and Subjective

MIDTERM EXAMINATION CS401- All Mcqz and Subjective

MIDTERM EXAMINATION CS401- All Mcqz and Subjective