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Ddr3 Sdram - Wikipedia

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DDR3 SDRAM - Wikipedia, the free encyclopedia http://en.wikipedia.

org/wiki/DDR3_SDRAM

http://en.wikipedia.org/wiki/DDR3_SDRAM

From Wikipedia, the free encyclopedia

In computing, DDR3 SDRAM, an abbreviation for double data rate type three synchronous dynamic
random access memory, is a modern kind of dynamic random access memory (DRAM) with a high
bandwidth interface, and has been in use since 2007. DDR3 SDRAM is neither forward nor backward
compatible with any earlier type of random access memory (RAM) due to different signaling voltages,
timings, and other factors.

DDR3 is a DRAM interface specification. The actual DRAM arrays that store the data are similar to earlier PC3-10600 DDR3 SO-DIMM (204
types, with similar performance. pins)
The primary benefit of DDR3 SDRAM over its immediate predecessor, DDR2 SDRAM, is its ability to
transfer data at twice the rate (eight times the speed of its internal memory arrays), enabling higher bandwidth or peak data rates. With two transfers
per cycle of a quadrupled clock signal, a 64-bit wide DDR3 module may achieve a transfer rate of up to 64 times the memory clock speed in
megabytes per second (MB/s). With data being transferred 64 bits at a time per memory module, DDR3 SDRAM gives a transfer rate of (memory
clock rate) × 4 (for bus clock multiplier) × 2 (for data rate) × 64 (number of bits transferred) / 8 (number of bits/byte). Thus with a memory clock
frequency of 100 MHz, DDR3 SDRAM gives a maximum transfer rate of 6400 MB/s. In addition, the DDR3 standard permits chip capacities of up
to 8 gigabytes.

1 Overview
1.1 DDR3L
1.2 Latencies
1.3 Power consumption
2 Extensions
3 Modules
3.1 JEDEC standard modules
4 Feature summary
5 Development and market penetration
6 Successor
7 See also
8 References

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DDR3 SDRAM - Wikipedia, the free encyclopedia http://en.wikipedia.org/wiki/DDR3_SDRAM

Compared to DDR2 memory, DDR3 memory uses 30% less power. This reduction comes from the difference
in supply voltages: 1.8 V or 2.5 V for DDR2, and 1.5 V for DDR3. The 1.5 V supply voltage works well with
the 90 nanometer fabrication technology used in the original DDR3 chips. Some manufacturers further
propose using "dual-gate" transistors to reduce leakage of current.[1]

According to JEDEC,[2] 1.575 volts should be considered the absolute maximum when memory stability is
the foremost consideration, such as in servers or other mission-critical devices. In addition, JEDEC states that
memory modules must withstand up to 1.975 volts before incurring permanent damage, although they are not
required to function correctly at that level.

Another benefit is its prefetch buffer, which is 8-burst-deep. In contrast, the prefetch buffer of DDR2 is
4-burst-deep, and the prefetch buffer of DDR is 2-burst-deep. This advantage is an enabling technology in
DDR3's transfer speed.

DDR3 modules can transfer data at a rate of 800–2133 MT/s using both rising and falling edges of a
Comparison of memory modules for
400–1066 MHz I/O clock. Sometimes, a vendor may misleadingly advertise the I/O clock rate by labeling the
desktop PCs (DIMM).
MT/s as MHz. The MT/s is normally twice that of MHz by double sampling, one on the rising clock edge, and
the other, on the falling. In comparison, DDR2's current range of data transfer rates is 400–1066 MT/s using a
200–533 MHz I/O clock, and DDR's range is 200–400 MT/s based on a 100–200 MHz I/O clock.
High-performance graphics was an initial driver of such bandwidth requirements, where high bandwidth data
transfer between framebuffers is required.

DDR3 does use the same electric signaling standard as DDR and DDR2, Stub Series Terminated Logic, albeit
at different timings and voltages. Specifically, DDR3 uses SSTL_15.[3]

DDR3 prototypes were announced in early 2005. Products in the form of motherboards appeared on the
market in June 2007[4] based on Intel's P35 "Bearlake" chipset with DIMMs at bandwidths up to DDR3-1600
(PC3-12800).[5] The Intel Core i7, released in November 2008, connects directly to memory rather than via a
chipset. The Core i7 supports only DDR3. AMD's first socket AM3 Phenom II X4 processors, released in
February 2009, were their first to support DDR3.

DDR3 DIMMs have 240 pins and are electrically incompatible with DDR2. The two are prevented from being
accidentally interchanged by different key notch positions on the DIMMs. Not only are DDR2 and DDR3
keyed differently, DDR2 has rounded notches on the side and the DDR3 modules have square notches on the
side. [6] DDR3 SO-DIMMs have 204 pins.[7]

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GDDR3 memory, sometimes incorrectly referred to as "DDR3" due to its similar name, is an entirely different Comparison of memory modules for
technology, as it is designed for use in graphics cards and is based on DDR2 SDRAM. portable/mobile PCs (SO-DIMM).

DDR3L

The "3L" in DDR3L stands for low-voltage. JEDEC introduced two low-voltage standards. The DDR3L standard is 1.35V and has the label ’’PC3L’’
for its modules. Examples include DDR3L-800, DDR3L-1066, DDR3L-1333, and DDR3L-1600. The DDR3U standard is 1.25V and has the label
’’PC3U’’ for its modules.

Latencies

While the typical latencies for a JEDEC DDR2 device were 5-5-5-15, some standard latencies for JEDEC DDR3 devices include 7-7-7-20 for
DDR3-1066 and 8-8-8-24 for DDR3-1333.

DDR3 latencies are numerically higher because the I/O bus clock cycles by which they are measured are shorter; the actual time interval is similar to
DDR2 latencies (around 10 ns). There is some improvement because DDR3 generally uses more recent manufacturing processes, but this is not
directly caused by the change to DDR3.

As with earlier memory generations, faster DDR3 memory became available after the release of the initial versions. DDR3-2000 memory with
9-9-9-28 latency (9 ns) was available in time to coincide with the Intel Core i7 release.[8] CAS latency of 9 at 1000 MHz (DDR3-2000) is 9 ns, while
CAS latency of 7 at 667 MHz (DDR3-1333) is 10.5 ns.

(CAS / Frequency (MHz)) × 1000 = X ns

Example:

(7 / 667) × 1000 = 10.4948 ns

Power consumption

Power consumption of individual SDRAM chips (or, by extension, DIMMs) varies based on many factors, including speed, type of usage, voltage,
etc. Dell's Power Advisor calculates that 4 GB ECC DDR1333 RDIMMs use about 4 W each.[9] By contrast, a more modern mainstream desktop-
oriented part 8 GB, DDR3/1600 DIMM, is rated at 2.58 W, despite being significantly faster.[10]

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Intel Corporation officially introduced the eXtreme Memory Profile (XMP) Specification on March 23, 2007 to enable enthusiast performance
extensions to the traditional JEDEC SPD specifications for DDR3 SDRAM.[11]

JEDEC standard modules

Standard name Memory clock Cycle time I/O bus clock Data rate Module name Peak transfer rate Timings CAS latency

(MHz) (ns) (MHz) (MT/s) (MB/s) (CL-tRCD-tRP) (ns)

DDR3-800D 5-5-5 12 1⁄2


100 10 400 800 PC3-6400 6400
DDR3-800E 6-6-6 15  

DDR3-1066E 6-6-6 11 1⁄4


DDR3-1066F 133⅓ 7 1⁄2 533⅓ 1066⅔ PC3-8500 8533⅓ 7-7-7 13 1⁄8
DDR3-1066G 8-8-8 15  

DDR3-1333F* 7-7-7 10 1⁄2


DDR3-1333G 8-8-8 12  
166⅔ 6 666⅔ 1333⅓ PC3-10600 10666⅔
DDR3-1333H 9-9-9 13 1⁄2
DDR3-1333J* 10-10-10 15  
10  
DDR3-1600G* 8-8-8
11 1⁄4
DDR3-1600H 9-9-9
200 5 800 1600 PC3-12800 12800
DDR3-1600J 10-10-10 12 1⁄2
DDR3-1600K 11-11-11 13 3⁄4

10 5⁄7 
DDR3-1866J* 10-10-10
DDR3-1866K 2 11-11-11 11 11⁄14
233⅓ 4 ⁄7 933⅓ 1866⅔ PC3-14900 14933⅓
DDR3-1866L 12-12-12 12 6⁄7 
DDR3-1866M* 13-13-13
13 13⁄14

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DDR3 SDRAM - Wikipedia, the free encyclopedia http://en.wikipedia.org/wiki/DDR3_SDRAM

10 5⁄16
DDR3-2133K* 11-11-11
DDR3-2133L 3 12-12-12 11 1⁄4
266⅔ 3 ⁄4 1066⅔ 2133⅓ PC3-17000 17066⅔
DDR3-2133M 13-13-13 12 3⁄16
DDR3-2133N* 14-14-14
13 1⁄8

* optional

CL - Clock cycles between sending a column address to the memory and the beginning of the data in response

tRCD - Clock cycles between row activate and reads/writes

tRP - Clock cycles between row precharge and activate

Fractional frequencies are normally rounded down, but rounding up to -667 is common due to the exact number being -666⅔ and rounding to the
nearest whole number. Some manufacturers also round to a certain precision or round up instead. For example, PC3-10666 memory could be listed as
PC3-10600 or PC3-10700.[12]

Note: All items listed above are specified by JEDEC as JESD79-3D.[13] All RAM data rates in-between or above these listed specifications are not
standardized by JEDEC—often they are simply manufacturer optimizations using higher-tolerance or overvolted chips. Of these non-standard
specifications, the highest reported speed reached was equivalent to DDR3-2544, as of May 2010.[14]

DDR3-xxx denotes data transfer rate, and describes raw DDR chips, whereas PC3-xxxx denotes theoretical bandwidth (with the last two digits
truncated), and is used to describe assembled DIMMs. Bandwidth is calculated by taking transfers per second and multiplying by eight. This is
because DDR3 memory modules transfer data on a bus that is 64 data bits wide, and since a byte comprises 8 bits, this equates to 8 bytes of data per
transfer.

In addition to bandwidth and capacity variants, modules can:

1. Optionally implement ECC, which is an extra data byte lane used for correcting minor errors and detecting major errors for better reliability.
Modules with ECC are identified by an additional ECC or E in their designation. For example: "PC3-6400 ECC", or PC3-8500E.[15]
2. Be "registered", which improves signal integrity (and hence potentially clock rates and physical slot capacity) by electrically buffering the
signals with a register, at a cost of an extra clock of increased latency. Those modules are identified by an additional R in their designation,
whereas non-registered (a.k.a. "unbuffered") RAM may be identified by an additional U in the designation. PC3-6400R is a registered
PC3-6400 module, and PC3-6400R ECC is the same module with ECC.
3. Be fully buffered modules, which are designated by F or FB and do not have the same notch position as other classes. Fully buffered modules

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cannot be used with motherboards that are made for registered modules, and the different notch position physically prevents their insertion.

DDR3 SDRAM components

Introduction of asynchronous RESET pin


Support of system-level flight-time compensation
On-DIMM mirror-friendly DRAM pinout
Introduction of CWL (CAS write latency) per clock bin
On-die I/O calibration engine
READ and WRITE calibration

DDR3 modules

Fly-by command/address/control bus with on-DIMM termination


High-precision calibration resistors
Are not backwards compatible—DDR3 modules do not fit into DDR2 sockets; forcing them can damage the DIMM and/or the
motherboard[16]

Technological advantages compared to DDR2

Higher bandwidth performance, up to 2133 MT/s standardized


Slightly improved latencies, as measured in nanoseconds
Higher performance at low power (longer battery life in laptops)
Enhanced low-power features

In May 2005, Desi Rhoden, chairman of the JEDEC committee responsible for creating the DDR3 standard, stated that DDR3 had been under
development for "about 3 years".[17] DDR3 was launched in 2007, but sales were not expected to overtake DDR2 until the end of 2009, or possibly
early 2010, according to Intel strategist Carlos Weissenberg, speaking during the early part of their roll-out in August 2008.[18] (The same timescale
for market penetration had been stated by market intelligence company DRAMeXchange over a year earlier in April 2007,[19] and by Desi Rhoden in
2005.[17]) The primary driving force behind the increased usage of DDR3 has been new Core i7 processors from Intel and Phenom II processors from
AMD, both of which have internal memory controllers: the latter recommends DDR3, the former requires it. IDC stated in January 2009 that DDR3

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sales will account for 29 percent of the total DRAM units sold in 2009, rising to 72% by 2011.[20]

Main article: DDR4 SDRAM

JEDEC's planned successor to DDR3 is DDR4, whose standard is currently in development.[21] The primary benefits of DDR4 compared to DDR3
include a higher range of clock frequencies and data transfer rates[22] and significantly lower voltage. Some manufacturers have already
demonstrated DDR4 chips for testing purposes.[23]

Multi-channel memory architecture


List of device bandwidths

http://www.simmtester.com/page/news
1. ^ McCloskey, Alan, Research: DDR FAQ (http://www.ocmodshop.com /showpubnews.asp?title=Memory+Module+Picture+2007&num=150.
/ocmodshop.aspx?a=868) , http://www.ocmodshop.com 7. ^ "JEDEC" (2010-12-01). "204-Pin DDR3 SDRAM SO-DIMM
/ocmodshop.aspx?a=868, retrieved 2007-10-18 Specification" (http://www.jedec.org/download/search/4_20_18R20A.pdf)
2. ^ JEDEC JESD 79-3B (http://www.jedec.org/download/search . http://www.jedec.org/download/search/4_20_18R20A.pdf.
/JESD79-3B.pdf) (section 6, table 21 and section 7, table 23) 8. ^ Shilov, Anton (2008-10-29). "Kingston Rolls Out Industry’s First 2GHz
3. ^ Jaci Chang Design Considerations for the DDR3 Memory Sub-system. Memory Modules for Intel Core i7 Platforms" (http://www.xbitlabs.com
Jedex, 2004, p. 4. http://www.jedex.org/images /news/memory/display
/pdf/samsung%20-%20jaci_chang.pdf /20081029141143_Kingston_Rolls_Out_Industry_s_First_2GHz_Memory
4. ^ Soderstrom, Thomas (2007-06-05). "Pipe Dreams: Six P35-DDR3 _Modules_for_Intel_Core_i7_Platforms.html) . Xbit Laboratories.
Motherboards Compared" (http://www.tomshardware.com/2007/06 http://www.xbitlabs.com/news/memory/display
/05/pipe_dreams_six_p35-ddr3_motherboards_compared/) . Tom's /20081029141143_Kingston_Rolls_Out_Industry_s_First_2GHz_Memory
Hardware. http://www.tomshardware.com/2007/06 _Modules_for_Intel_Core_i7_Platforms.html. Retrieved 2008-11-02.
/05/pipe_dreams_six_p35-ddr3_motherboards_compared/. 9. ^ http://essa.us.dell.com/DellStarOnline/DCCP.aspx?c=us&
5. ^ Fink, Wesley (2007-07-20). "Super Talent & TEAM: DDR3-1600 Is l=en&s=corp&Template=6945c07e-3be7-47aa-b318-18f9052df893
Here!" (http://www.anandtech.com/printarticle.aspx?i=3045) . AnandTech. 10. ^ http://www.kingston.com/dataSheets/KVR16N11_8.pdf
http://www.anandtech.com/printarticle.aspx?i=3045. 11. ^ "Intel Extreme memory Profile (Intel XMP) DDR3 Technology"
6. ^ "DocMemory" (2007-02-21). "Memory Module Picture 2007" (http://www.intel.com/assets/pdf/whitepaper/319124.pdf) .
(http://www.simmtester.com/page/news http://www.intel.com/assets/pdf/whitepaper/319124.pdf. Retrieved
/showpubnews.asp?title=Memory+Module+Picture+2007&num=150) . 2009-05-29.

7 of 8 2/27/2013 9:26 PM
DDR3 SDRAM - Wikipedia, the free encyclopedia http://en.wikipedia.org/wiki/DDR3_SDRAM

12. ^ Pc3 10600 vs. pc3 10666 What's the difference - New-System-Build (http://www.pcpro.co.uk/news/220257/idf-ddr3-wont-catch-up-with-
(http://www.tomshardware.com/forum/274587-31-10600-10666- ddr2-during-2009.html) . pcpro.co.uk. 19 August 2008.
what-difference#t2045244) , Tomshardware.com, http://www.pcpro.co.uk/news/220257/idf-ddr3-wont-catch-up-with-
http://www.tomshardware.com/forum/274587-31-10600-10666- ddr2-during-2009.html. Retrieved 2009-06-17.
what-difference#t2045244, retrieved 2012-01-23 19. ^ Bryan, Gardiner (April 17, 2007). "DDR3 Memory Won't Be
13. ^ DDR3 SDRAM STANDARD (http://www.jedec.org/standards-documents Mainstream Until 2009" (http://www.extremetech.com/article2
/docs/jesd-79-3d) , Jedec.org, http://www.jedec.org/standards-documents /0,2845,2115031,00.asp) . extremetech.com. http://www.extremetech.com
/docs/jesd-79-3d, retrieved 2012-01-23 /article2/0,2845,2115031,00.asp. Retrieved 2009-06-17.
14. ^ Kingston's 2,544 MHz DDR3 On Show at Computex 20. ^ Salisbury, Andy (2009-01-20). "New 50nm Process Will Make DDR3
(http://news.softpedia.com/news/Kingston-s-2-544-MHz-DDR3- Faster and Cheaper This Year" (http://www.maximumpc.com/article
On-Show-at-Computex-143379.shtml) , News.softpedia.com, 2010-05-31, /news/new_50nm_process_will_make_ddr3_faster_and_cheaper_this_year
http://news.softpedia.com/news/Kingston-s-2-544-MHz-DDR3-On-Show- ) . maximumpc.com. http://www.maximumpc.com/article
at-Computex-143379.shtml, retrieved 2012-01-23 /news/new_50nm_process_will_make_ddr3_faster_and_cheaper_this_year
15. ^ (PDF) Memory technology evolution: an overview of system memory . Retrieved 2009-06-17.
technologies (http://h20000.www2.hp.com/bc/docs/support 21. ^ "KH Kim Receives 2011 JEDEC Technical Recognition Award"
/SupportManual/c00256987/c00256987.pdf) , Hewlett-Packard, p. 18, (http://www.jedec.org/news/jedec-awards-program/kh-kim-2011-tr-award)
http://h20000.www2.hp.com/bc/docs/support/SupportManual/c00256987 . jedec.org. http://www.jedec.org/news/jedec-awards-program/kh-kim-
/c00256987.pdf 2011-tr-award. Retrieved 2011-07-31.
16. ^ "DDR3: Frequently Asked Questions" (http://www.kingston.com 22. ^ Shilov, Anton (August 16, 2010). "Next-Generation DDR4 Memory to
/channelmarketingcenter/hyperx/literature/MKF_1223_DDR3_FAQ.pdf) . Reach 4.266GHz – Report" (http://www.xbitlabs.com/news/memory
http://www.kingston.com/channelmarketingcenter/hyperx/literature /display
/MKF_1223_DDR3_FAQ.pdf. Retrieved 2009-08-18. /20100816124343_Next_Generation_DDR4_Memory_to_Reach_4_266G
17. ^ a b Sobolev, Vyacheslav (2005-05-31). "JEDEC: Memory standards on Hz_Report.html) . Xbitlabs.com. http://www.xbitlabs.com/news/memory
the way" (http://www.digitimes.com/news/a20050530PR201.html) . /display
digitimes.com. http://www.digitimes.com/news/a20050530PR201.html. /20100816124343_Next_Generation_DDR4_Memory_to_Reach_4_266G
Retrieved 2011-04-28. "JEDEC is already well along in the development Hz_Report.html. Retrieved 2011-01-03.
of the DDR3 standard, and we have been working on it for about three 23. ^ "Samsung develops DDR4 memory with up to 40 percent better energy
years now.... Following historical models, you could reasonably expect the efficiency than DDR3" (http://www.engadget.com/2011/01/04/samsung-
same three-year transition to a new technology that you have seen for the develops-ddr4-memory-with-up-to-40-percent-better-energy/) .
last several generations of standard memory" Engadget.com. January 4, 2011. http://www.engadget.com/2011/01
18. ^ "IDF: "DDR3 won't catch up with DDR2 during 2009"" /04/samsung-develops-ddr4-memory-with-up-to-40-percent-better-
energy/. Retrieved 2011-07-31.
Retrieved from "http://en.wikipedia.org/w/index.php?title=DDR3_SDRAM&oldid=539678923"
Categories: SDRAM

This page was last modified on 22 February 2013 at 15:40.


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