Modbus Implementation v364
Modbus Implementation v364
Modbus Implementation v364
ABB Inc.
Power Products Medium Voltage
655 Century Point
Lake Mary, Florida 32746-2137
Telephone: (407)-732-2000
Fax: (407)-732-2132
Technical Support: (800)-929-7947
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The purpose of this document is to describe the specific implementation of the Modbus Protocol on
the ABB Power Control Device (PCD) and the Switch Control Device (SCD) This document, in
conjunction with the Modicon Modbus Protocol Reference Guide (PI-MBUS-300), published by
Modicon, Inc., provides complete information on how to communicate with the PCD/SCD via the
Modbus Protocol.
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Revision History
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The following are trademarks of AEG Schneider Automation, Inc.: Modicon® and Modbus®
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Table of Contents
1 INTRODUCTION........................................................................................................................................ 11
2 CONFIGURATION ...................................................................................................................................... 13
2.1 END-USER CONFIGURATION ................................................................................................................... 13
3 0X REGISTERS........................................................................................................................................... 15
3.1 FUNCTION CODE 1 (READ COIL STATUS) ............................................................................................... 15
3.1.1 Logical Output Block (Single Bit Data) ............................................................................................ 17
3.1.2 Physical Output Block (Single Bit Data)........................................................................................... 22
3.1.3 Logical Output Block (Two Bit Data with Momentary Change Detection) ...................................... 23
3.1.4 Physical Output Block (Two Bit Data with Momentary Change Detection) .................................... 32
4 1X REGISTERS........................................................................................................................................... 35
4.1 FUNCTION CODE 2 (READ INPUT STATUS)................................................................................................ 35
4.1.1 Logical Input Block (Single Bit Data) .............................................................................................. 35
4.1.2 Physical Input Block (Single Bit Data)............................................................................................. 37
4.1.3 Logical Input Block (Two Bit Data with Momentary Change Detection) ........................................ 38
4.1.4 Physical Input Block (Two Bit Data with Momentary Change Detection)....................................... 42
5 4X REGISTERS........................................................................................................................................... 45
5.1 FUNCTION CODE 3 (READ HOLDING REGISTER) .................................................................................... 45
5.1.1 User Programmable Register Block (Defaults)................................................................................ 46
5.1.2 System Status/Configuration Block ................................................................................................... 48
5.1.3 RMS Load Current/Angular Values Block/Other Primary Analog Quantities.................................. 50
5.1.4 RMS Demand Current/Real and Reactive Power Values Block........................................................ 52
5.1.5 RMS Peak Demand Current/Real, Reactive Power Values and Time Stamps Block ....................... 53
5.1.6 RMS Minimum Demand Current/Real, Reactive Power Values and Time Stamps Block ................. 55
5.1.7 Counters Block .................................................................................................................................. 57
5.1.8 Physical and Logical Input/Output State Block ................................................................................ 58
5.2 FUNCTION CODE 16 (PRESET MULTIPLE REGISTER) ............................................................................. 63
5.2.1 Control Mask Block (Read and Write) .............................................................................................. 64
5.3 FUNCTION CODE 23 (READ/WRITE 4X REGISTERS) .............................................................................. 71
5.3.1 Fault Record...................................................................................................................................... 71
5.3.2 Operation Record .............................................................................................................................. 73
5.3.3 Oscillographic Record Data Headers Block ..................................................................................... 81
5.3.4 Oscillographic Digital Records Block............................................................................................... 83
5.3.5 Oscillographic Analog Records Block .............................................................................................. 84
5.3.6 Oscillographic Control and Status Block.......................................................................................... 85
5.3.7 Load Profile Data Header................................................................................................................. 86
5.3.8 Load Profile Data Block.................................................................................................................... 87
5.3.9 Load Profile Control Block ............................................................................................................... 89
5.3.10 Power Quality Records...................................................................................................................... 90
5.3.11 Power Quality Statistics .................................................................................................................... 92
5.3.12 Power Quality RMS Records............................................................................................................. 93
5.3.13 Power Quality Control and Status Block .......................................................................................... 94
5.3.14 Power Quality Informational Block .................................................................................................. 95
6 6X REGISTERS........................................................................................................................................... 97
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6.1 FUNCTION CODE 20 (READ GENERAL REFERENCE) FUNCTION CODE 21 (WRITE GENERAL
REFERENCE).........................................................................................................................................................97
6.1.1 Programmable Input Select, Index, and Feedback Masks...............................................................107
6.1.2 Programmable Input Input Invert, AND/OR Select, & Output Invert Mask....................................109
6.1.3 Programmable User Defined Input Names .....................................................................................111
6.1.4 Programmable Output Select and Index..........................................................................................112
6.1.5 Programmable Output Input Invert, AND/OR Select, & Output Invert Mask .................................114
6.1.6 Programmable Output User Defined Strings ..................................................................................116
6.1.7 Programmable Output Delays.........................................................................................................117
6.1.8 Relay Settings...................................................................................................................................118
6.1.8.1. Primary Settings Group................................................................................................................122
6.1.8.2. Alternate 1 Settings Group ...........................................................................................................124
6.1.8.3. Alternate 2 Settings Group ...........................................................................................................126
6.1.9 Configuration Settings .....................................................................................................................128
6.1.10 Counter Settings...............................................................................................................................130
6.1.11 Alarm Settings..................................................................................................................................131
6.1.12 Real Time Clock...............................................................................................................................132
6.1.13 ULO Connection Settings and User Names.....................................................................................133
6.1.14 ULI User Names ..............................................................................................................................134
6.1.15 FLI User Names and Indices ...........................................................................................................135
6.1.16 Communications Settings.................................................................................................................137
6.1.17 Modbus Global Register Mapping Block.........................................................................................139
6.1.18 User Definable Register Configuration Block.................................................................................140
6.1.19 Miscellaneous Settings.....................................................................................................................145
6.1.20 Oscillographics Data Capture Settings ...........................................................................................146
6.1.21 Programmable Curve Parameters...................................................................................................147
6.1.22 Programmable Curve Data Settings................................................................................................148
6.1.23 Programmable Curve Pointer Table Settings..................................................................................150
6.1.24 Breaker Failure Unit Settings..........................................................................................................152
6.1.25 Master Trip Output Assignment.......................................................................................................153
6.1.26 Load Profile Attribute Assignment (Future) ....................................................................................154
6.1.27 Power Quality Settings......................................................................................................................155
6.1.28 Protection Settings (PCD2000 Revision V2.00 and above, also SCD where applicable).....................157
6.1.29 Recloser Settings (PCD Revision V2.00 and above)...........................................................................160
6.1.30 Fault Indicator / Sectionalizer Settings (SCD only.).........................................................................162
6.1.31 Loop Control Module Settings.........................................................................................................163
6.1.32 DNP Binary Inputs Assignable Class Settings (PCD Rev. 2.40 and above) ...................................164
6.1.33 DNP Analog Inputs Assignable Class Settings (PCD Rev. 2.40 and above)...................................168
6.1.34 DNP Binary Inputs Assignable Point Index Settings.......................................................................171
6.1.35 DNP Analog Inputs Assignable Point Index Settings ......................................................................178
7 CATALOG DEPENDENCIES..................................................................................................................183
7.1 I/O MAPPING WITH RESPECT TO DIFFERENT CATALOG TYPES ...........................................................183
7.1.1 SCD and PCD Catalogued for Three Phase Operation (xxxx-xxxx-xx-x0xx)..................................183
7.1.2 PCD Catalogued for Single Phase Operation (xxxx-xxxx-x1-x1xx) ................................................184
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1 Introduction
The purpose of this document is to describe the specific implementation of the Modicon Modbus
protocol on the ABB Power Control Device (PCD) and the Switch Control Device (SCD). This
document, in conjunction with the Modicon Modbus Protocol Reference Guide (PI-MBUS-300),
published by Modicon, Inc., provides complete information on how to communicate with the
PCD/SCD via the Modbus Protocol.
Historically, the PCD/SCD product family is a descendent of the ABB DPU-2000R. The PCD
software is based on the DPU-2000R software version 1.81 and includes the basic point set of the
DPU up to that point. In the field, this means that replacing a DPU-2000R with a PCD should require
minimal configuration changes or application changes to the master computer.
The SCD is based on the same platform and firmware application as the PCD with enhancements
supporting load break switch control. Most of the registers are common between the PCD and SCD
and, where different, are appropriately designated.
The PCD supports serial Modbus ASCII and Modbus RTU. The front panel optical port always
communicates in Modbus ASCII mode. The rear panel RS232, RS485 or fiber optic ports can be
switched to either Modbus mode or DNP 3.0 (through a catalog option) through the front panel or
through configuration software.
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2 Configuration
2.1 End-User Configuration
Through the front panel interface of the PCD, various operating parameters may be changed by the
end-user. The parameters that directly or indirectly configure the operation of the Modbus driver are
listed in the table below and described in subsequent sections. The parameters are stored in non-
volatile memory and are therefore preserved even when the PCD is powered-down. The front panel
of the PCD has a UNICOM II™ port and is always communicating in the Modbus ASCII protocol.
Unit Address – This parameter specifies the “network” address of the PCD with respect to all other
devices communicating on the same physical network as the PCD. The value is specified in
hexadecimal on the front panel, and may range from between 0 and hex FFF, inclusive. Changing
this value will cause a “warm” restart of the DNP 3.0 communication process.
RP Baud – The serial baud rate for DNP communications. It can be set to one of: 300, 1200, 2400,
4800, 9600, or 19200. Changing this value will cause a “warm” restart of the DNP 3.0 communication
process.
RP Frame – The description of the parity, number of data bits, and number of stop bits. The possible
values are “N, 8, 1,” “E, 8, 1,” “O, 8, 1.” “N, 8, 2,” “E, 7, 1,” “O, 7, 1,” and “N, 7, 2.” Typically, most
DNP 3.0 devices use “N, 8, 1” - no parity, 8 data bits, and 1 stop bit. Changing this value will cause a
“warm” restart of the DNP 3.0 communication process.
RP Protocol – This parameter specifies the communication protocol selection for Rear Port 1. It has
three possible values: ASCII (for ASCII mode Modbus), RTU (for RTU mode Modbus), and DNP 3.0.
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3 0x Registers
The output and input data blocks are split into two data types single bit data and two bit data. The
single bit data allows the master to poll the present state of an input or output. The two bit data type
assigns two bits of data for each input or output. The first bit is the present state of the input or output
and the second bit is a momentary change status bit. The momentary change status bit contains
information in that the input or output transitioned between two state from the last time that data was
polled. This allows the master to detect if it missed any change in state of the input or output
between polling sequences.
Single bit data is packed in consecutive order from the start register and one bit per I/O contains the
present state.
The following example is for a master poll of Register 00009 collecting 16 Coils. The slave device’s
logic is such that the 50N2 and 67P are the only outputs that are turned on. The following 16 bit
register response will be generated from the slave PCD.
Now if the read coil status used the two bit register, the master would poll for Register 00529
collecting 32 Coils. If the slave device’s logic is such that the 50N2 and 67P are the only outputs that
are turned on and since the last poll, the state of the 67P transitioned from On to Off back to On
again. The following two 16 bit register response will be generated.
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First register
High byte Coil 536 535 534 533 532 531 530 529
Bit position 7 6 5 4 3 2 1 0
Binary data 0 0 0 0 0 0 0 1
Low byte Coil 544 543 542 541 540 539 538 537
Bit position 7 6 5 4 3 2 1 0
Binary data 0 0 1 1 0 0 0 0
Second register
High byte Coil 552 551 550 549 548 547 546 545
Bit position 7 6 5 4 3 2 1 0
Binary data 0 0 0 0 0 0 0 0
Low byte Coil 560 559 558 557 556 555 554 553
Bit position 7 6 5 4 3 2 1 0
Binary data 0 0 1 1 0 0 0 0
In the example above, bit positions 5 and 4 in the low byte of the first register are both set. Bit
position 4 indicates the present state of the 67P output, a one indicates it is on. Bit position 5 is the
momentary change detect for 67P, it is also set indicating that the output transitioned through multiple
changes since the last polling sequence of that register. Once a coil is read using the two bit data
register method the momentary change bit is cleared within the slave device. Furthermore, the
momentary bit cannot be read without its respective logical bit being read at the same time and vice-
versa.
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3.1.3 Logical Output Block (Two Bit Data with Momentary Change Detection)
Note: The momentary bit cannot be read without its respective logical bit being read at the same time
and vice-versa.
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Notes:
1. These are available only on PCDs with style chart numbers XR3X-XXXX-XX-XXXX.
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3.1.4 Physical Output Block (Two Bit Data with Momentary Change Detection)
Note: The momentary bit cannot be read without its respective logical bit being read at the same time
and vice-versa.
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4 1X REGISTERS
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4.1.3 Logical Input Block (Two Bit Data with Momentary Change Detection)
Note: The momentary bit cannot be read without its respective logical bit being read at the
same time and vice-versa.
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4.1.4 Physical Input Block (Two Bit Data with Momentary Change Detection)
Note: The momentary bit cannot be read without its respective logical bit being read at the
same time and vice-versa.
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5 4X REGISTERS
5.1 FUNCTION CODE 3 (READ HOLDING REGISTER)
MODBUS Data Type Definitions
Byte 3 Byte 2 Byte 1 Byte 0
0 1 2 3
Register Offsets of Signed/Unsigned Long
Byte 1 Byte 0
0 1
Register Offsets of Signed/Unsigned Short
Note: Data Byte Order follows the Low Address-High Byte, High Address -Low Byte Convention.
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A User programmable registers may contain any valid Modbus register addressed value in the
following data formats. For example, register 40002 contains secondary phase A Amperes scaled
into 12 bits using the Offset Binary Data type. To set up the 40002 register, the user configures the
data type (Offset Bipolar), the number of bits using from the 16 bit register (12 bits), the source
register (40257 which is a 16 bit unsigned value), the number of bits to use starting from the source
register base (16 bits), the Full Scale or Scale factor to apply to the source register (10) and the type
of scaling to be performed on the source register (Current).
As per defaults, when the 40002 register contains a value of 2047, the secondary current is ZERO
and when the register contains a value of 4097, the secondary current is 10 Amps.
40002: Offset Bipolar(12) 40257(16) 10 (Current) Load Current-A
Note : The values at saturation will be 2N -1 where N is the register size in bits.
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1) Issue a write to Bit 7 in registers 41158/41159 to start the test (function 16 command).
2) Read register 40341; if the value is 65535 the test is not yet complete.
If a test not complete response continues for more than 5 seconds then reissue the
battery test (step 1 above). Do Not initiate the test sequence at a rate of more then once
per minute since battery damage may occur.
3) These registers are not supported as yet, and will return a value of zero.
4) These registers are valid only when register 40190 returns a value of 200 or greater.
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5.1.5 RMS Peak Demand Current/Real, Reactive Power Values and Time Stamps Block
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5.1.6 RMS Minimum Demand Current/Real, Reactive Power Values and Time Stamps Block
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40921 Unsigned Long Force Physical Output Select Status (Bit State: 0=Normal, 1=Forced)
40923: Unsigned Long Force Physical Output Select Status (Bit State: 0=Deasserted, 1=Asserted)
Bit 31: OUT32 Bit 15: OUT16
Bit 30: OUT31 Bit 14: OUT15
Bit 29: OUT30 Bit 13: OUT14
Bit 28: OUT29 Bit 12: OUT13
Bit 27: OUT28 Bit 11: OUT12
Bit 26: OUT27 Bit 10: OUT11
Bit 25: OUT26 Bit 9: OUT10
Bit 24: OUT25 Bit 8: OUT9
Bit 23: OUT24 Bit 7: OUT8
Bit 22: OUT23 Bit 6: OUT7
Bit 21: OUT22 Bit 5: OUT6
Bit 20: OUT21 Bit 4: OUT5
Bit 19: OUT20 Bit 3: OUT4
Bit 18: OUT19 Bit 2: OUT3
Bit 17: OUT18 Bit 1: OUT2
Bit 16: OUT17 Bit 0: OUT1
40925 Unsigned Long Force Logical Input Select Status (Bit State: 0=Normal, 1=Forced)
40927 Unsigned Long Force Logical Input Select Status (Bit State: 0=On, 1=Off)
Bit 31: FLI32 Bit 15: FLI16
Bit 30: FLI31 Bit 14: FLI15
Bit 29: FLI30 Bit 13: FLI14
Bit 28: FLI29 Bit 12: FLI13
Bit 27: FLI28 Bit 11: FLI12
Bit 26: FLI27 Bit 10: FLI11
Bit 25: FLI26 Bit 09: FLI10
Bit 24: FLI25 Bit 08: FLI09
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The control mask block allows a master device to write data to the Modbus interface to perform the
desired control function. The block is a set of bit masks and an execute register that allows the
master different levels of security for device control. This allows the master to verify the integrity of
the data transmission by reading (function code 3) the register confirming that the correct data was
written. The functions designated by * are sealed in alarms and can only be cleared, an attempt to set
these alarms will have no impact on their state.
There are six control blocks that a user can write to currently. We will take the example where a user
needs to Initiate Trip in the Initiate Input block. The block on which the user wants to operate has to
be unprotected before it is written into. There are two ways to unprotect the control blocks and initiate
the command on the control block.
register 41155 hex xxxx password (high) to the block (Relay or Test password)
register 41156 hex xxxx password (low) to the block (Relay or Test password)
register 41158 hex 0001 selects the trip initiate input
register 41159 hex 0001 confirms Trip Initiate
register 41154 hex 0001 allows slave to Execute on the data if the block is
Note that Execute is the last write to the block. The above data may be sent all in one command or
it may be written in three different commands.
An example of how set/reset logical outputs is shown below. The master writes the following data to
registers
register 41189 hex 8010 selects the 27-3P seal in alarm and the ULO8 user logical
register 41193 hex 0010 resets 27-3P seal in alarm and sets ULO8 user logical
Now, the master can confirm the data written above by issuing a read holding register command to
registers 41444 and 41448 prior to sending the execute data register for that block. The following
write to register 41440 will allow the slave to carry out the actions set up in the above registers.
register 41184 hex 0001 allows the data from registers 41189 & 41193 to be executed
by the slave device.
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Note: * You can only Reset "*" outputs. Trying to set these will have no affect on the state of the
sealed in alarms.
Note: 1 (50P1*, 50P2*, 50P3*, 51P*, 67P*) are “read only” bits. They can not be reset independently.
They are derived from the respective three-phase seal-in signals (bits 1 – 15 of long word 2). They
will be reset when the individual three-phase bits are set
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Note: This register group sets the appropriate physical output contact momentarily for the
configured breaker failed to trip time.
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41240 Unsigned Short Execute Source Transfer / Restoration Control (0=No Action,1=Execute)
41241 high byte Relay or Test Password Character 1
low byte Relay or Test Password Character 2
41242 high byte Relay or Test Password Character 3
low byte Relay or Test Password Character 4
41243 Unsigned Short Spare
41244 Unsigned Short Transfer / Restore Initiate Mask (bit state:0=No change, 1=Change)
Bit 15: Reserved Bit 7: Reserved
Bit 14: Reserved Bit 6: Reserved
Bit 13: Reserved Bit 5: Reserved
Bit 12: Reserved Bit 4: Reserved
Bit 11: Reserved Bit 3: Restore S→P
Bit 10: Reserved Bit 2: Restore P→S
Bit 9: Reserved Bit 1: Transfer S→P
Bit 8: Reserved Bit 0: Transfer P→S
41245 Unsigned Short Confirmation Set / Clear Initiate Mask (bit state:0=No change, 1=Change)
Confirm change initiate input mask by sending an duplicate copy to this
register.
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Note: You can only Reset "*" outputs. Trying to set these will have no affect on the state of the
sealed in alarms.
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33 Alt1 - 1
34 Alt1 - 2
35 Alt1 - 3
36 Alt1 - 4
47 Alt1 - Lockout
65 Alt2 - 1
66 Alt2 - 2
67 Alt2 - 3
68 Alt2 - 4
79 Alt2 – Lockout
41412 Unsigned Word 1 Fault Number
41413 Unsigned Word 1 Year
41414 Unsigned Word 1 Month
41415 Unsigned Word 1 Day
41416 Unsigned Word 1 Hours
41417 Unsigned Word 1 Minutes
41418 Unsigned Word 1 Seconds
41419 Unsigned Word 1 Milliseconds
41420 Unsigned Word x Ia (Scale at register 41424)
41421 Unsigned Word x Ib (Scale at register 41424)
41422 Unsigned Word x Ic (Scale at register 41424)
41423 Unsigned Word x In (Scale at register 41424)
41424 Unsigned Word 1 Current ( I ) Scale x
41425 Unsigned Word 1 Ia Angle
41426 Unsigned Word 1 Ib Angle
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Notes: 1: These are available only on PCDs with catalog numbers XR3X-XXXX-XX-XXXX.
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Editor access code (Firmware versions 3.0 and above, and SCD version 1.0)
Bit 15: Not used Bit7: LCM Edit
Bit 14: Not used Bit 6: Programmable curve Edit
Bit 13: General Edit Bit 5: Alarms Edit
Bit 12: Bank2, ALT2 Edit Bit 4: Configuration Edit
Bit 11: Bank2, ALT1 Edit Bit 3: ALT2 Edit
Bit 10 Bank2, Primary Edit Bit 2: ALT1 Edit
Bit 9: Programmable I/O Edit Bit 1: Primary Edit
Bit 8: Communications Edit Bit 0: Front panel MMI used
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Attribute description for firmware versions <= 2.60 and >= 2.90
ATTRIBUTE # DESCRIPTION DYNAMIC SCALE
0 Demand kW-A 122
1 Demand kW-B 122
2 Demand kW-C 122
3 Demand kVAR-A 122
4 Demand kVAR-B 122
5 Demand kVAR-C 122
6 Van 10
7 Vbn 10
8 Vcn 10
9 Demand kW-3P 367
10 Demand kVAR-3P 367
11 Demand Ia 1
12 Demand Ib 1
13 Demand Ic 1
14 Demand In 1
15 Vab 10
16 Vbc 10
17 Vca 10
18 Power factor 1
19 Power factor type 1
Attribute description for firmware versions >= 2.70 and <= 2.82
ATTRIBUTE # DESCRIPTION DYNAMIC SCALE
0 Power factor 1
1 Power factor type 1
2 Demand Ia 1
3 Demand Ib 1
4 Demand Ic 1
5 Demand In 1
6 and over Same as above
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Example: Report column 1 is profiling attribute #0 (Demand kW-A) and has a dynamic scale = 122
DATA BINARY PATTERN SCALE REPORTED VALUE
WORD
8,000 0001111101000000 1 8,000 kW
24,384 0101111101000000 -1 -8,000 kW
16,776 0100000011000100 122 23,912 kW
49,384 1100000011000100 -122 -23,912 kW
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CODE # CLASSIFICATION
0 Swell, Instantaneous
1 Swell, Momentary
2 Swell, Temporary
3 Swell, t > t(max)
4 Sag, Instantaneous
5 Sag, Momentary
6 Sag, Temporary
7 Sag, t > t(max)
8 Interruption, Momentary
9 Interruption, Temporary
10 Interruption, Sustained
11 Interruption, t > t(max)
12 Overvoltage
13 Overvoltage, t > t(max)
14 Undervoltage
15 Undervoltage, t > t(max)
16 Current TDD
17 Voltage THD
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CODE # PHASE
0 Van / Vab / Ia
1 Vbn / Vbc / Ib
2 Vcn / Vca / Ic
3 Phase Minimum/Maximum
4-15 Spare
CODE # CONFIGURATION
0 69V Wye
1 120V Wye
2 120V Delta
3 208V Delta
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6 6x Registers
6.1 FUNCTION CODE 20 (READ GENERAL REFERENCE)
FUNCTION CODE 21 (WRITE GENERAL REFERENCE)
Physical Input: The opto-isolated binary input that allows external control by physically wiring the
input terminals of the PCD. Physical inputs are labeled (IN1, IN2, IN3, ..., IN32).
Logical Input: An input equated by the Boolean combination of the physical inputs. These inputs are
used by the PCD's state machine and control subroutines. Logical Inputs are labeled (PH3, GRD,
TCM, ...). See later in this paragraph for additional labels.
Active Open: This defines the type of connection from the physical input or inputs and means the
physical state of the opto-isolator's logic is inverted. Example: if the voltage across IN1's terminals
equals zero, then the Boolean equation will evaluate this term as a logical one. Likewise, when a
voltage is applied to IN1, the Boolean equation will evaluate this term as a logical zero.
Active Closed: This defines the type of connection from the physical input or inputs and means that
the physical state of the opto-isolator's logic is the non-inverted. Example: if a voltage is applied
across IN1's terminals, then the Boolean equation will evaluate this term as a logical one. Likewise,
when no voltage is applied to IN1, the Boolean equation will evaluate this term as a logical zero.
Input Select:
The physical inputs are associated with a bit mask to determine which inputs are used when
resolving the logical input's Boolean equation. If the appropriate bit is set, the term will be included as
part of the equation. Likewise, a cleared bit indicates that the physical input term will be ignored.
The bit assignment mask for the physical inputs are as follows:
IN1 Æ Bit 0
… . …
… . …
IN32 Æ Bit 31
This is a bit mask that indicates if a selected input is inverted based on the active open or closed
state. The bit mask uses the same associated physical inputs pattern as in the Input Select data.
AND/OR Select:
The combination of the physical inputs' state used to resolve the Boolean equation allows for the
algebraic ANDing or ORing of all of the selected physical inputs.
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Physical inputs, IN1 - IN32, have memory allocated for an eight character (NULL is implied in
character 9) user definable strings.
Four protocol commands are required to view or change the PCD’s programmable input setting
tables. The command order for viewing these tables can be retrieved in any sequence, but when the
settings are sent to the PCD, the commands must be sent in the following sequence:
Up to 32 logical inputs may be selected at any one time. The protocol document refers to these
generic logical inputs as INPUT1 - INPUT32.
Example:
We want the PH3 logical input to be the combination of the physical inputs IN4 AND NOT IN3 and
ALT1 logical input to be the combination of the physical inputs IN1 OR IN3 OR NOT IN5.
First, generic inputs must be selected to setup the logic equation and for this case INPUT3 is used for
PH3 and INPUT8 is used for ALT1. Note, any inputs 1-32 could be valid selections. The data values
required for these selections use the INDEX table defined in the protocol document.
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Example:
We want the CLOSE logical output to be the combination of the physical inputs IN2 AND NOT IN3.
CLOSE = IN2 * !IN3
First, generic inputs must be selected to setup the logic equation and for this case OUTPUT1 is used
for CLOSE. Note, any outputs 1-32 could be valid selections. The data values required for these
selections use the INDEX table defined in the protocol document.
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1
Notes: Single Phase mode only when available
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1
Notes: Single Phase mode only when available
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Bit Mapping for the Select and Input Inversion Masks (Programmable Inputs)
Bit Mapping for the Select and Input Inversion Masks (Programmable Outputs)
NOTE: All models have same physical output mapping however, the number of physical outputs
available on the unit depends on the IO module population of the unit.
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NOTE: All models have same physical input mapping however, the number of physical inputs
available on the unit depends on the IO module population of the unit.
REGISTER DEFINTION
60000 Spare
60001 Execute Register for Program Inputs (registers 60001-
60511)
(0=No Action, 1=Transfer Settings, 2=Refresh Registers)
60002 high byte Relay Password Character 1
low byte Relay Password Character 2
60003 high byte Relay Password Character 3
low byte Relay Password Character 4
60004 Spare (Writeable)
60005 INPUT1 Select Mask, High Word
60006 INPUT1 Select Mask, Low Word
60007 INPUT2 Select Mask, High Word
60008 INPUT2 Select Mask, Low Word
60009 INPUT3 Select Mask, High Word
60010 INPUT3 Select Mask, Low Word
60011 INPUT4 Select Mask, High Word
60012 INPUT4 Select Mask, Low Word
60013 INPUT5 Select Mask, High Word
60014 INPUT5 Select Mask, Low Word
60015 INPUT6 Select Mask, High Word
60016 INPUT6 Select Mask, Low Word
60017 INPUT7 Select Mask, High Word
60018 INPUT7 Select Mask, Low Word
60019 INPUT8 Select Mask, High Word
60020 INPUT8 Select Mask, Low Word
60021 INPUT9 Select Mask, High Word
60022 INPUT9 Select Mask, Low Word
60023 INPUT10 Select Mask, High Word
60024 INPUT10 Select Mask, Low Word
60025 INPUT11 Select Mask, High Word
60026 INPUT11 Select Mask, Low Word
60027 INPUT12 Select Mask, High Word
60028 INPUT12 Select Mask, Low Word
60029 INPUT13 Select Mask, High Word
60030 INPUT13 Select Mask, Low Word
60031 INPUT14 Select Mask, High Word
60032 INPUT14 Select Mask, Low Word
60033 INPUT15 Select Mask, High Word
60034 INPUT15 Select Mask, Low Word
60035 INPUT16 Select Mask, High Word
60036 INPUT16 Select Mask, Low Word
60037 INPUT17 Select Mask, High Word
60038 INPUT17 Select Mask, Low Word
60039 INPUT18 Select Mask, High Word
60040 INPUT18 Select Mask, Low Word
60041 INPUT19 Select Mask, High Word
60042 INPUT19 Select Mask, Low Word
60043 INPUT20 Select Mask, High Word
60044 INPUT20 Select Mask, Low Word
60045 INPUT21 Select Mask, High Word
60046 INPUT21 Select Mask, Low Word
60047 INPUT22 Select Mask, High Word
60048 INPUT22 Select Mask, Low Word
60049 INPUT23 Select Mask, High Word
60050 INPUT23 Select Mask, Low Word
60051 INPUT24 Select Mask, High Word
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REGISTER DEFINTION
60052 INPUT24 Select Mask, Low Word
60053 INPUT25 Select Mask, High Word
60054 INPUT25 Select Mask, Low Word
60055 INPUT26 Select Mask, High Word
60056 INPUT26 Select Mask, Low Word
60057 INPUT27 Select Mask, High Word
60058 INPUT27 Select Mask, Low Word
60059 INPUT28 Select Mask, High Word
60060 INPUT28 Select Mask, Low Word
60061 INPUT29 Select Mask, High Word
60062 INPUT29 Select Mask, Low Word
60063 INPUT30 Select Mask, High Word
60064 INPUT30 Select Mask, Low Word
60065 INPUT31 Select Mask, High Word
60066 INPUT31 Select Mask, Low Word
60067 INPUT32 Select Mask, High Word
60068 INPUT32 Select Mask, Low Word
60069 high byte INPUT1 Index byte
low byte INPUT2 Index byte
60070 high byte INPUT3 Index byte
low byte INPUT4 Index byte
60071 high byte INPUT5 Index byte
low byte INPUT6 Index byte
60072 high byte INPUT7 Index byte
low byte INPUT8 Index byte
60073 high byte INPUT9 Index byte
low byte INPUT10 Index byte
60074 high byte INPUT11 Index byte
low byte INPUT12 Index byte
60075 high byte INPUT13 Index byte
low byte INPUT14 Index byte
60076 high byt INPUT15 Index byte
low byte e INPUT16 Index byte
60077 high byte INPUT17 Index byte
low byte INPUT18 Index byte
60078 high byte INPUT19 Index byte
low byte INPUT20 Index byte
60079 high byte INPUT21 Index byte
low byte INPUT22 Index byte
60080 high byte INPUT23 Index byte
low byte INPUT24 Index byte
60081 high byte INPUT25 Index byte
low byte INPUT26 Index byte
60082 high byte INPUT27 Index byte
low byte INPUT28 Index byte
60083 high byte INPUT29 Index byte
low byte INPUT30 Index byte
60084 high byte INPUT31 Index byte
low byte INPUT32 Index byte
60085 Feedback Term Mask, bits 31-16
60086 Feedback Term Mask, bits 15-0
Bit = 0 : Feedback Term
Bit = 1 : Normal Input Term
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6.1.2 Programmable Input Input Invert, AND/OR Select, & Output Invert Mask
Input Inversion: Bit = 0, Input Inverted.
Bit = 1, Input Normal.
AND/OR Selection: Bit = 0, Selected inputs are ORed together.
Bit = 1, Selected inputs are ANDed together.
Output Inversion: Bit = 0, Normal
Bit = 1, Inverted
REGISTER DEFINTION
60128 IN1 Input Inversion Mask, High Word
60129 IN1 Input Inversion Mask, Low Word
60130 IN2 Input Inversion Mask, High Word
60131 IN2 Input Inversion Mask, Low Word
60132 IN3 Input Inversion Mask, High Word
60133 IN3 Input Inversion Mask, Low Word
60134 IN4 Input Inversion Mask, High Word
60135 IN4 Input Inversion Mask, Low Word
60136 IN5 Input Inversion Mask, High Word
60137 IN5 Input Inversion Mask, Low Word
60139 IN6 Input Inversion Mask, High Word
60138 IN6 Input Inversion Mask, Low Word
60140 IN7 Input Inversion Mask, High Word
60141 IN7 Input Inversion Mask, Low Word
60142 IN8 Input Inversion Mask, High Word
60143 IN8 Input Inversion Mask, Low Word
60144 IN9 Input Inversion Mask, High Word
60145 IN9 Input Inversion Mask, Low Word
60146 IN10 Input Inversion Mask, High Word
60147 IN10 Input Inversion Mask, Low Word
60148 IN11 Input Inversion Mask, High Word
60149 IN11 Input Inversion Mask, Low Word
60150 IN12 Input Inversion Mask, High Word
60151 IN12 Input Inversion Mask, Low Word
60152 IN13 Input Inversion Mask, High Word
60153 IN13 Input Inversion Mask, Low Word
60154 IN14 Input Inversion Mask, High Word
60155 IN14 Input Inversion Mask, Low Word
60156 IN15 Input Inversion Mask, High Word
60157 IN15 Input Inversion Mask, Low Word
60158 IN16 Input Inversion Mask, High Word
60159 IN16 Input Inversion Mask, Low Word
60160 IN17 Input Inversion Mask, High Word
60161 IN17 Input Inversion Mask, Low Word
60162 IN18 Input Inversion Mask, High Word
60163 IN18 Input Inversion Mask, Low Word
60164 IN19 Input Inversion Mask, High Word
60165 IN19 Input Inversion Mask, Low Word
60166 IN20 Input Inversion Mask, High Word
60167 IN20 Input Inversion Mask, Low Word
60168 IN21 Input Inversion Mask, High Word
60169 IN21 Input Inversion Mask, Low Word
60170 IN22 Input Inversion Mask, High Word
60171 IN22 Input Inversion Mask, Low Word
60172 IN23 Input Inversion Mask, High Word
60173 IN23 Input Inversion Mask, Low Word
60174 IN24 Input Inversion Mask, High Word
60175 IN24 Input Inversion Mask, Low Word
60176 IN25 Input Inversion Mask, High Word
60177 IN25 Input Inversion Mask, Low Word
60178 IN26 Input Inversion Mask, High Word
60179 IN26 Input Inversion Mask, Low Word
60180 IN27 Input Inversion Mask, High Word
60181 IN27 Input Inversion Mask, Low Word
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REGISTER DEFINTION
60182 IN28 Input Inversion Mask, High Word
60183 IN28 Input Inversion Mask, Low Word
60184 IN29 Input Inversion Mask, High Word
60185 IN29 Input Inversion Mask, Low Word
60186 IN30 Input Inversion Mask, High Word
60187 IN30 Input Inversion Mask, Low Word
60188 IN31 Input Inversion Mask, High Word
60189 IN31 Input Inversion Mask, Low Word
60190 IN32 Input Inversion Mask, High Word
60191 IN32 Input Inversion Mask, Low Word
60192 Programmable Input AND/OR Selection bits 31-16
60193 Programmable Input AND/OR Selection bits 15-0
60194 Programmable Input Output Invert Mask bits 31-16*
60195 Programmable Input Output Invert Mask bits 15-0*
* Currently not supported.
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REGISTER DEFINTION
60256-60259 IN1 Character String 8 bytes
60260-60263 IN2 Character String 8 bytes
60264-60267 IN3 Character String 8 bytes
60268-60271 IN4 Character String 8 bytes
60272-60275 IN5 Character String 8 bytes
60276-60279 IN6 Character String 8 bytes
60280-60283 IN7 Character String 8 bytes
60284-60287 IN8 Character String 8 bytes
60288-60291 IN9 Character String 8 bytes
60292-60295 IN10 Character String 8 bytes
60296-60299 IN11 Character String 8 bytes
60300-60303 IN12 Character String 8 bytes
60304-60307 IN13 Character String 8 bytes
60308-60311 IN14 Character String 8 bytes
60312-60315 IN15 Character String 8 bytes
60316-60319 IN16 Character String 8 bytes
60320-60323 IN17 Character String 8 bytes
60324-60327 IN18 Character String 8 bytes
60328-60331 IN19 Character String 8 bytes
60332-60335 IN20 Character String 8 bytes
60336-60339 IN21 Character String 8 bytes
60340-60343 IN22 Character String 8 bytes
60344-60347 IN23 Character String 8 bytes
60348-60351 IN24 Character String 8 bytes
60352-60355 IN25 Character String 8 bytes
60356-60359 IN26 Character String 8 bytes
60360-60363 IN27 Character String 8 bytes
60364-60367 IN28 Character String 8 bytes
60368-60371 IN29 Character String 8 bytes
60372-60375 IN30 Character String 8 bytes
60376-60379 IN31 Character String 8 bytes
60380-60383 IN32 Character String 8 bytes
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REGISTER DEFINTION
60512 Spare
60513 Execute Register for Program Outputs (registers 60513-
61023)
(0=No Action, 1=Transfer Settings, 2=Refresh Registers)
60514 high byte Relay Password Character 1
low byte Relay Password Character 2
60515 high byte Relay Password Character 3
low byte Relay Password Character 4
60516 Spare (Writeable)
60517 OUTPUT1 Select Mask bits 31-16
60518 OUTPUT1 Select Mask bits 15-0
60519 OUTPUT2 Select Mask bits 31-16
60520 OUTPUT2 Select Mask bits 15-0
60521 OUTPUT3 Select Mask bits 31-16
60522 OUTPUT3 Select Mask bits 15-0
60523 OUTPUT4 Select Mask bits 31-16
60524 OUTPUT4 Select Mask bits 15-0
60525 OUTPUT5 Select Mask bits 31-16
60526 OUTPUT5 Select Mask bits 15-0
60527 OUTPUT6 Select Mask bits 31-16
60528 OUTPUT6 Select Mask bits 15-0
60529 OUTPUT7 Select Mask bits 31-16
60530 OUTPUT7 Select Mask bits 15-0
60531 OUTPUT8 Select Mask bits 31-16
60532 OUTPUT8 Select Mask bits 15-0
60533 OUTPUT9 Select Mask bits 31-16
60534 OUTPUT9 Select Mask bits 15-0
60535 OUTPUT10 Select Mask bits 31-16
60536 OUTPUT10 Select Mask bits 15-0
60537 OUTPUT11 Select Mask bits 31-16
60538 OUTPUT11 Select Mask bits 15-0
60539 OUTPUT12 Select Mask bits 31-16
60540 OUTPUT12 Select Mask bits 15-0
60541 OUTPUT13 Select Mask bits 31-16
60542 OUTPUT13 Select Mask bits 15-0
60543 OUTPUT14 Select Mask bits 31-16
60544 OUTPUT14 Select Mask bits 15-0
60545 OUTPUT15 Select Mask bits 31-16
60546 OUTPUT15 Select Mask bits 15-0
60547 OUTPUT16 Select Mask bits 31-16
60548 OUTPUT16 Select Mask bits 15-0
60549 OUTPUT17 Select Mask bits 31-16
60550 OUTPUT17 Select Mask bits 15-0
60551 OUTPUT18 Select Mask bits 31-16
60552 OUTPUT18 Select Mask bits 15-0
60553 OUTPUT19 Select Mask bits 31-16
60554 OUTPUT19 Select Mask bits 15-0
60555 OUTPUT20 Select Mask bits 31-16
60556 OUTPUT20 Select Mask bits 15-0
60557 OUTPUT21 Select Mask bits 31-16
60558 OUTPUT21 Select Mask bits 15-0
60559 OUTPUT22 Select Mask bits 31-16
60560 OUTPUT22 Select Mask bits 15-0
60561 OUTPUT23 Select Mask bits 31-16
60562 OUTPUT23 Select Mask bits 15-0
60563 OUTPUT24 Select Mask bits 31-16
60564 OUTPUT24 Select Mask bits 15-0
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REGISTER DEFINTION
60565 OUTPUT25 Select Mask bits 31-16
60566 OUTPUT25 Select Mask bits 15-0
60567 OUTPUT26 Select Mask bits 31-16
60568 OUTPUT26 Select Mask bits 15-0
60569 OUTPUT27 Select Mask bits 31-16
60570 OUTPUT27 Select Mask bits 15-0
60571 OUTPUT28 Select Mask bits 31-16
60572 OUTPUT28 Select Mask bits 15-0
60573 OUTPUT29 Select Mask bits 31-16
60574 OUTPUT29 Select Mask bits 15-0
60575 OUTPUT30 Select Mask bits 31-16
60576 OUTPUT30 Select Mask bits 15-0
60577 OUTPUT31 Select Mask bits 31-16
60578 OUTPUT31 Select Mask bits 15-0
60579 OUTPUT32 Select Mask bits 31-16
60580 OUTPUT32 Select Mask bits 15-0
60581 high byte OUTPUT1 index byte
low byte OUTPUT2 index byte
60582 high byte OUTPUT3 index byte
low byte OUTPUT4 index byte
60583 high byte OUTPUT5 index byte
low byte OUTPUT6 index byte
60584 high byte OUTPUT7 index byte
low byte OUTPUT8 index byte
60585 high byte OUTPUT9 index byte
low byte OUTPUT10 index byte
60586 high byte OUTPUT11 index byte
low byte OUTPUT12 index byte
60587 high byte OUTPUT13 index byte
low byte OUTPUT14 index byte
60588 high byte OUTPUT15 index byte
low byte OUTPUT16 index byte
60589 high byte OUTPUT17 index byte
low byte OUTPUT18 index byte
60590 high byte OUTPUT19 index byte
low byte OUTPUT20 index byte
60591 high byte OUTPUT21 index byte
low byte OUTPUT22 index byte
60592 high byte OUTPUT23 index byte
low byte OUTPUT24 index byte
60593 high byte OUTPUT25 index byte
low byte OUTPUT26 index byte
60594 high byte OUTPUT27 index byte
low byte OUTPUT28 index byte
60595 high byte OUTPUT29 index byte
low byte OUTPUT30 index byte
60596 high byte OUTPUT31 index byte
low byte OUTPUT32 index byte
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6.1.5 Programmable Output Input Invert, AND/OR Select, & Output Invert Mask
Input Inversion: Bit = 0, Input Inverted.
Bit = 1, Input Normal.
AND/OR Selection: Bit = 0, Selected inputs are ORed together.
Bit = 1, Selected inputs are ANDed together.
Output Inversion: Bit = 0, Normal
Bit = 1, Inverted
REGISTER DEFINTION
60640 OUT1 Input Invert Mask, High Word
60641 OUT1 Input Invert Mask, Low Word
60642 OUT2 Input Invert Mask, High Word
60643 OUT2 Input Invert Mask, Low Word
60644 OUT3 Input Invert Mask, High Word
60645 OUT3 Input Invert Mask, Low Word
60646 OUT4 Input Invert Mask, High Word
60647 OUT4 Input Invert Mask, Low Word
60648 OUT5 Input Invert Mask, High Word
60649 OUT5 Input Invert Mask, Low Word
60650 OUT6 Input Invert Mask, High Word
60651 OUT6 Input Invert Mask, Low Word
60652 OUT7 Input Invert Mask, High Word
60653 OUT7 Input Invert Mask, Low Word
60654 OUT8 Input Invert Mask, High Word
60655 OUT8 Input Invert Mask, Low Word
60656 OUT9 Input Invert Mask, High Word
60657 OUT9 Input Invert Mask, Low Word
60658 OUT10 Input Invert Mask, High Word
60659 OUT10 Input Invert Mask, Low Word
60660 OUT11 Input Invert Mask, High Word
60661 OUT11 Input Invert Mask, Low Word
60662 OUT12 Input Invert Mask, High Word
60663 OUT12 Input Invert Mask, Low Word
60664 OUT13 Input Invert Mask, High Word
60665 OUT13 Input Invert Mask, Low Word
60666 OUT14 Input Invert Mask, High Word
60667 OUT14 Input Invert Mask, Low Word
60668 OUT15 Input Invert Mask, High Word
60669 OUT15 Input Invert Mask, Low Word
60670 OUT16 Input Invert Mask, High Word
60671 OUT16 Input Invert Mask, Low Word
60672 OUT17 Input Invert Mask, High Word
60673 OUT17 Input Invert Mask, Low Word
60674 OUT18 Input Invert Mask, High Word
60675 OUT18 Input Invert Mask, Low Word
60676 OUT19 Input Invert Mask, High Word
60677 OUT19 Input Invert Mask, Low Word
60678 OUT20 Input Invert Mask, High Word
60679 OUT20 Input Invert Mask, Low Word
60680 OUT21 Input Invert Mask, High Word
60681 OUT21 Input Invert Mask, Low Word
60682 OUT22 Input Invert Mask, High Word
60683 OUT22 Input Invert Mask, Low Word
60684 OUT23 Input Invert Mask, High Word
60685 OUT23 Input Invert Mask, Low Word
60686 OUT24 Input Invert Mask, High Word
60687 OUT24 Input Invert Mask, Low Word
60688 OUT25 Input Invert Mask, High Word
60689 OUT25 Input Invert Mask, Low Word
60690 OUT26 Input Invert Mask, High Word
60691 OUT26 Input Invert Mask, Low Word
60692 OUT27 Input Invert Mask, High Word
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REGISTER DEFINTION
60693 OUT27 Input Invert Mask, Low Word
60694 OUT28 Input Invert Mask, High Word
60695 OUT28 Input Invert Mask, Low Word
60696 OUT29 Input Invert Mask, High Word
60697 OUT29 Input Invert Mask, Low Word
60698 OUT30 Input Invert Mask, High Word
60699 OUT30 Input Invert Mask, Low Word
60700 OUT31 Input Invert Mask, High Word
60701 OUT31 Input Invert Mask, Low Word
60702 OUT32 Input Invert Mask, High Word
60703 OUT32 Input Invert Mask, Low Word
60704 Programmable Output AND/OR Selection bits 31-16
60705 Programmable Output AND/OR Selection bits 15-0
60706 Programmable Output Output Invert Mask bits 31-16*
60707 Programmable Output Output Invert Mask bits 15-0*
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REGISTER DEFINTION
60768-60771 OUT1 Character String 8 bytes
60772-60775 OUT2 Character String 8 bytes
60776-60779 OUT3 Character String 8 bytes
60780-60783 OUT4 Character String 8 bytes
60784-60787 OUT5 Character String 8 bytes
60788-60791 OUT6 Character String 8 bytes
60792-60795 OUT7 Character String 8 bytes
60796-60799 OUT8 Character String 8 bytes
60800-60803 OUT9 Character String 8 bytes
60804-60807 OUT10 Character String 8 bytes
60808-60811 OUT11 Character String 8 bytes
60812-60815 OUT12 Character String 8 bytes
60816-60819 OUT13 Character String 8 bytes
60820-60823 OUT14 Character String 8 bytes
60824-60827 OUT15 Character String 8 bytes
60828-60831 OUT16 Character String 8 bytes
60832-60835 OUT17 Character String 8 bytes
60836-60839 OUT18 Character String 8 bytes
60840-60843 OUT19 Character String 8 bytes
60844-60847 OUT20 Character String 8 bytes
60848-60851 OUT21 Character String 8 bytes
60852-60855 OUT22 Character String 8 bytes
60856-60859 OUT23 Character String 8 bytes
60860-60863 OUT24 Character String 8 bytes
60864-60867 OUT25 Character String 8 bytes
60868-60871 OUT26 Character String 8 bytes
60872-60875 OUT27 Character String 8 bytes
60876-60879 OUT28 Character String 8 bytes
60880-60883 OUT29 Character String 8 bytes
60884-60887 OUT30 Character String 8 bytes
60888-60891 OUT31 Character String 8 bytes
60892-60895 OUT32 Character String 8 bytes
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All model PCDs support ANSI, IEC, and Recloser curves. However, not all the curves are available
from within the setting groups at the same time. A menu item in Configuration is used to select which
of the three curve groups that can be used (ANSI, IEC, Recloser).
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The tables below show the new recloser curves added to the PCD firmware version 2.30.
Table 6.1.8.3.1: Recloser Curves type V Table 6.1.8.3.2: Recloser Curves type VI
Index Recloser Type V LCD Display Index Recloser Type VI LCD Display
(Protection) (51P, 67P, 67N) (Protection) (50P-1, 46, 51N, 50N-1)
0 RECLOSER_A_IDX A (101) 0 CURVE_DISABLED_IDX Disabled
1 RECLOSER_B_IDX B (117) 1 RECLOSER_A_IDX A (101)
2 RECLOSER_C_IDX C (133) 2 RECLOSER_B_IDX B (117)
3 RECLOSER_D_IDX D (116) 3 RECLOSER_C_IDX C (133)
4 RECLOSER_E_IDX E (132) 4 RECLOSER_D_IDX D (116)
5 RECLOSER_F_IDX F (163) 5 RECLOSER_E_IDX E (132)
6 RECLOSER_G_IDX G (121) 6 RECLOSER_F_IDX F (163)
7 RECLOSER_H_IDX H (122) 7 RECLOSER_G_IDX G (121)
8 RECLOSER_J_IDX J (164) 8 RECLOSER_H_IDX H (122)
9 RECLOSER_K_IDX KP(162) 9 RECLOSER_J_IDX J (164)
10 RECLOSER_L_IDX L (107) 10 RECLOSER_K_IDX KP(162)
11 RECLOSER_M_IDX M (118) 11 RECLOSER_L_IDX L (107)
12 RECLOSER_N_IDX N (104) 12 RECLOSER_M_IDX M (118)
13 RECLOSER_P_IDX P (115) 13 RECLOSER_N_IDX N (104)
14 RECLOSER_R_IDX R (105) 14 RECLOSER_P_IDX P (115)
15 RECLOSER_T_IDX T (161) 15 RECLOSER_R_IDX R (105)
16 RECLOSER_V_IDX V (137) 16 RECLOSER_T_IDX T (161)
17 RECLOSER_W_IDX W (138) 17 RECLOSER_V_IDX V (137)
18 RECLOSER_Y_IDX Y (120) 18 RECLOSER_W_IDX W (138)
19 RECLOSER_Z_IDX Z (134) 19 RECLOSER_Y_IDX Y (120)
20 RECLOSER_1_IDX 1 (102) 20 RECLOSER_Z_IDX Z (134)
21 RECLOSER_2_IDX 2 (135) 21 RECLOSER_1_IDX 1 (102)
22 RECLOSER_3_IDX 3 (140) 22 RECLOSER_2_IDX 2 (135)
23 RECLOSER_4_IDX 4 (106) 23 RECLOSER_3_IDX 3 (140)
24 RECLOSER_5_IDX 5 (114) 24 RECLOSER_4_IDX 4 (106)
25 RECLOSER_6_IDX 6 (136) 25 RECLOSER_5_IDX 5 (114)
26 RECLOSER_7_IDX 7 (152) 26 RECLOSER_6_IDX 6 (136)
27 RECLOSER_8_IDX 8 (113) 27 RECLOSER_7_IDX 7 (152)
28 RECLOSER_8s_IDX 8* 28 RECLOSER_8_IDX 8 (113)
29 RECLOSER_8t_IDX 8+ (111) 29 RECLOSER_8s_IDX 8*
30 RECLOSER_9_IDX 9 (131) 30 RECLOSER_8t_IDX 8+ (111)
31 RECLOSER_11_IDX 11 (141) 31 RECLOSER_9_IDX 9 (131)
32 RECLOSER_13_IDX 13 (142) 32 RECLOSER_11_IDX 11 (141)
33 RECLOSER_14_IDX 14 (119) 33 RECLOSER_13_IDX 13 (142)
34 RECLOSER_15_IDX 15 (112) 34 RECLOSER_14_IDX 14 (119)
35 RECLOSER_16_IDX 16 (139) 35 RECLOSER_15_IDX 15 (112)
36 RECLOSER_17_IDX 17 (103) 36 RECLOSER_16_IDX 16 (139)
37 RECLOSER_18_IDX 18 (151) 37 RECLOSER_17_IDX 17 (103)
38 RECLOSER_KG_IDX KG (165) 38 RECLOSER_18_IDX 18 (151)
39 IEC Inverse IEC Inv (200) 39 RECLOSER_KG_IDX KG (165)
40 IEC Very Inverse IEC V.Inv (201) 40 IEC Inverse IEC Inv (200)
41 IEC Extremely Inverse IEC E.Inv (202) 41 IEC Very Inverse IEC V.Inv (201)
42 USER_CURVE_1_IDX User Curve 1 42 IEC Extremely Inverse IEC E.Inv (202)
43 USER_CURVE_2_IDX User Curve 2 43 USER_CURVE_1_IDX User Curve 1
44 USER_CURVE_3_IDX User Curve 3 44 USER_CURVE_2_IDX User Curve 2
45 USER_CURVE_3_IDX User Curve 3
119
PCD MODBUS® Protocol Implementation Details
ABB Inc.
120
PCD MODBUS® Protocol Implementation Details
ABB Inc.
121
PCD MODBUS® Protocol Implementation Details
ABB Inc.
Note: This block is no longer supported as of PCD2000 revision V2.00. See sections
6.1.28 and 6.1.29 for description of new method of updating protection and recloser
settings.
REGISTER DEFINTION
61024 Spare
61025 Execute Register for Program Outputs (registers 61025- 61151)
(0=No Action, 1=Transfer Settings, 2=Refresh Registers)
61026 high byte Relay Password Character 1
low byte Relay Password Character 2
61027 high byte Relay Password Character 3
low byte Relay Password Character 4
61028 Spare (Writeable)
61029 Configuration Long Word (high)
61030 Configuration Long Word (low)
61031 51P Curve Select byte (ANSI/IEC/Recloser Type I)
61032 51P Pickup Amps byte (See Tap Setting Tables, above)
61033 51P Time dial(1-10 *20)/delay byte(0-10 * 20)
IEC Version-51P Time Multiplier (.05-1.00 *200)
61034 50P-1 Curve Select byte (ANSI/IEC/Recloser Type III)
61035 50P-1 Pickup X byte (0.5-20 *10)
61036 50P-1 Timedial (1-10 *10)/delay(0-9.99 *100)
IEC Version -50P-1 Time Multiplier (.05-1.00 *200)
61037 50P-2 Select byte (0=Disable, 1=Enable)
61038 50P-2 Pickup X byte (0.5-20 *10)
61039 50P-2 Timedial (1-10 *10)/delay(0-9.99 *100)
IEC Version -50P-2 Time Multiplier (.05-1.00 *200)
61040 50P-3 Select byte (0=Disable, 1=Enable)
61041 50P-3 Pickup X byte (0.5-20 *10)
61042 46 Curve Select byte (ANSI/IEC Type II, Recloser Type III)
61043 46 Pickup Amps byte (See Tap Setting Tables, above)
61044 46 Time dial(1-10 *20)/delay byte(0-10 * 20)
IEC Version -46 Time Multiplier (.05-1.00 *200)
61045 51N Curve Select byte (ANSI/IEC Type II, Recloser Type IV)
61046 51N Pickup Amps byte (See Tap Setting Tables, above)
61047 51N Time dial(1-10 *20)/delay byte(0-10 * 20)
IEC Version -51N Time Multiplier (.05-1.00 *200)
61048 50N-1 Curve Select byte (ANSI/IEC Type III, Recloser Type IV)
61049 50N-1 Pickup X byte (0.5-20 *10)
61050 50N-1 Timedial/delay (1-10 *10, 0-9.99 *100)
IEC Version -50N-1 Time Multiplier (.05-1.00 *200)
61051 50N-2 Select byte (0 = Disable, 1 = Enable)
Sensitive Earth Model(0=Disable,1=Standard,2=SEF,3=Directional SEF)
61052 50N-2 Pickup X byte (0.5-20 *10)
61053 50N-2 Time delay (0-9.99 *100)
IEC Version -50N-2 Time Multiplier (0.50 to 1.00 *200)
61054 50N-3 Select byte (0=Disable, 1=Enable)
61055 50N-3 Pickup X byte (0.5-20 *10)
61056 79 Reset Time byte (3-200)
61057 79-1 Select high byte (Lockout Type) low byte (Enable Type)
61058 79-1 Open Interval Time (0.1 - 200 *10, 2001 = Lockout)
Sensitive Earth Model (0.1 to 1800 *10, 18001=Lockout)
61059 79-2 Select high byte (Lockout Type) low byte (Enable Type)
61060 79-2 Open Interval Time (0.1 - 200 *10, 2001 = Lockout)
Sensitive Earth Model (0.1 to 1800 *10, 18001=Lockout)
61061 79-3 Select high byte (Lockout Type) low byte (Enable Type)
61062 79-3 Open Interval Time (0.1 - 200 *10, 2001 = Lockout)
Sensitive Earth Model (0.1 to 1800 *10, 18001=Lockout)
61063 79-4 Select high byte (Lockout Type) low byte (Enable Type)
61064 79-4 Open Interval Time high byte (0.1 - 200 *10, 2001 = Lockout)
Sensitive Earth Model (0.1 to 1800 *10, 18001=Lockout)
61065 79-5 Select high byte (Lockout Type) low byte (Enable Type)
61066 79-5 Open Interval Time (always lockout)
122
PCD MODBUS® Protocol Implementation Details
ABB Inc.
REGISTER DEFINTION
61067 79 Cutout Time byte (1 -201) (201 = Disable)
61068 Cold Load Time byte (1 -254) (255 = Disable)
61069 2 Phase Voting byte (0=Disable, 1=Enable)
61070 67P Select byte (0=Disable, 1=Enable, 2=Lockout)
61071 67P Curve Select byte (ANSI/IEC/Recloser Type I)
61072 67P Pickup Amps byte (See Tap Setting Tables, above)
61073 67P Time dial(1-10 *20)/delay(0-10 * 20) byte
IEC Version -67P Time Multiplier (.05-1.00 *200)
61074 67P Torque Angle byte (0-355 /5)
61075 67N Select byte (0=Disable, 1=Enable, 2=Lockout)
Sensitive Earth Model (0=Disable, 1=Enable-Neg Sequence, 2=Lockout-
Neg Sequence, 5=Enable-Zero Sequence, 6=Lockout Zero Sequence)
61076 67N Curve Select byte (ANSI/IEC Type I, Recloser Type II)
61077 67N Pickup Amps byte (See Tap Setting Tables, above)
61078 67N Time dial(1-10 *20)/delay(0-10 * 20) byte
IEC Version -67N Time Multiplier (.05-1.00 *200)
61079 67N Torque Angle byte (0-355 /5)
61080 81 Select byte (0=Disable,1=81-1, 2=81-2, 3=Special)
61081 81s-1 Pickup Frequency
(60hz: 56-64 *100, 6401=Disable, 50hz: 46-54 *100, 5401=Disable)
61082 81s-1 Timedelay (0.08-9.98 *100)
61083 81r-1 Pickup Frequency
(60hz: 56-64 *100, 6401=Disable 50hz: 46-54 *100, 5401=Disable)
61084 81r-1 Timedelay (0-999)
61085 81v Voltage Block high byte (40-200)
61086 27 Select byte (0=Disable, 1=Enable)
61087 27 Pickup Voltage (10-200)
61088 27 Timedelay byte (0-60)
61089 79v Select byte (0=Disable, 1=Enable)
61090 79v Pickup Voltage (10-200)
61091 79v Timedelay byte (4-200)
61092 59 Select byte (0=Disable, 1=Enable)
61093 59 Pickup Voltage high byte (70-250)
61094 59 Timedelay byte (0-60)
61095 51 P Minimum Response (0.00 – 2.00 Seconds, *100)
61096 51 N Minimum Response (0.00 – 2.00 Seconds, *100)
61097 50 P-1 Minimum Response (0.00 – 2.00 Seconds, *100)
61098 50 N-1 Minimum Response (0.00 – 2.00 Seconds, *100)
61099 81s-2 Pickup Frequency
(60hz: 56-64 *100, 6401=Disable 50hz: 46-54 *100, 5401=Disable)
61100 81s-2 Timedelay (0.08-9.98 *100)
61101 81r-2 Pickup Frequency
(60hz: 56-64 *100, 6401=Disable 50hz: 46-54 *100, 5401=Disable)
61102 81r-2 Timedelay (0-999)
61103 Sensitive Earth Model-SEF Torque Angle (0-355 /5)
61104 Sensitive Earth Model-SEF 50N-2 Pickup mA high byte(.005-.060 *2000)
61105 Sensitive Earth Model- Neutral Cold Load (1-254)(255= Disable)
61106 32P Select (0=Disable)
61107 32P Torque Angle (0-355/5)
61108 32N Select (0=Disable)
61109 32N Torque Angle (0-355/5)
61110 51P Time-Curve Adder (0.00 to 2.00 Seconds * 100)
61111 50P-1 Time-Curve Adder (0.00 to 2.00 Seconds * 100)
61112 46 Time-Curve Adder (0.00 to =2.00 Seconds * 100)
61113 51N Time-Curve Adder (0.00 to 2.00 Seconds * 100)
61114 50N-1 Time-Curve Adder (0.00 to 2.00 Seconds * 100)
61115 67P Time-Curve Adder (0.00 to 2.00 Seconds * 100)
61116 67N Time-Curve Adder (0.00 to 2.00 Seconds * 100)
61117 46 Minimum Response Time (0.00 – 2.00 Seconds, *100)
61118 67P Minimum response Time (0.00 – 2.00 Seconds, * 100)
61119 67N Minimum response Time (0.00 – 2.00 Seconds, * 100)
61120 50P-3 Time Delay (0.00 – 2.00 Seconds, *100)
61121 50N-3 Time Delay (0.00 – 2.00 Seconds, *100)
123
PCD MODBUS® Protocol Implementation Details
ABB Inc.
Note: This block is no longer supported as of PCD2000 revision V2.00. See sections
6.1.28 and 6.1.29 for description of new method of updating protection and recloser
settings.
REGISTER DEFINTION
61152 Spare
61153 Execute Register for Alternate 1 Settings (registers 61153- 61279)
(0=No Action, 1=Transfer Settings, 2=Refresh Registers)
61154 high byte Relay Password Character 1
low byte Relay Password Character 2
61155 high byte Relay Password Character 3
low byte Relay Password Character 4
61156 Spare (Writeable)
61157 Configuration Long Word (high)
61158 Configuration Long Word (low)
61159 51P Curve Select byte (Type I or Recloser Type I)
61160 51P Pickup Amps byte (See Tap Setting Tables, above)
61161 51P Time dial(1-10 *20)/delay byte(0-10 * 20)
IEC Version-51P Time Multiplier (.05-1.00 *200)
61162 50P-1 Curve Select byte (Type III or Recloser Type III)
61163 50P-1 Pickup X byte (0.5-20 *10)
61164 50P-1 Timedial (1-10 *10)/delay(0-9.99 *100)
IEC Version -50P-1 Time Multiplier (.05-1.00 *200)
61165 50P-2 Select byte (0=Disable, 1=Enable)
61166 50P-2 Pickup X byte (0.5-20 *10)
61167 50P-2 Timedial (1-10 *10)/delay(0-9.99 *100)
IEC Version -50P-2 Time Multiplier (.05-1.00 *200)
61168 50P-3 Select byte (0=Disable, 1=Enable)
61169 50P-3 Pickup X byte (0.5-20 *10)
61170 46 Curve Select byte (Type II)
61171 46 Pickup Amps byte (1-12Amp *10, 0.2-2.4Amp *50)
61172 46 Time dial(1-10 *20)/delay byte(0-10 * 20)
IEC Version -46 Time Multiplier (.05-1.00 *200)
61173 51N Curve Select byte (Type II or Recloser Type II)
61174 51N Pickup Amps byte (See Tap Setting Tables, above)
61175 51N Time dial(1-10 *20)/delay byte(0-10 * 20)
IEC Version -51N Time Multiplier (.05-1.00 *200)
61176 50N-1 Curve Select byte (Type III or Recloser Type IV)
61177 50N-1 Pickup X byte (0.5-20 *10)
61178 50N-1 Timedial/delay (1-10 *10, 0-9.99 *100)
IEC Version -50N-1 Time Multiplier (.05-1.00 *200)
61179 50N-2 Select byte (0 = Disable, 1 = Enable)
Sensitive Earth Model(0=Disable,1=Standard,2=SEF,3=Directional SEF)
61180 50N-2 Pickup X byte (0.5-20 *10)
61181 50N-2 Timedelay (0-9.99 *100)
IEC Version -50N-2 Time Multiplier (0.50 to 1.00 *200)
61182 50N-3 Select byte (0=Disable, 1=Enable)
61183 50N-3 Pickup X byte (0.5-20 *10)
61184 79 Reset Time byte (3-200)
61185 79-1 Select high byte (Lockout Type) low byte (Enable Type)
61186 79-1 Open Interval Time (0.1 - 200 *10, 2001 = Lockout)
Sensitive Earth Model (0.1 to 1800 *10, 18001=Lockout)
61187 79-2 Select high byte (Lockout Type) low byte (Enable Type)
61188 79-2 Open Interval Time (0.1 - 200 *10, 2001 = Lockout)
Sensitive Earth Model (0.1 to 1800 *10, 18001=Lockout)
61189 79-3 Select high byte (Lockout Type) low byte (Enable Type)
61190 79-3 Open Interval Time (0.1 - 200 *10, 2001 = Lockout)
Sensitive Earth Model (0.1 to 1800 *10, 18001=Lockout)
61191 79-4 Select high byte (Lockout Type) low byte (Enable Type)
61192 79-4 Open Interval Time high byte (0.1 - 200 *10, 2001 = Lockout)
Sensitive Earth Model (0.1 to 1800 *10, 18001=Lockout)
61193 79-5 Select high byte (Lockout Type) low byte (Enable Type)
61194 79-5 Open Interval Time (always lockout)
124
PCD MODBUS® Protocol Implementation Details
ABB Inc.
REGISTER DEFINTION
61195 79 Cutout Time byte (1 -201) (201 = Disable)
61196 Cold Load Time byte (1 -254) (255 = Disable)
61197 2 Phase Voting byte (0=Disable, 1=Enable)
61198 67P Select byte (0=Disable, 1=Enable, 2=Lockout)
61199 67P Curve Select byte (Type I)
61200 67P Pickup Amps byte (See Tap Setting Tables, above)
61201 67P Time dial(1-10 *20)/delay(0-10 * 20) byte
IEC Version -67P Time Multiplier (.05-1.00 *200)
61202 67P Torque Angle byte (0-355 /5)
67N Select byte (0=Disable, 1=Enable, 2=Lockout)
61203 Sensitive Earth Model (0=Disable, 1=Enable-Neg Sequence, 2=Lockout-
Neg Sequence, 5=Enable-Zero Sequence, 6=Lockout Zero Sequence)
61204 67N Curve Select byte (Type I)
61205 67N Pickup Amps byte (See Tap Setting Tables, above)
61206 67N Time dial(1-10 *20)/delay(0-10 * 20) byte
IEC Version -67N Time Multiplier (.05-1.00 *200)
61207 67N Torque Angle byte (0-355 /5)
61208 81 Select byte (0=Disable,1=81-1, 2=81-2, 3=Special)
61209 81s-1 Pickup Frequency
(60hz: 56-64 *100, 6401=Disable, 50hz: 46-54 *100, 5401=Disable)
61210 81s-1 Timedelay (0.08-9.98 *100)
61211 81r-1 Pickup Frequency
(60hz: 56-64 *100, 6401=Disable 50hz: 46-54 *100, 5401=Disable)
61212 81r-1 Timedelay (0-999)
61213 81v Voltage Block high byte (40-200)
61214 27 Select byte (0=Disable, 1=Enable)
61215 27 Pickup Voltage (10-200)
61216 27 Timedelay byte (0-60)
61217 79v Select byte (0=Disable, 1=Enable)
61218 79v Pickup Voltage (10-200)
61219 79v Timedelay byte (4-200)
61220 59 Select byte (0=Disable, 1=Enable)
61221 59 Pickup Voltage high byte (70-250)
61222 59 Timedelay byte (0-60)
61223 51 P Minimum Response (0.00 – 2.00 Seconds, *100)
61224 51 N Minimum Response (0.00 – 2.00 Seconds, *100)
61225 50 P-1 Minimum Response (0.00 – 2.00 Seconds, *100)
61226 50 N-1 Minimum Response (0.00 – 2.00 Seconds, *100)
61227 81s-2 Pickup Frequency
(60hz: 56-64 *100, 6401=Disable 50hz: 46-54 *100, 5401=Disable)
61228 81s-2 Timedelay (0.08-9.98 *100)
61229 81r-2 Pickup Frequency
(60hz: 56-64 *100, 6401=Disable 50hz: 46-54 *100, 5401=Disable)
61230 81r-2 Timedelay (0-999)
61231 Sensitive Earth Model-SEF Torque Angle (0-355 /5)
61232 Sensitive Earth Model-SEF 50N-2 Pickup mA high byte(.005-.060 *2000)
61233 Sensitive Earth Model- Neutral Cold Load (1-254)(255= Disable)
61234 32P Select (0=Disable)
61235 32P Torque Angle (0-355/5)
61236 32N Select (0=Disable)
61237 32N Torque Angle (0-355/5)
61238 51P Time-Curve Adder (0.00 to 2.00 Seconds * 100)
61239 50P-1 Time-Curve Adder (0.00 to 2.00 Seconds * 100)
61240 46 Time-Curve Adder (0.00 to 2.00 Seconds * 100)
61241 51N Time-Curve Adder (0.00 to 2.00 Seconds * 100)
61242 50N-1 Time-Curve Adder (0.00 to 2.00 Seconds * 100)
61243 67P Time-Curve Adder (0.00 to 2.00 Seconds * 100)
61244 67N Time-Curve Adder (0.00 to 2.00 Seconds * 100)
61245 46 Minimum Response Time (0.00 – 2.00 Seconds, *100)
61246 67P Minimum response Time (0.00 – 2.00 Seconds, * 100)
61247 67N Minimum response Time (0.00 – 2.00 Seconds, * 100)
61248 50P-3 Time Delay (0.00 – 2.00 Seconds, *100)
61249 50N-3 Time Delay (0.00 – 2.00 Seconds, *100)
125
PCD MODBUS® Protocol Implementation Details
ABB Inc.
Note: This block is no longer supported as of PCD2000 revision V2.00. See sections
6.1.28 and 6.1.29 for description of new method of updating protection and recloser
settings.
REGISTER DEFINTION
61280 Spare
61281 Execute Register for Alternate 2 Settings (registers 61281- 61407)
(0=No Action, 1=Transfer Settings, 2=Refresh Registers)
61282 high byte Relay Password Character 1
low byte Relay Password Character 2
61283 high byte Relay Password Character 3
low byte Relay Password Character 4
61284 Spare (Writeable)
61285 Configuration Long Word (high)
61286 Configuration Long Word (low)
61287 51P Curve Select byte (Type I or Recloser Type I)
61288 51P Pickup Amps byte (See Tap Setting Tables, above)
61289 51P Time dial(1-10 *20)/delay byte(0-10 * 20)
IEC Version-51P Time Multiplier (.05-1.00 *200)
61290 50P-1 Curve Select byte (Type III or Recloser Type III)
61291 50P-1 Pickup X byte (0.5-20 *10)
61292 50P-1 Timedial (1-10 *10)/delay(0-9.99 *100)
IEC Version -50P-1 Time Multiplier (.05-1.00 *200)
61293 50P-2 Select byte (0=Disable, 1=Enable)
61294 50P-2 Pickup X byte (0.5-20 *10)
61295 50P-2 Timedial (1-10 *10)/delay(0-9.99 *100)
IEC Version -50P-2 Time Multiplier (.05-1.00 *200)
61296 50P-3 Select byte (0=Disable, 1=Enable)
61297 50P-3 Pickup X byte (0.5-20 *10)
61298 46 Curve Select byte (Type II)
61299 46 Pickup Amps byte (See Tap Setting Tables, above)
61300 46 Time dial(1-10 *20)/delay byte(0-10 * 20)
IEC Version -46 Time Multiplier (.05-1.00 *200)
61301 51N Curve Select byte (Type II or Recloser Type II)
61302 51N Pickup Amps byte (See Tap Setting Tables, above)
61303 51N Time dial(1-10 *20)/delay byte(0-10 * 20)
IEC Version -51N Time Multiplier (.05-1.00 *200)
61304 50N-1 Curve Select byte (Type III or Recloser Type IV)
61305 50N-1 Pickup X byte (0.5-20 *10)
61306 50N-1 Timedial/delay (1-10 *10, 0-9.99 *100)
IEC Version -50N-1 Time Multiplier (.05-1.00 *200)
61307 50N-2 Select byte (0 = Disable, 1 = Enable)
Sensitive Earth Model(0=Disable,1=Standard,2=SEF,3=Directional SEF)
61308 50N-2 Pickup X byte (0.5-20 *10)
61309 50N-2 Timedelay (0-9.99 *100)
IEC Version -50N-2 Time Multiplier (0.50 to 1.00 *200)
61310 50N-3 Select byte (0=Disable, 1=Enable)
61311 50N-3 Pickup X byte (0.5-20 *10)
61312 79 Reset Time byte (3-200)
61313 79-1 Select high byte (Lockout Type) low byte (Enable Type)
61314 79-1 Open Interval Time (0.1 - 200 *10, 2001 = Lockout)
Sensitive Earth Model (0.1 to 1800 *10, 18001=Lockout)
61315 79-2 Select high byte (Lockout Type) low byte (Enable Type)
61316 79-2 Open Interval Time (0.1 - 200 *10, 2001 = Lockout)
Sensitive Earth Model (0.1 to 1800 *10, 18001=Lockout)
61317 79-3 Select high byte (Lockout Type) low byte (Enable Type)
61318 79-3 Open Interval Time (0.1 - 200 *10, 2001 = Lockout)
Sensitive Earth Model (0.1 to 1800 *10, 18001=Lockout)
61319 79-4 Select high byte (Lockout Type) low byte (Enable Type)
61320 79-4 Open Interval Time high byte (0.1 - 200 *10, 2001 = Lockout)
Sensitive Earth Model (0.1 to 1800 *10, 18001=Lockout)
61321 79-5 Select high byte (Lockout Type) low byte (Enable Type)
61322 79-5 Open Interval Time (always lockout)
126
PCD MODBUS® Protocol Implementation Details
ABB Inc.
REGISTER DEFINTION
61323 79 Cutout Time byte (1 -201) (201 = Disable)
61324 Cold Load Time byte (1 –254) (255 = Disable)
61325 2 Phase Voting byte (0=Disable, 1=Enable)
61326 67P Select byte (0=Disable, 1=Enable, 2=Lockout)
61327 67P Curve Select byte (Type I)
61328 67P Pickup Amps byte (See Tap Setting Tables, above)
61329 67P Time dial(1-10 *20)/delay(0-10 * 20) byte
IEC Version -67P Time Multiplier (.05-1.00 *200)
61330 67P Torque Angle byte (0-355 /5)
61331 67N Select byte (0=Disable, 1=Enable, 2=Lockout)
Sensitive Earth Model (0=Disable, 1=Enable-Neg Sequence, 2=Lockout-
Neg Sequence, 5=Enable-Zero Sequence, 6=Lockout Zero Sequence)
61332 67N Curve Select byte (Type I)
61333 67N Pickup Amps byte (See Tap Setting Tables, above)
61334 67N Time dial(1-10 *20)/delay(0-10 * 20) byte
IEC Version -67N Time Multiplier (.05-1.00 *200)
61335 67N Torque Angle byte (0-355 /5)
61336 81 Select byte (0=Disable,1=81-1, 2=81-2, 3=Special)
61337 81s-1 Pickup Frequency
(60hz: 56-64 *100, 6401=Disable, 50hz: 46-54 *100, 5401=Disable)
61338 81s-1 Timedelay (0.08-9.98 *100)
61339 81r-1 Pickup Frequency
(60hz: 56-64 *100, 6401=Disable 50hz: 46-54 *100, 5401=Disable)
61340 81r-1 Timedelay (0-999)
61341 81v Voltage Block high byte (40-200)
61342 27 Select byte (0=Disable, 1=Enable)
61343 27 Pickup Voltage (10-200)
61344 27 Timedelay byte (0-60)
61345 79v Select byte (0=Disable, 1=Enable)
61346 79v Pickup Voltage (10-200)
61347 79v Timedelay byte (4-200)
61348 59 Select byte (0=Disable, 1=Enable)
61349 59 Pickup Voltage high byte (70-250)
61350 59 Timedelay byte (0-60)
61351 51 P Minimum Response (0.00 – 2.00 Seconds, *100)
61352 51 N Minimum Response (0.00 – 2.00 Seconds, *100)
61353 50 P-1 Minimum Response (0.00 – 2.00 Seconds, *100)
61354 50 N-1 Minimum Response (0.00 – 2.00 Seconds, *100)
61355 81s-2 Pickup Frequency
(60hz: 56-64 *100, 6401=Disable 50hz: 46-54 *100, 5401=Disable)
61356 81s-2 Timedelay (0.08-9.98 *100)
61357 81r-2 Pickup Frequency
(60hz: 56-64 *100, 6401=Disable 50hz: 46-54 *100, 5401=Disable)
61358 81r-2 Timedelay (0-999)
61359 Sensitive Earth Model-SEF Torque Angle (0-355 /5)
61360 Sensitive Earth Model-SEF 50N-2 Pickup mA high byte(.005-.060 *2000)
61361 Sensitive Earth Model- Neutral Cold Load (1-254)(255= Disable)
61362 32P Select (0=Disable)
61363 32P Torque Angle (0-355/5)
61364 32N Select (0=Disable)
61365 32N Torque Angle (0-355/5)
61366 51P Time-Curve Adder (0.00 to 2.00 Seconds * 100)
61367 50P-1 Time-Curve Adder (0.00 to 2.00 Seconds * 100)
61368 46 Time-Curve Adder (0.00 to 2.00 Seconds * 100)
61369 51N Time-Curve Adder (0.00 to 2.00 Seconds * 100)
61370 50N-1 Time-Curve Adder (0.00 to 2.00 Seconds * 100)
61371 67P Time-Curve Adder (0.00 to 2.00 Seconds * 100)
61372 67N Time-Curve Adder (0.00 to 2.00 Seconds * 100)
61373 46 Minimum Response Time (0.00 – 2.00 Seconds, *100)
61374 67P Minimum response Time (0.00 – 2.00 Seconds, * 100)
61375 67N Minimum response Time (0.00 – 2.00 Seconds, * 100)
61376 50P-3 Time Delay (0.00 – 2.00 Seconds, *100)
61377 50N-3 Time Delay (0.00 – 2.00 Seconds, *100)
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Note 1: These settings should be “read only” from remote. They should be set only from the front
panel HMI interface.
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Note: Positive Watt Alarm 1 and Positive Watt Alarm 2 units are displayed in either KWhr or MWhr
according to bit 6 of Configuration Flag in the Configuration Settings Group. If bit is set to
one, use MWhr, if bit is zero, use KWhr.
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REGISTER DEFINTION
61792 Spare
61793 Execute Register for Real Time Clock (registers 61793- 61919)
(0=No Action, 1=Transfer Settings, 2=Refresh Registers)
61794 high byte Relay Password Character 1
low byte Relay Password Character 2
61795 high byte Relay Password Character 3
low byte Relay Password Character 4
61796 Spare (Writeable)
61797 Hours byte (0-23)
61798 Minutes byte (0-59)
61799 Seconds byte (0-59)
61800 Day byte (0-31)(0=Clock shutdown)
61801 Month byte (1-12)
61802 Year byte (0-99)
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REGISTER DEFINTION
61920 Spare
61921 Execute Register for ULO (registers 61921- 62047)
(0=No Action, 1=Transfer Settings, 2=Refresh Registers)
61922 high byte Relay Password Character 1
low byte Relay Password Character 2
61923 high byte Relay Password Character 3
low byte Relay Password Character 4
61924 Spare (Writeable)
61925 ULO9..15 = high byte (where ULO 9 = bit 0,... and 0 = connected)
ULO1..8 = low byte (where ULO 1 = bit 0,...etc. and 0 = connected)
61926-929 ULO1 Character String 8 bytes
61930-933 ULO2 Character String 8 bytes
61934-937 ULO3 Character String 8 bytes
61938-941 ULO4 Character String 8 bytes
61942-945 ULO5 Character String 8 bytes
61946-949 ULO6 Character String 8 bytes
61950-953 ULO7 Character String 8 bytes
61954-957 ULO8 Character String 8 bytes
61958-961 ULO9 Character String 8 bytes
Note: Connected implies that ULIn is linked logically to ULOn.
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REGISTER DEFINTION
62048 Spare
62049 Execute Register for ULI (registers 62049- 62175)
(0=No Action, 1=Transfer Settings, 2=Refresh Registers)
62050 high byte Relay Password Character 1
low byte Relay Password Character 2
62051 high byte Relay Password Character 3
low byte Relay Password Character 4
62052 Spare (Writeable)
62053-056 ULI1 Character String 8 bytes
62057-060 ULI2 Character String 8 bytes
62061-064 ULI3 Character String 8 bytes
62065-068 ULI4 Character String 8 bytes
62069-072 ULI5 Character String 8 bytes
62073-076 ULI6 Character String 8 bytes
62077-080 ULI7 Character String 8 bytes
62081-084 ULI8 Character String 8 bytes
62085-088 ULI9 Character String 8 bytes
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REGISTER DEFINTION
62176 Spare
62177 Execute Register for FLI (registers 62177- 62431)
(0=No Action, 1=Transfer Settings, 2=Refresh Registers)
62178 high byte Relay Password Character 1
low byte Relay Password Character 2
62179 high byte Relay Password Character 3
low byte Relay Password Character 4
62180 Spare (Writeable)
62181 FLI1 index byte
FLI2 index byte
62182 FLI3 index byte
FLI4 index byte
62183 FLI5 index byte
FLI6 index byte
62184 FLI7 index byte
FLI8 index byte
62185 FLI9 index byte
FLI10 index byte
62186 FLI11 index byte
FLI12 index byte
62187 FLI13 index byte
FLI14 index byte
62188 FLI15 index byte
FLI16 index byte
62189 FLI17 index byte
FLI18 index byte
62190 FLI19 index byte
FLI20 index byte
62191 FLI21 index byte
FLI22 index byte
62192 FLI23 index byte
FLI24 index byte
62193 FLI25 index byte
FLI26 index byte
62194 FLI27 index byte
FLI28 index byte
62195 FLI29 index byte
FLI30 index byte
62196 FLI31 index byte
FLI32 index byte
62197-200 FLI1 Character String 8 bytes
62201-204 FLI2 Character String 8 bytes
62205-208 FLI3 Character String 8 bytes
62209-212 FLI4 Character String 8 bytes
62213-216 FLI5 Character String 8 bytes
62217-220 FLI6 Character String 8 bytes
62221-224 FLI7 Character String 8 bytes
62225-228 FLI8 Character String 8 bytes
62229-232 FLI9 Character String 8 bytes
62233-236 FLI10 Character String 8 bytes
62237-240 FLI11 Character String 8 bytes
62241-244 FLI12 Character String 8 bytes
62245-248 FLI13 Character String 8 bytes
62249-252 FLI14 Character String 8 bytes
62253-256 FLI15 Character String 8 bytes
62257-260 FLI16 Character String 8 bytes
62261-264 FLI17 Character String 8 bytes
62265-268 FLI18 Character String 8 bytes
62269-272 FLI19 Character String 8 bytes
62273-276 FLI20 Character String 8 bytes
62277-280 FLI21 Character String 8 bytes
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REGISTER DEFINTION
62281-284 FLI22 Character String 8 bytes
62285-288 FLI23 Character String 8 bytes
62289-292 FLI24 Character String 8 bytes
62293-296 FLI25 Character String 8 bytes
62297-300 FLI26 Character String 8 bytes
62301-304 FLI27 Character String 8 bytes
62305-308 FLI28 Character String 8 bytes
62309-312 FLI29 Character String 8 bytes
62313-316 FLI30 Character String 8 bytes
62317-320 FLI31 Character String 8 bytes
62321-324 FLI32 Character String 8 bytes
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Note: See DNP 3.0 implementation guide for details on Rear Port parameters
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Note: If an invalid Baud value is specified a default value representing 9600 Baud will be used. Also,
if an valid Frame type is specified a default of N/8/1 for be used.
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REGISTER DEFINTION
62560 Spare
62561 Execute Register for Modbus Global Mapping (registers 62561- 62687)
(0=No Action, 1=Transfer Settings, 2=Refresh Registers)
62562 high byte Relay Password Character 1
low byte Relay Password Character 2
62563 high byte Relay Password Character 3
low byte Relay Password Character 4
62564 Spare (Writeable)
62565 Number of Global Registers to Transmit
62566 Modbus Global Register 1 Mapping
62567 Modbus Global Register 2 Mapping
62568 Modbus Global Register 3 Mapping
62569 Modbus Global Register 4 Mapping
62570 Modbus Global Register 5 Mapping
62571 Modbus Global Register 6 Mapping
62572 Modbus Global Register 7 Mapping
62573 Modbus Global Register 8 Mapping
62574 Modbus Global Register 9 Mapping
62575 Modbus Global Register 10 Mapping
62576 Modbus Global Register 11 Mapping
62577 Modbus Global Register 12 Mapping
62578 Modbus Global Register 13 Mapping
62579 Modbus Global Register 14 Mapping
62580 Modbus Global Register 15 Mapping
62581 Modbus Global Register 16 Mapping
62582 Modbus Global Register 17 Mapping
62583 Modbus Global Register 18 Mapping
62584 Modbus Global Register 19 Mapping
62585 Modbus Global Register 20 Mapping
62586 Modbus Global Register 21 Mapping
62587 Modbus Global Register 22 Mapping
62588 Modbus Global Register 23 Mapping
62589 Modbus Global Register 24 Mapping
62590 Modbus Global Register 25 Mapping
62591 Modbus Global Register 26 Mapping
62592 Modbus Global Register 27 Mapping
62593 Modbus Global Register 28 Mapping
62594 Modbus Global Register 29 Mapping
62595 Modbus Global Register 30 Mapping
62596 Modbus Global Register 31 Mapping
62597 Modbus Global Register 32 Mapping
62598 Security Mask for Writeable 4xxxx Control Block
(bit state: 0=Control Block Password Required,
1=Control Block Unprotected)
Bit 15: Spare Bit 7: Spare
Bit 14: Spare Bit 6: Spare
Bit 13: Spare Bit 5: Pulse Outputs
Bit 12: Spare Bit 4: Set Reset Outputs
Bit 11: Spare Bit 3: Force logical Input
Bit 10: Spare Bit 2: Force Physical Output
Bit 9: Spare Bit 1: Force Physical Input
Bit 8: Spare Bit 0: Initiate Input
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The following registers support modification and scaling of information contained in the Modbus user
register set. The information in the 4xxxx registers can be tailored to the users needs with the
following options:
Here is an example of how to set up the Modbus registers to exploit the above facilities. Consider a
situation where the destination system is a SCADA. Suppose the user’s SCADA system is setup to
read the System Frequency on register 40001and requires the data be in the 12 Most significant bits.
Also, let us suppose that the scale required on the system frequency is hex 0a (10 decimal) and the
SCADA stores the value in a bipolar data type. The user would adopt the following procedure to
setup register 40001 to meet the specifications of the destination system. Now write hex 0a (decimal
10) which is the scale we need into register 62693. Next write hex 0147 (327 decimal) on register
62694 which fetches the value from the register 40327(the source register for system frequency).
Setting the data size (12), the data type (bipolar) and shifting data (into Most significant bits) is done
as follows:
MSB/LSB (Justified to the left i.e. data in the Most Significant Bits)
Bit
3
1
So, write hex 039 (decimal 57) into register 62695 and the registers should look like:
register 62692 hex 0000
register 62693 hex 000a
register 62694 hex 0147
register 62695 hex 0039
Now when the command is executed, the data is transferred to the PCD and subsequent data
transmissions from register 40001 of the unit will be 12 bit wide with the bits justified to the left (in the
Most Significant Bits). The data type will be bipolar and compatible with the destination register type.
The value will be scaled by 10.
Note: See Register Section 40001-40032 for default Data type and size definitions
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REGISTER DEFINTION
62688 Spare
62689 Execute Register for User Definable Register (registers 62689- 62943)
(0=No Action, 1=Transfer Settings, 2=Refresh Registers)
62690 high byte Relay Password Character 1
low byte Relay Password Character 2
62691 high byte Relay Password Character 3
low byte Relay Password Character 4
62692 Spare (Writeable)
62693 User Register 40001 Scale
62694 User Register 40001 Source Register (4xxxx Series)
62695 User Register 40001 Destination Register Data Type (bits 2-0)
(0=Offset Bipolar, 1=Bipolar, 2=Unipolar, 3=Negative Unipolar)
User Register 40001 Destination Register Justification (bit 3)
(0=LSB, 1=MSB)
User Register 40001 Destination Register Data Size(bits 7-4)
(0=2 Bit, 1=4 Bit, 2=8 Bit, 3=12 Bit, 4=16 Bit)
62696 high byte User Register 40001 Source Register Scale Type
(0=Normal, 1=Remainder, 2=Phase Current, 3=Neutral Current,
4=Voltage, 5=Power)
low byte User Register 40001 Source Register Data Type
(0=Unsigned 16 Bit, 1=Unsigned 32 Bit, 2= Signed 16 Bit,
3=Signed 32 Bit)
62697 User Register 40002 Scale
62698 User Register 40002 Source Register (4xxxx Series)
62699 User Register 40002 Destination Register Data Type
User Register 40002 Destination Register Justification
User Register 40002 Destination Register Data Size
62700 high byte User Register 40002 Source Register Scale Type
low byte User Register 40002 Source Register Data Type
62701 User Register 40003 Scale
62702 User Register 40003 Source Register (4xxxx Series)
62703 User Register 40003 Destination Register Data Type
User Register 40003 Destination Register Justification
User Register 40003 Destination Register Data Size
62704 high byte User Register 40003 Source Register Scale Type
low byte User Register 40003 Source Register Data Type
62705 User Register 40004 Scale
62706 User Register 40004 Source Register (4xxxx Series)
62707 User Register 40004 Destination Register Data Type
User Register 40004 Destination Register Justification
User Register 40004 Destination Register Data Size
62708 high byte User Register 40004 Source Register Scale Type
low byte User Register 40004 Source Register Data Type
62709 User Register 40005 Scale
62710 User Register 40005 Source Register (4xxxx Series)
62711 User Register 40005 Destination Register Data Type
User Register 40005 Destination Register Justification
User Register 40005 Destination Register Data Size
62712 high byte User Register 40005 Source Register Scale Type
low byte User Register 40005 Source Register Data Type
62713 User Register 40006 Scale
62714 User Register 40006 Source Register (4xxxx Series)
62715 User Register 40006 Destination Register Data Type
User Register 40006 Destination Register Justification
User Register 40006 Destination Register Data Size
62716 high byte User Register 40006 Source Register Scale Type
low byte User Register 40006 Source Register Data Type
62717 User Register 40007 Scale
62718 User Register 40007 Source Register (4xxxx Series)
62719 User Register 40007 Destination Register Data Type
User Register 40007 Destination Register Justification
User Register 40007 Destination Register Data Size
62720 high byte User Register 40007 Source Register Scale Type
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REGISTER DEFINTION
low byte User Register 40007 Source Register Data Type
62721 User Register 40008 Scale
62722 User Register 40008 Source Register (4xxxx Series)
62723 User Register 40008 Destination Register Data Type
User Register 40008 Destination Register Justification
User Register 40008 Destination Register Data Size
62724 high byte User Register 40008 Source Register Scale Type
low byte User Register 40008 Source Register Data Type
62725 User Register 40009 Scale
62726 User Register 40009 Source Register (4xxxx Series)
62727 User Register 40009 Destination Register Data Type
User Register 40009 Destination Register Justification
User Register 40009 Destination Register Data Size
62728 high byte User Register 40009 Source Register Scale Type
low byte User Register 40009 Source Register Data Type
62729 User Register 40010 Scale
62730 User Register 40010 Source Register (4xxxx Series)
62731 User Register 40010 Destination Register Data Type
User Register 40010 Destination Register Justification
User Register 40010 Destination Register Data Size
62732 high byte User Register 40010 Source Register Scale Type
low byte User Register 40010 Source Register Data Type
62733 User Register 40011 Scale
62734 User Register 40011 Source Register (4xxxx Series)
62735 User Register 40011 Destination Register Data Type
User Register 40011 Destination Register Justification
User Register 40011 Destination Register Data Size
62736 high byte User Register 40011 Source Register Scale Type
low byte User Register 40011 Source Register Data Type
62737 User Register 40012 Scale
62738 User Register 40012 Source Register (4xxxx Series)
62739 User Register 40012 Destination Register Data Type
User Register 40012 Destination Register Justification
User Register 40012 Destination Register Data Size
62740 high byte User Register 40012 Source Register Scale Type
low byte User Register 40012 Source Register Data Type
62741 User Register 40013 Scale
62742 User Register 40013 Source Register (4xxxx Series)
62743 User Register 40013 Destination Register Data Type
User Register 40013 Destination Register Justification
User Register 40013 Destination Register Data Size
62744 high byte User Register 40013 Source Register Scale Type
low byte User Register 40013 Source Register Data Type
62745 User Register 40014 Scale
62746 User Register 40014 Source Register (4xxxx Series)
62747 User Register 40014 Destination Register Data Type
User Register 40014 Destination Register Justification
User Register 40014 Destination Register Data Size
62748 high byte User Register 40014 Source Register Scale Type
low byte User Register 40014 Source Register Data Type
62749 User Register 40015 Scale
62750 User Register 40015 Source Register (4xxxx Series)
62751 User Register 40015 Destination Register Data Type
User Register 40015 Destination Register Justification
User Register 40015 Destination Register Data Size
62752 high byte User Register 40015 Source Register Scale Type
low byte User Register 40015 Source Register Data Type
62753 User Register 40016 Scale
62754 User Register 40016 Source Register (4xxxx Series)
62756 high byte User Register 40016 Source Register Scale Type
low byte User Register 40016 Source Register Data Type
62757 User Register 40017 Scale
62758 User Register 40017 Source Register (4xxxx Series)
62759 User Register 40017 Destination Register Data Type
User Register 40017 Destination Register Justification
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REGISTER DEFINTION
User Register 40017 Destination Register Data Size
62760 high byte User Register 40017 Source Register Scale Type
low byte User Register 40017 Source Register Data Type
62761 User Register 40018 Scale
62762 User Register 40018 Source Register (4xxxx Series)
62763 User Register 40018 Destination Register Data Type
User Register 40018 Destination Register Justification
User Register 40018 Destination Register Data Size
62764 high byte User Register 40018 Source Register Scale Type
low byte User Register 40018 Source Register Data Type
62765 User Register 40019 Scale
62766 User Register 40019 Source Register (4xxxx Series)
62767 User Register 40019 Destination Register Data Type
User Register 40019 Destination Register Justification
User Register 40019 Destination Register Data Size
62768 high byte User Register 40019 Source Register Scale Type
low byte User Register 40019 Source Register Data Type
62769 User Register 40020 Scale
62770 User Register 40020 Source Register (4xxxx Series)
62771 User Register 40020 Destination Register Data Type
User Register 40020 Destination Register Justification
User Register 40020 Destination Register Data Size
62772 high byte User Register 40020 Source Register Scale Type
low byte User Register 40020 Source Register Data Type
62773 User Register 40021 Scale
62774 User Register 40021 Source Register (4xxxx Series)
62775 User Register 40021 Destination Register Data Type
User Register 40021 Destination Register Justification
User Register 40021 Destination Register Data Size
62776 high byte User Register 40021 Source Register Scale Type
low byte User Register 40021 Source Register Data Type
62777 User Register 40022 Scale
62778 User Register 40022 Source Register (4xxxx Series)
62779 User Register 40022 Destination Register Data Type
User Register 40022 Destination Register Justification
User Register 40022 Destination Register Data Size
62780 high byte User Register 40022 Source Register Scale Type
low byte User Register 40022 Source Register Data Type
62781 User Register 40023 Scale
62782 User Register 40023 Source Register (4xxxx Series)
62783 User Register 40023 Destination Register Data Type
User Register 40023 Destination Register Justification
User Register 40023 Destination Register Data Size
62784 high byte User Register 40023 Source Register Scale Type
low byte User Register 40023 Source Register Data Type
62785 User Register 40024 Scale
62786 User Register 40024 Source Register (4xxxx Series)
62787 User Register 40024 Destination Register Data Type
User Register 40024 Destination Register Justification
User Register 40024 Destination Register Data Size
62788 high byte User Register 40024 Source Register Scale Type
low byte User Register 40024 Source Register Data Type
62789 User Register 40025 Scale
62790 User Register 40025 Source Register (4xxxx Series)
62791 User Register 40025 Destination Register Data Type
User Register 40025 Destination Register Justification
User Register 40025 Destination Register Data Size
62792 high byte User Register 40025 Source Register Scale Type
low byte User Register 40025 Source Register Data Type
62793 User Register 40026 Scale
62794 User Register 40026 Source Register (4xxxx Series)
62795 User Register 40026 Destination Register Data Type
User Register 40026 Destination Register Justification
User Register 40026 Destination Register Data Size
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REGISTER DEFINTION
62796 high byte User Register 40026 Source Register Scale Type
low byte User Register 40026 Source Register Data Type
62797 User Register 40027 Scale
62798 User Register 40027 Source Register (4xxxx Series)
62799 User Register 40027 Destination Register Data Type
User Register 40027 Destination Register Justification
User Register 40027 Destination Register Data Size
62800 high byte User Register 40027 Source Register Scale Type
low byte User Register 40027 Source Register Data Type
62801 User Register 40028 Scale
62802 User Register 40028 Source Register (4xxxx Series)
62803 User Register 40028 Destination Register Data Type
User Register 40028 Destination Register Justification
User Register 40028 Destination Register Data Size
62804 high byte User Register 40028 Source Register Scale Type
low byte User Register 40028 Source Register Data Type
62805 User Register 40029 Scale
62806 User Register 40029 Source Register (4xxxx Series)
62807 User Register 40029 Destination Register Data Type
User Register 40029 Destination Register Justification
User Register 40029 Destination Register Data Size
62808 high byte User Register 40029 Source Register Scale Type
low byte User Register 40029 Source Register Data Type
62809 User Register 40030 Scale
62810 User Register 40030 Source Register (4xxxx Series)
62811 User Register 40030 Destination Register Data Type
User Register 40030 Destination Register Justification
User Register 40030 Destination Register Data Size
62812 high byte User Register 40030 Source Register Scale Type
low byte User Register 40030 Source Register Data Type
62813 User Register 40031 Scale
62814 User Register 40031 Source Register (4xxxx Series)
62815 User Register 40031 Destination Register Data Type
User Register 40031 Destination Register Justification
User Register 40031 Destination Register Data Size
62816 high byte User Register 40031 Source Register Scale Type
low byte User Register 40031 Source Register Data Type
62817 User Register 40032 Scale
62818 User Register 40032 Source Register (4xxxx Series)
62819 User Register 40032 Destination Register Data Type
User Register 40032 Destination Register Justification
User Register 40032 Destination Register Data Size
62820 high byte User Register 40032 Source Register Scale Type
low byte User Register 40032 Source Register Data Type
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ADDRESS DEFINTION
62944 Spare
62945 Execute Register for Miscellaneous Settings (registers 62945- 63021)
(0=No Action, 1=Transfer Settings, 2=Refresh Registers)
62946 high byte Relay Password Character 1
low byte Relay Password Character 2
62947 high byte Relay Password Character 3
low byte Relay Password Character 4
62948 Spare (Writeable)
62949 Security Mask for Writeable 4xxxx Control Block
(Duplicate of 62598 since PCD does not have access to other rgister)
(bit state: 0=Control Block Password Required,
1=Control Block Unprotected)
Bit 15: Spare Bit 7: Spare
Bit 14: Spare Bit 6: Spare
Bit 13: Spare Bit 5: Pulse Outputs
Bit 12: Spare Bit 4: Set Reset Outputs
Bit 11: Spare Bit 3: Force logical Input
Bit 10: Spare Bit 2: Force Physical Output
Bit 9: Spare Bit 1: Force Physical Input
Bit 8: Spare Bit 0: Initiate Input
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REGISTER DEFINTION
63200 Spare
63201 Execute Register for Oscillographics Settings (registers 63200 - 63327)
(0=No Action, 1=Transfer Settings, 2=Refresh Registers)
63202 high byte Relay Password Character 1
low byte Relay Password Character 2
63203 high byte Relay Password Character 3
low byte Relay Password Character 4
63204 Spare (Writeable)
63205 Record Size = 0: 1 Record
1: 2 Records
2: 4 Records
3: 8 Records
63206 Mode
Bit 0 : Single-shot mode (0=off,1=on)
Bit 1 : Appended record mode (0=off, 1=on)
63207 Trigger Position
63208 Analog Quantity Select Mask
63209 Trigger Source (High Word)
63210 Trigger Source .
63211 Trigger Source .
Bit 0 : Trip Issued Signal (PCD)
Bit 1 : Breaker Open (PCD)
Bit 2 : External (WCI) (PCD / SCD)
Bit 3 : 32P (PCD / SCD)
Bit 4 : 32N (PCD / SCD)
Bit 5 : PFLT (SCD)
Bit 6 : NFLT (SCD)
Bit 7 : SFLT (SCD)
Bit 8 : PQ Sag (PCD / SCD)
Bit 9 : PQ Swell (PCD / SCD)
Bit 10: PQ Interruptions (PCD / SCD)
Bit 11: PQ Undervoltage (PCD / SCD)
Bit 12 : PQ Overvoltage (PCD / SCD)
Bit 13: PQ TDD (PCD / SCD)
Bit 14 : PQ THD (PCD / SCD)
Bit 15 : Spare
63212 Trigger Source (Low Word)
Bit 0 : 50N-1 (PCD)
Bit 1 : 50N-2 (PCD)
Bit 2 : 50N-3 (PCD)
Bit 3 : 51N (PCD)
Bit 4 : 50P-1 (PCD)
Bit 5 : 50P-2 (PCD)
Bit 6 : 50P-3 (PCD)
Bit 7 : 51P (PCD)
Bit 8 : 67P (PCD)
Bit 9 : 67N (PCD)
Bit 10 : 46 (PCD / SCD)
Bit 11 : 27 (PCD / SCD)
Bit 12 : 59 (PCD / SCD)
Bit 13 : 79 (PCD)
Bit 14 : 81S (PCD / SCD)
Bit 15 : 81R (PCD / SCD)
63213 Spare
Note: Analog Quantity Select Mask is currently not supported. Also, the two trigger word
registers 63209 through 63210 are currently not supported.
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REGISTER DEFINTION
63328 Spare
63329 Execute Register for Programmable Curve Parameters (registers 63328 -
63967)
(0=No Action, 1=Transfer Settings, 2=Refresh Registers)
63330 high byte Relay Password Character 1
low byte Relay Password Character 2
63331 high byte Relay Password Character 3
low byte Relay Password Character 4
63332 Spare (Writeable)
63333 Coefficient A (High Word)
63334 Coefficient A (Low Word)
63335 Coefficient B (High Word)
63336 Coefficient B (Low Word)
63337 Coefficient C (High Word)
63338 Coefficient C (Low Word)
63339 Coefficient P (High Word)
63340 Coefficient P (Low Word)
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Note: Support of multiple programmable curves is supported through the Extended Memory File
number as follows:
REGISTER DEFINTION
63456 Segment 0: Endrange
63457 Segment 0: Alpha (High Word)
63458 Segment 0: Alpha (Low Word)
63459 Segment 0: Beta (High Word)
63460 Segment 0: Beta (Low Word)
63461 – 63465 Segment 1:
63466 – 63470 Segment 2:
63471 – 63475 Segment 3
63476 – 63480 Segment 4:
63481 – 63485 Segment 5
63486 – 63490 Segment 6:
63491 – 63495 Segment 7:
63496 – 63500 Segment 8:
63501 – 63505 Segment 9:
63506 – 63510 Segment 10:
63511 – 63515 Segment 11
63516 – 63520 Segment 12:
63521 – 63525 Segment 13
63526 – 63530 Segment 14:
63531 - 63535 Segment 15
63536 - 63540 Segment 16:
63541 - 63545 Segment 17:
63546 - 63550 Segment 18:
63551 - 63555 Segment 19:
63556 - 63560 Segment 20:
63561 - 63565 Segment 21:
63566 - 63570 Segment 22:
63571 - 63575 Segment 23:
63576 - 63580 Segment 24:
63581 - 63585 Segment 25:
63586 - 63590 Segment 26:
63591 - 63595 Segment 27:
63596 - 63600 Segment 28:
63601 - 63605 Segment 29:
63606 - 63610 Segment 30:
63611 - 63615 Segment 31:
63616 - 63620 Segment 32:
63621 - 63625 Segment 33:
63626 - 63630 Segment 34:
63631 - 63635 Segment 35:
63636 - 63640 Segment 36:
63641 - 63645 Segment 37:
63646 - 63650 Segment 38:
63651 - 63655 Segment 39:
63656 - 63660 Segment 40:
63661 - 63665 Segment 41:
63666 - 63670 Segment 42:
63671 - 63675 Segment 43:
63676 - 63680 Segment 44:
63681 - 63685 Segment 45:
63686 - 63690 Segment 46:
63691 - 63695 Segment 47:
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REGISTER DEFINTION
63696 - 63700 Segment 48:
63701 - 63705 Segment 49:
63706 - 63710 Segment 50:
63711 - 63715 Segment 51:
63716 - 63720 Segment 52:
63721 - 63725 Segment 53:
63726 - 63730 Segment 54:
63731 - 63735 Segment 55:
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REGISTER DEFINTION
63840 high byte Pointer Offset 0
low byte Pointer Offset 1
63841 high byte Pointer Offset 2
low byte Pointer Offset 3
63842 high byte Pointer Offset 4
low byte Pointer Offset 5
63843 high byte Pointer Offset 6
low byte Pointer Offset 7
63844 high byte Pointer Offset 8
low byte Pointer Offset 9
63845 high byte Pointer Offset 10
low byte Pointer Offset 11
63846 high byte Pointer Offset 12
low byte Pointer Offset 13
63847 high byte Pointer Offset 14
low byte Pointer Offset 15
63848 high byte Pointer Offset 16
low byte Pointer Offset 17
63849 high byte Pointer Offset 18
low byte Pointer Offset 19
63850 high byte Pointer Offset 20
low byte Pointer Offset 21
63851 high byte Pointer Offset 22
low byte Pointer Offset 23
63852 high byte Pointer Offset 24
low byte Pointer Offset 25
63853 high byte Pointer Offset 26
low byte Pointer Offset 27
63854 high byte Pointer Offset 28
low byte Pointer Offset 29
63855 high byte Pointer Offset 30
low byte Pointer Offset 31
63856 high byte Pointer Offset 32
low byte Pointer Offset 33
63857 high byte Pointer Offset 34
low byte Pointer Offset 35
63858 high byte Pointer Offset 36
low byte Pointer Offset 37
63859 high byte Pointer Offset 38
low byte Pointer Offset 39
63860 high byte Pointer Offset 40
low byte Pointer Offset 41
63861 high byte Pointer Offset 42
low byte Pointer Offset 43
63862 high byte Pointer Offset 44
low byte Pointer Offset 45
63863 high byte Pointer Offset 46
low byte Pointer Offset 47
63864 high byte Pointer Offset 48
low byte Pointer Offset 49
63865 high byte Pointer Offset 50
low byte Pointer Offset 51
63866 high byte Pointer Offset 52
low byte Pointer Offset 53
63867 high byte Pointer Offset 54
low byte Pointer Offset 55
150
PCD MODBUS® Protocol Implementation Details
ABB Inc.
REGISTER DEFINTION
63868 high byte Pointer Offset 56
low byte Pointer Offset 57
63869 high byte Pointer Offset 58
low byte Pointer Offset 59
151
PCD MODBUS® Protocol Implementation Details
ABB Inc.
Note: This register set is not supported for PCD2000 revision V2.00 and higher or any SCD
products.
REGISTER DEFINTION
63968 Spare
63969 Execute Register for Oscillographics Settings (registers 63968 - 64095)
(0=No Action, 1=Transfer Settings, 2=Refresh Registers)
63970 high byte Relay Password Character 1
low byte Relay Password Character 2
63971 high byte Relay Password Character 3
low byte Relay Password Character 4
63972 Spare (Writeable)
63973 Enable/Disable (1=ON/0=OFF)
63974 BFT Pickup Time Delay
63975 BFT Drop Time Delay
63976 BFT Starters:
Bit 0: External Input
Bit 1: Phase Level Detector
Bit 2: Neutral Level Detector
63977 ReTrip Pickup Time Delay
63978 ReTrip Drop Time Delay
63979 ReTrip Starters:
Bit 0: External Input
Bit 1: Phase Level Detector
Bit 2: Neutral Level Detector
63980 Phase Level Detector Pickup (5 to 100% of 51P) .
63981 Neutral Level Detector Pickup (5 to 100% of 51N)
152
PCD MODBUS® Protocol Implementation Details
ABB Inc.
Note: This register set is not supported for PCD2000 revision V2.00 and higher or any SCD
products.
REGISTER DEFINTION
64096 Spare
64097 Execute Register for Oscillographics Settings (registers 64096 - 64223)
(0=No Action, 1=Transfer Settings, 2=Refresh Registers)
64098 high byte Relay Password Character 1
low byte Relay Password Character 2
64099 high byte Relay Password Character 3
low byte Relay Password Character 4
64100 Spare (Writeable)
64101 Assignment (High Word): Spares
64102 Assignment (Low Word):
Bit 0: 50N-1
Bit 1: 50N-2
Bit 2: 50N-3
Bit 3: 51N
Bit 4: 50P-1
Bit 5: 50P-2
Bit 6: 50P-3
Bit 7: 51P
Bit 8: 67P
Bit 9: 67N
Bit 10: 46
Bit 11: Spare
Bit 12: Spare
Bit 13: Spare
Bit 14: Spare
Bit 15: Spare
153
PCD MODBUS® Protocol Implementation Details
ABB Inc.
REGISTER DEFINTION
64224 Spare
64225 Execute Register for Oscillographics Settings (registers 64224
- 64352)
(0=No Action, 1=Transfer Settings, 2=Refresh Registers)
64226 high byte Relay Password Character 1
low byte Relay Password Character 2
64227 high byte Relay Password Character 3
low byte Relay Password Character 4
64228 Spare (Writeable)
64229 Record Attribute 1
64230 Record Attribute 2
64231 Record Attribute 3
64232 Record Attribute 4
64233 Record Attribute 5
64234 Record Attribute 6
64235 Record Attribute 7
64236 Record Attribute 8
64237 Record Attribute 9
154
PCD MODBUS® Protocol Implementation Details
ABB Inc.
REGISTER DEFINTION
64352 Spare
64353 Execute Register for Oscillographics Settings (registers 64352 – 64479)
(0=No Action, 1=Transfer Settings, 2=Refresh Registers)
64354 high byte Relay Password Character 1
low byte Relay Password Character 2
64355 high byte Relay Password Character 3
low byte Relay Password Character 4
64356 Spare (Writeable)
64357 Units Enabled
Bit 0: Swell Unit
Bit 1: Sag Unit
Bit 2: Interruption Unit
Bit 3: Overvoltage Unit
Bit 4: Undervoltage Unit
Bit 5: Current TDD Unit
Bit 6: Voltage THD Unit
64358 Swell, Instantaneous, Voltage Threshhold (1.0 to 1.5 PU, 0.01 PU Steps,
x100)
64359 Swell, Instantaneous, Time Maximum ( 2 to 120 Quarter cycles, qtr. cycle
steps)
64360 Swell, Momentary, Voltage Threshhold (1.0 to 1.5 PU, 0.01 PU Steps,
x100)
64361 Swell, Momentary, Time Maximum ( 30 to 180 Cycles, one Cycle steps)
64362 Swell, Temporary, Voltage Threshhold (1.0 to 1.5 PU, 0.01 PU Steps,
x100)
64363 Swell, Temporary, Time Maximum ( 3 to 60 Seconds, one Second steps)
64364 Sag, Instantaneous, Voltage Threshhold (0.1 to 1.0 PU, 0.01 PU Steps,
x100)
64365 Sag, Instantaneous, Time Maximum ( 2 to 120 Quarter cycles, qtr. cycle
steps)
64366 Sag, Momentary, Voltage Threshhold (0.1 to 1.0 PU, 0.01 PU Steps,
x100)
64367 Sag, Momentary, Time Maximum ( 30 to 180 Cycles, one Cycle steps)
64368 Sag, Temporary, Voltage Threshhold (0.1 to 1.0 PU, 0.01 PU Steps,
x100)
64369 Sag, Temporary, Time Maximum ( 3 to 60 Seconds, one Second steps)
64370 Interruption, Voltage Threshhold (0.0 to 0.1 PU, 0.01 PU Steps, x100)
64371 Interruption, Momentary Time Maximum (2 to 720 Qtr Cycles, qtr cycle
steps)
64372 Interruption, Temporary Time Maximum (3 to 60 Seconds, one second
steps)
64373 Interruption, Sustained Time Maximum (60 to 180 Seconds, one second
steps)
64374 Overvoltage, Voltage Threshold (1.0 to 1.5 PU, 0.01 PU Steps, x100)
64375 Overvoltage, Time Maximum (1 to 60 Minutes, 1 minute steps)
64376 Undervoltage, Voltage Threshold (0.1 to 1.0 PU, 0.01 PU Steps, x100)
64377 Undervoltage, Time Maximum (1 to 60 Minutes, 1 minute steps)
64378 Current TDD, Threshold (1 to 50 Percent, 1 Percent Steps)
64379 Current TDD, Initial Peak Current (1 to 1600 Amps, 1 Amp Steps)
64380 Current TDD, Peak Update Mode (0=Off, 1=On)
64381 Voltage THD, Threshold (1 to 50 Percent, 1 Percent Steps)
64382 Window:
Bit 0: Type (0=Sliding, 1=Profile)
Bit 1,2: Demand Interval (0=5, 1=15, 2=30, 3=60 Minutes)
64383 RMS Recording Mode (0=Single Quantity, 1=Dual Quantity)
155
PCD MODBUS® Protocol Implementation Details
ABB Inc.
Undervoltage
TDD TDD TDD, Ix
THD THD THD, Vx
156
PCD MODBUS® Protocol Implementation Details
ABB Inc.
6.1.28 Protection Settings (PCD2000 Revision V2.00 and above, also SCD where applicable)
Note: (Modbus query file numbers. Primary = 1, Alt1 = 2, Alt2 = 3, Bank2 Primary = 5, Bank2 alt1 = 6,
Bank2 Alt2 = 7)
REG DEFINTION DISPLAY DATA STEP DISABLE DATA PROD.
1 2 3
RANGE RANGE SIZE DATA SCALE
64480 Spare ALL
64481 Execute Register (registers 64481- 64863) 0, 1, 2 0, 1, 2 x1 ALL
(0=No Action, 1=Transfer Settings, 2=Refresh
Registers)
64482 (High Byte) Relay Password Character 1 ALL
(Low Byte) Relay Password Character 2
64483 (High Byte) Relay Password Character 3 ALL
(Low Byte) Relay Password Character 4
64484 Spare (Writeable) ALL
64485 High Configuration Word (read only) Ref. Table 6.1.8.5 ALL
64486 Low Configuration Word (read only) ALL
64487 51P Curve Select (ANSI Type I / IEC Type I / Ref. Tables 6.1.8.1, 6.1.8.2, & 6.1.8.3.1 PCD
Recloser Type V)
64488 51P Pickup Amps (Ref. Tap Setting Tables) Ref. Table 6.1.8.4 PCD
64489 51P (ANSI): Time Dial 0.50 - 10.0 10 - 200 1 x 0.05 PCD
51P (IEC): Time Multiplier 0.05 - 1.00 10 - 200 10 x 0.005 PCD
51P (Recloser): Time Multiplier 0.10 - 2.00 10 - 200 1 x 0.01 PCD
51P (Def. Time): Time Delay (Seconds) 0.0 - 10.0 0 - 200 2 x 0.05 PCD
64490 51P Minimum Response (Seconds) 0.00 - 2.00 0 - 200 1 x 0.01 PCD
64491 51P Time-Curve Adder (Seconds) 0.00 - 2.00 0 - 200 1 x 0.01 PCD
64492 50P-1 Curve Select (ANSI Type III) Ref. Table 6.1.8.1 PCD
50P-1 Curve Select (IEC Type III) Ref. Table 6.1.8.2 PCD
50P-1 Curve Select (Recloser Type VI) Ref. Table 6.1.8.3.2 PCD
64493 50P-1 Pickup Multiplier 0.5 - 20.0 5 - 200 1 x 0.1 PCD
64494 50P-1 (ANSI): Time Dial 1.0 - 10.0 10 - 200 1 x 0.05 PCD
50P-1 (IEC): Time Multiplier 0.05 - 1.00 10 - 200 10 x 0.005 PCD
50P-1 (Recloser): Time Multiplier 0.10 - 2.00 10 - 200 1 x 0.01 PCD
50P-1 (Def. Time): Time Delay (Seconds) 0.0 - 9.99 0 - 999 1 x 0.01 PCD
64495 50P-1 Minimum Response (Seconds) 0.00 - 2.00 0 - 200 1 x 0.01 PCD
64496 50P-1 Time-Curve Adder (Seconds) 0.00 - 2.00 0 - 200 1 x 0.01 PCD
64497 50P-1 Curve Block Pickup (x 51P Pickup) 1.0 - 20.0 10 - 200 1 201 x 0.1 PCD
64498 50P-2 Select (0=Disable, 1=Enable) 0-1 0-1 1 0 x1 PCD
64499 50P-2 Pickup Multiplier (Seconds) 0.5 - 20.0 5 - 200 1 x 0.1 PCD
64500 50P-2 Time Delay (Seconds) 0.00 - 9.99 0 - 999 1 x 0.01 PCD
64501 50P-2 Curve Block Pickup (x 51P Pickup) 1.0 - 20.0 10 - 200 1 201 x 0.1 PCD
64502 50P-3 Select (0=Disable, 1=Enable) 0, 1 0, 1 1 0 x1 PCD
64503 50P-3 Pickup Multiplier 0.5 - 20.0 5 - 200 1 x 0.1 PCD
64504 50P-3 Time Delay (Seconds) 0.00 - 9.99 0 - 999 1 x 0.01 PCD
64505 46 Curve Select (ANSI Type II) Ref. Table 6.1.8.1 ALL
46 Curve Select (IEC Type II) Ref. Table 6.1.8.2 ALL
46 Curve Select (Recloser Type VI) Ref. Table 6.1.8.3.2 ALL
64506 46 Pickup Amps Ref. Table 6.1.8.4 ALL
64507 46 (ANSI): Time Dial 0.50 - 10.0 10 - 200 1 x 0.05 ALL
46 (IEC): Time Multiplier 0.05 - 1.00 10 - 200 10 x 0.005 ALL
46 (Recloser): Time Multiplier 0.10 - 2.00 10 - 200 1 x 0.10 ALL
46 (Def. Time): Time Delay (Seconds) 0.0 - 10.0 0 - 200 2 x 0.05 ALL
64508 46 Minimum Response Time (Seconds) 0.00 - 2.00 0 - 200 1 x 0.01 ALL
64509 46 Time-Curve Adder (Seconds) 0.00 - 2.00 0 - 200 1 x 0.01 ALL
64510 51N Curve Select (ANSI Type II) Ref. Table 6.1.8.1 PCD
51N Curve Select (IEC Type II) Ref. Table 6.1.8.2 PCD
51N Curve Select (Recloser Type VI) Ref. Table 6.1.8.3.2 PCD
64511 51N Pickup Amps Ref. Table 6.1.8.4 PCD
64512 51N (ANSI): Time Dial 0.50 - 10.0 10 - 200 1 x 0.05 PCD
51N (IEC): Time Multiplier 0.05 - 1.00 10 - 200 10 x 0.005 PCD
51N (Recloser): Time Multiplier 0.10 - 2.00 10 - 200 1 x 0.01 PCD
51N (Def. Time): Time Delay (Seconds) 0.0 - 10.0 0 - 200 2 x 0.05 PCD
64513 51N Minimum Response (Seconds) 0.00 - 2.00 0 - 200 1 x 0.01 PCD
64514 51N Time-Curve Adder (Seconds) 0.00 - 2.00 0 - 200 1 x 0.01 PCD
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PCD MODBUS® Protocol Implementation Details
ABB Inc.
158
PCD MODBUS® Protocol Implementation Details
ABB Inc.
1
Notes: Display Range is the range of parameter values as displayed by all MMI processes.
2
Data Range is the numeric value passed over the Modbus protocol.
3
Step Size is the incremental value by which values may change within the Data Range.
159
PCD MODBUS® Protocol Implementation Details
ABB Inc.
Note: This is essentially a continuation of the Protection settings point list (see 6.1.29 above).
The execution and password registers used for this block are the same as used for
Protection settings (64481 through 64483).
REGISTER DEFINITION
64608 Single Phase Tripping Mode
0 = Single Phase Tripping Disabled
1 = Only Picked Up Phases
2 = One Or All Phases
64609 Reserved
64610 79 Reset Time: 3 - 200 Seconds, *1
64611 79-1 Mode Select (see table below for bit definitions)
Bits 0 – 3: 51P Bits 8 - 11: 50P-2
Bits 4 – 7: 50P-1 Bits 12 - 15: 50P-3
64612 79-1 Mode Select (see table below for bit definitions)
Bits 0 – 3: 51N Bits 8 - 11: 50N-2
Bits 4 – 7: 50N-1 Bits 12 - 15: 50N-3
64613 79-1 Mode Select (see table below for bit definitions)
Bits 0 – 3: 46 Bits 8 - 11: 67N
Bits 4 – 7: 67P Bits 12 - 15: Spare
64614 79-1 Mode Select (see table below for bit definitions)
Bits 0 – 3: Spare Bits 8 - 11: Spare
Bits 4 – 7: Spare Bits 12 - 15: Spare
64615 79-1 Mode Select (see table below for bit definitions)
Bits 0 – 3: Spare Bits 8 - 11: Spare
Bits 4 – 7: Spare Bits 12 - 15: Spare
64616 79-1 Open Interval Time
STD: 0.1 – 200.0 Seconds, *10, 2001 = Lockout
SEF: 0.1 – 1800.0 Seconds, *10, 18001 = Lockout
64617 79-2 Mode Select (see table below for bit definitions)
Bits 0 – 3: 51P Bits 8 - 11: 50P-2
Bits 4 – 7: 50P-1 Bits 12 - 15: 50P-3
64618 79-2 Mode Select (see table below for bit definitions)
Bits 0 – 3: 51N Bits 8 - 11: 50N-2
Bits 4 – 7: 50N-1 Bits 12 - 15: 50N-3
64619 79-2 Mode Select (see table below for bit definitions)
Bits 0 – 3: 46 Bits 8 - 11: 67N
Bits 4 – 7: 67P Bits 12 - 15: Spare
64620 79-2 Mode Select (see table below for bit definitions)
Bits 0 – 3: Spare Bits 8 - 11: Spare
Bits 4 – 7: Spare Bits 12 - 15: Spare
64621 79-2 Mode Select (see table below for bit definitions)
Bits 0 – 3: Spare Bits 8 - 11: Spare
Bits 4 – 7: Spare Bits 12 - 15: Spare
64622 79-2 Open Interval Time
STD: 0.1 – 200.0 Seconds, *10, 2001 = Lockout
SEF: 0.1 – 1800.0 Seconds, *10, 18001 = Lockout
64623 79-3 Mode Select (see table below for bit definitions)
Bits 0 – 3: 51P Bits 8 - 11: 50P-2
Bits 4 – 7: 50P-1 Bits 12 - 15: 50P-3
64624 79-3 Mode Select (see table below for bit definitions)
Bits 0 – 3: 51N Bits 8 - 11: 50N-2
Bits 4 – 7: 50N-1 Bits 12 - 15: 50N-3
64625 79-3 Mode Select (see table below for bit definitions)
Bits 0 – 3: 46 Bits 8 - 11: 67N
Bits 4 – 7: 67P Bits 12 - 15: Spare
64626 79-3 Mode Select (see table below for bit definitions)
Bits 0 – 3: Spare Bits 8 - 11: Spare
Bits 4 – 7: Spare Bits 12 - 15: Spare
64627 79-3 Mode Select (see table below for bit definitions)
Bits 0 – 3: Spare Bits 8 - 11: Spare
Bits 4 – 7: Spare Bits 12 - 15: Spare
64628 79-3 Open Interval Time
STD: 0.1 – 200.0 Seconds, *10, 2001 = Lockout
160
PCD MODBUS® Protocol Implementation Details
ABB Inc.
REGISTER DEFINITION
SEF: 0.1 – 1800.0 Seconds, *10, 18001 = Lockout
64629 79-4 Mode Select (see table below for bit definitions)
Bits 0 – 3: 51P Bits 8 - 11: 50P-2
Bits 4 – 7: 50P-1 Bits 12 - 15: 50P-3
64630 79-4 Mode Select (see table below for bit definitions)
Bits 0 – 3: 51N Bits 8 - 11: 50N-2
Bits 4 – 7: 50N-1 Bits 12 - 15: 50N-3
64631 79-4 Mode Select (see table below for bit definitions)
Bits 0 – 3: 46 Bits 8 - 11: 67N
Bits 4 – 7: 67P Bits 12 - 15: Spare
64632 79-4 Mode Select (see table below for bit definitions)
Bits 0 – 3: Spare Bits 8 - 11: Spare
Bits 4 – 7: Spare Bits 12 - 15: Spare
64633 79-4 Mode Select (see table below for bit definitions)
Bits 0 – 3: Spare Bits 8 - 11: Spare
Bits 4 – 7: Spare Bits 12 - 15: Spare
64634 79-4 Open Interval Time
STD: 0.1 – 200.0 Seconds, *10, 2001 = Lockout
SEF: 0.1 – 1800.0 Seconds, *10, 18001 = Lockout
64635 79-5 Mode Select (see table below for bit definitions)
Bits 0 – 3: 51P Bits 8 - 11: 50P-2
Bits 4 – 7: 50P-1 Bits 12 - 15: 50P-3
64636 79-5 Mode Select (see table below for bit definitions)
Bits 0 – 3: 51N Bits 8 - 11: 50N-2
Bits 4 – 7: 50N-1 Bits 12 - 15: 50N-3
64637 79-5 Mode Select (see table below for bit definitions)
Bits 0 – 3: 46 Bits 8 - 11: 67N
Bits 4 – 7: 67P Bits 12 - 15: Spare
64638 79-5 Mode Select (see table below for bit definitions)
Bits 0 – 3: Spare Bits 8 - 11: Spare
Bits 4 – 7: Spare Bits 12 - 15: Spare
64639 79-5 Mode Select (see table below for bit definitions)
Bits 0 – 3: Spare Bits 8 - 11: Spare
Bits 4 – 7: Spare Bits 12 - 15: Spare
64640 79-5 Open Interval Time (Always Lockout)
64641 79 Cutout Time (1 – 201, 201=DisaBle)
64642 79V Select (0=Disable, 1=Enable)
64643 79V Pickup (10-200 Secondary Volts)
64644 79V Time Delay (4 – 200 Seconds)
64645 79C Enable (0 = Disable, 1 = Enable)
64646 79C Reset Timer (3 – 200 seconds. 201 = Disable)
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PCD MODBUS® Protocol Implementation Details
ABB Inc.
Note: This is essentially a continuation of the Protection settings point list (see 6.1.28 above).
The execution and password registers used for this block are the same as used for
Protection settings (64481 through 64483).
162
PCD MODBUS® Protocol Implementation Details
ABB Inc.
Notes:
1. The number of line / load voltage transformers must conform to the following table
VT LINE/LOAD → 1/0 1/1 1/2 1/3 2/0 2/1 2/2 2/3 3/0 3/1 3/2 3/3
MODE ↓
Sectionalizer x x x x x x x X X x
Mid-point x x x x x x x X X x
Tie-point x x
163
PCD MODBUS® Protocol Implementation Details
ABB Inc.
6.1.32 DNP Binary Inputs Assignable Class Settings (PCD Rev. 2.40 and above)
The DNP Assignable Classes feature allows the user to make class assignments to the binary input
points. By default, all binary input points are assigned CLASS 1. If a class 1 event poll is performed all
binary input points that have changed state since the last event poll will be reported. The class
assignment for a given binary input point can be changed to CLASS 2, 3 or NO CLASS by setting the
appropriate value in the associated modbus register.
For example, to change the class assignment of DNP binary input point 6 to CLASS 2, modify register
64998 to set bits 7-4 to 0010(binary).
Refer to the "DNP 3.0 Implementation for the ABB PCD" document for a description of the DNP points
listed below.
REGISTER DEFINITION
64992 Spare
64993 Execute
64994 High byte Password character 1
Low byte Password character 2
64995 High byte Password character 3
Low byte Password character 4
64996 Spare
64997 DNP binary assigned class register 0 (see table below for bit definitions)
Bits 15 - 12: DNP binary input point 0 Bits 11 - 8: DNP binary input point 1
Bits 7 - 4: DNP binary input point 2 Bits 3 - 0: DNP binary input point 3
64998 DNP binary assigned class register 1 (see table below for bit definitions)
Bits 15 - 12: DNP binary input point 4 Bits 11 - 8: DNP binary input point 5
Bits 7 - 4: DNP binary input point 6 Bits 3 - 0: DNP binary input point 7
64999 DNP binary assigned class register 2 (see table below for bit definitions)
Bits 15 - 12: DNP binary input point 8 Bits 11 - 8: DNP binary input point 9
Bits 7 - 4: DNP binary input point 10 Bits 3 - 0: DNP binary input point 11
65000 DNP binary assigned class register 3 (see table below for bit definitions)
Bits 15 - 12: DNP binary input point 12 Bits 11 - 8: DNP binary input point 13
Bits 7 - 4: DNP binary input point 14 Bits 3 - 0: DNP binary input point 15
65001 DNP binary assigned class register 4 (see table below for bit definitions)
Bits 15 - 12: DNP binary input point 16 Bits 11 - 8: DNP binary input point 17
Bits 7 - 4: DNP binary input point 18 Bits 3 - 0: DNP binary input point 19
65002 DNP binary assigned class register 5 (see table below for bit definitions)
Bits 15 - 12: DNP binary input point 20 Bits 11 - 8: DNP binary input point 21
Bits 7 - 4: DNP binary input point 22 Bits 3 - 0: DNP binary input point 23
65003 DNP binary assigned class register 6 (see table below for bit definitions)
Bits 15 - 12: DNP binary input point 24 Bits 11 - 8: DNP binary input point 25
Bits 7 - 4: DNP binary input point 26 Bits 3 - 0: DNP binary input point 27
65004 DNP binary assigned class register 7 (see table below for bit definitions)
Bits 15 - 12: DNP binary input point 28 Bits 11 - 8: DNP binary input point 29
Bits 7 - 4: DNP binary input point 30 Bits 3 - 0: DNP binary input point 31
65005 DNP binary assigned class register 8 (see table below for bit definitions)
Bits 15 - 12: DNP binary input point 32 Bits 11 - 8: DNP binary input point 33
Bits 7 - 4: DNP binary input point 34 Bits 3 - 0: DNP binary input point 35
65006 DNP binary assigned class register 9 (see table below for bit definitions)
Bits 15 - 12: DNP binary input point 36 Bits 11 - 8: DNP binary input point 37
Bits 7 - 4: DNP binary input point 38 Bits 3 - 0: DNP binary input point 39
65007 DNP binary assigned class register 10 (see table below for bit definitions)
Bits 15 - 12: DNP binary input point 40 Bits 11 - 8: DNP binary input point 41
Bits 7 - 4: DNP binary input point 42 Bits 3 - 0: DNP binary input point 43
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PCD MODBUS® Protocol Implementation Details
ABB Inc.
REGISTER DEFINITION
65008 DNP binary assigned class register 11 (see table below for bit definitions)
Bits 15 - 12: DNP binary input point 44 Bits 11 - 8: DNP binary input point 45
Bits 7 - 4: DNP binary input point 46 Bits 3 - 0: DNP binary input point 47
65009 DNP binary assigned class register 12 (see table below for bit definitions)
Bits 15 - 12: DNP binary input point 48 Bits 11 - 8: DNP binary input point 49
Bits 7 - 4: DNP binary input point 50 Bits 3 - 0: DNP binary input point 51
65010 DNP binary assigned class register 13 (see table below for bit definitions)
Bits 15 - 12: DNP binary input point 52 Bits 11 - 8: DNP binary input point 53
Bits 7 - 4: DNP binary input point 54 Bits 3 - 0: DNP binary input point 55
65011 DNP binary assigned class register 14 (see table below for bit definitions)
Bits 15 - 12: DNP binary input point 56 Bits 11 - 8: DNP binary input point 57
Bits 7 - 4: DNP binary input point 58 Bits 3 - 0: DNP binary input point 59
65012 DNP binary assigned class register 15 (see table below for bit definitions)
Bits 15 - 12: DNP binary input point 60 Bits 11 - 8: DNP binary input point 61
Bits 7 - 4: DNP binary input point 62 Bits 3 - 0: DNP binary input point 63
65013 DNP binary assigned class register 16 (see table below for bit definitions)
Bits 15 - 12: DNP binary input point 64 Bits 11 - 8: DNP binary input point 65
Bits 7 - 4: DNP binary input point 66 Bits 3 - 0: DNP binary input point 67
65014 DNP binary assigned class register 17 (see table below for bit definitions)
Bits 15 - 12: DNP binary input point 68 Bits 11 - 8: DNP binary input point 69
Bits 7 - 4: DNP binary input point 70 Bits 3 - 0: DNP binary input point 71
65015 DNP binary assigned class register 18 (see table below for bit definitions)
Bits 15 - 12: DNP binary input point 72 Bits 11 - 8: DNP binary input point 73
Bits 7 - 4: DNP binary input point 74 Bits 3 - 0: DNP binary input point 75
65016 DNP binary assigned class register 19 (see table below for bit definitions)
Bits 15 - 12: DNP binary input point 76 Bits 11 - 8: DNP binary input point 77
Bits 7 - 4: DNP binary input point 78 Bits 3 - 0: DNP binary input point 79
65017 DNP binary assigned class register 20 (see table below for bit definitions)
Bits 15 - 12: DNP binary input point 80 Bits 11 - 8: DNP binary input point 81
Bits 7 - 4: DNP binary input point 82 Bits 3 - 0: DNP binary input point 83
65018 DNP binary assigned class register 21 (see table below for bit definitions)
Bits 15 - 12: DNP binary input point 84 Bits 11 - 8: DNP binary input point 85
Bits 7 - 4: DNP binary input point 86 Bits 3 - 0: DNP binary input point 87
65019 DNP binary assigned class register 22 (see table below for bit definitions)
Bits 15 - 12: DNP binary input point 88 Bits 11 - 8: DNP binary input point 89
Bits 7 - 4: DNP binary input point 90 Bits 3 - 0: DNP binary input point 91
65020 DNP binary assigned class register 23 (see table below for bit definitions)
Bits 15 - 12: DNP binary input point 92 Bits 11 - 8: DNP binary input point 93
Bits 7 - 4: DNP binary input point 94 Bits 3 - 0: DNP binary input point 95
65021 DNP binary assigned class register 24 (see table below for bit definitions)
Bits 15 - 12: DNP binary input point 96 Bits 11 - 8: DNP binary input point 97
Bits 7 - 4: DNP binary input point 98 Bits 3 - 0: DNP binary input point 99
65022 DNP binary assigned class register 25 (see table below for bit definitions)
Bits 15 - 12: DNP binary input point 100 Bits 11 - 8: DNP binary input point 101
Bits 7 - 4: DNP binary input point 102 Bits 3 - 0: DNP binary input point 103
65023 DNP binary assigned class register26 (see table below for bit definitions)
Bits 15 - 12: DNP binary input point 104 Bits 11 - 8: DNP binary input point 105
Bits 7 - 4: DNP binary input point 106 Bits 3 - 0: DNP binary input point 107
65024 DNP binary assigned class register27 (see table below for bit definitions)
Bits 15 - 12: DNP binary input point 108 Bits 11 - 8: DNP binary input point 109
Bits 7 - 4: DNP binary input point 110 Bits 3 - 0: DNP binary input point 111
65025 DNP binary assigned class register 28 (see table below for bit definitions)
Bits 15 - 12: DNP binary input point 112 Bits 11 - 8: DNP binary input point 113
Bits 7 - 4: DNP binary input point 114 Bits 3 - 0: DNP binary input point 115
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REGISTER DEFINITION
65026 DNP binary assigned class register 29 (see table below for bit definitions)
Bits 15 - 12: DNP binary input point 116 Bits 11 - 8: DNP binary input point 117
Bits 7 - 4: DNP binary input point 118 Bits 3 - 0: DNP binary input point 119
65027 DNP binary assigned class register 30 (see table below for bit definitions)
Bits 15 - 12: DNP binary input point 120 Bits 11 - 8: DNP binary input point 121
Bits 7 - 4: DNP binary input point 122 Bits 3 - 0: DNP binary input point 123
65028 DNP binary assigned class register 31 (see table below for bit definitions)
Bits 15 - 12: DNP binary input point 124 Bits 11 - 8: DNP binary input point 125
Bits 7 - 4: DNP binary input point 126 Bits 3 - 0: DNP binary input point 127
65029 DNP binary assigned class register 32 (see table below for bit definitions)
Bits 15 - 12: DNP binary input point 128 Bits 11 - 8: DNP binary input point 129
Bits 7 - 4: DNP binary input point 130 Bits 3 - 0: DNP binary input point 131
65030 DNP binary assigned class register 33 (see table below for bit definitions)
Bits 15 - 12: DNP binary input point 132 Bits 11 - 8: DNP binary input point 133
Bits 7 - 4: DNP binary input point 134 Bits 3 - 0: DNP binary input point 135
65031 DNP binary assigned class register 34 (see table below for bit definitions)
Bits 15 - 12: DNP binary input point 136 Bits 11 - 8: DNP binary input point 137
Bits 7 - 4: DNP binary input point 138 Bits 3 - 0: DNP binary input point 139
65032 DNP binary assigned class register 35 (see table below for bit definitions)
Bits 15 - 12: DNP binary input point 140 Bits 11 - 8: DNP binary input point 141
Bits 7 - 4: DNP binary input point 142 Bits 3 - 0: DNP binary input point 143
65033 DNP binary assigned class register 36 (see table below for bit definitions)
Bits 15 - 12: DNP binary input point 144 Bits 11 - 8: DNP binary input point 145
Bits 7 - 4: DNP binary input point 146 Bits 3 - 0: DNP binary input point 147
65034 DNP binary assigned class register 37 (see table below for bit definitions)
Bits 15 - 12: DNP binary input point 148 Bits 11 - 8: DNP binary input point 149
Bits 7 - 4: DNP binary input point 150 Bits 3 - 0: DNP binary input point 151
65035 DNP binary assigned class register 38 (see table below for bit definitions)
Bits 15 - 12: DNP binary input point 152 Bits 11 - 8: DNP binary input point 153
Bits 7 - 4: DNP binary input point 154 Bits 3 - 0: DNP binary input point 155
65036 DNP binary assigned class register 39 (see table below for bit definitions)
Bits 15 - 12: DNP binary input point 156 Bits 11 - 8: DNP binary input point 157
Bits 7 - 4: DNP binary input point 158 Bits 3 - 0: DNP binary input point 159
65037 DNP binary assigned class register 40 (see table below for bit definitions)
Bits 15 - 12: DNP binary input point 160 Bits 11 - 8: DNP binary input point 161
Bits 7 - 4: DNP binary input point 162 Bits 3 - 0: DNP binary input point 163
65038 DNP binary assigned class register 41 (see table below for bit definitions)
Bits 15 - 12: DNP binary input point 164 Bits 11 - 8: DNP binary input point 165
Bits 7 - 4: DNP binary input point 166 Bits 3 - 0: DNP binary input point 167
65039 DNP binary assigned class register 42 (see table below for bit definitions)
Bits 15 - 12: DNP binary input point 168 Bits 11 - 8: DNP binary input point 169
Bits 7 - 4: DNP binary input point 170 Bits 3 - 0: DNP binary input point 171
65040 DNP binary assigned class register 43 (see table below for bit definitions)
Bits 15 - 12: DNP binary input point 172 Bits 11 - 8: DNP binary input point 173
Bits 7 - 4: DNP binary input point 174 Bits 3 - 0: DNP binary input point 175
65041 DNP binary assigned class register 44 (see table below for bit definitions)
Bits 15 - 12: DNP binary input point 176 Bits 11 - 8: DNP binary input point 177
Bits 7 - 4: DNP binary input point 178 Bits 3 - 0: DNP binary input point 179
65042 DNP binary assigned class register 45 (see table below for bit definitions)
Bits 15 - 12: DNP binary input point 180 Bits 11 - 8: DNP binary input point 181
Bits 7 - 4: DNP binary input point 182 Bits 3 - 0: DNP binary input point 183
65043 DNP binary assigned class register 46(see table below for bit definitions)
Bits 15 - 12: DNP binary input point 184 Bits 11 - 8: DNP binary input point 185
Bits 7 - 4: DNP binary input point 186 Bits 3 - 0: DNP binary input point 187
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REGISTER DEFINITION
65044 DNP binary assigned class register 47 (see table below for bit definitions)
Bits 15 - 12: DNP binary input point 188 Bits 11 - 8: DNP binary input point 189
Bits 7 - 4: DNP binary input point 190 Bits 3 - 0: DNP binary input point 191
65045 DNP binary assigned class register 48 (see table below for bit definitions)
Bits 15 - 12: DNP binary input point 192 Bits 11 - 8: DNP binary input point 193
Bits 7 - 4: DNP binary input point 194 Bits 3 - 0: DNP binary input point 195
65046 DNP binary assigned class register 49 (see table below for bit definitions)
Bits 15 - 12: DNP binary input point 196 Bits 11 - 8: DNP binary input point 197
Bits 7 - 4: DNP binary input point 198 Bits 3 - 0: DNP binary input point 199
65047 DNP binary assigned class register 50 (see table below for bit definitions)
Bits 15 - 12: DNP binary input point 200 Bits 11 - 8: DNP binary input point 201
Bits 7 - 4: DNP binary input point 202 Bits 3 - 0: DNP binary input point 203
65048 DNP binary assigned class register 51 (see table below for bit definitions)
Bits 15 - 12: DNP binary input point 204 Bits 11 - 8: DNP binary input point 205
Bits 7 - 4: DNP binary input point 206 Bits 3 - 0: DNP binary input point 207
65049 DNP binary assigned class register 52 (see table below for bit definitions)
Bits 15 - 12: DNP binary input point 208 Bits 11 - 8: DNP binary input point 209
Bits 7 - 4: DNP binary input point 210 Bits 3 - 0: DNP binary input point 211
65050 DNP binary assigned class register 53 (see table below for bit definitions)
Bits 15 - 12: DNP binary input point 212 Bits 11 - 8: Spare
Bits 7 - 4: Spare Bits 3 - 0: spare
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6.1.33 DNP Analog Inputs Assignable Class Settings (PCD Rev. 2.40 and above)
The DNP Assignable Classes feature allows the user to make class assignments to the analog input
points. By default, all analog input points are assigned CLASS 2. If a class 2 event poll is performed all
analog input points that have changed beyond the programmed threshold since the last event poll will
be reported. The class assignment for a given analog input point can be changed to CLASS 1, 3 or NO
CLASS by setting the appropriate value in the associated modbus register.
For example, to change the class assignment of DNP analog input point 6 to CLASS 1, modify register
65126 to set bits 7-4 to 0001(binary).
Refer to the "DNP 3.0 Implementation for the ABB PCD" document for a description of the DNP points
listed below.
REGISTER DEFINITION
65120 Spare
65121 Execute
65122 Password character 1
Password character 2
65123 Password character 3
Password character 4
65124 Spare
65125 DNP analog assigned class register 0 (see table below for bit definitions)
Bits 15 - 12: DNP analog input point 0 Bits 11 - 8: DNP analog input point 1
Bits 7 - 4: DNP analog input point 2 Bits 3 - 0: DNP analog input point 3
65126 DNP analog assigned class register 1 (see table below for bit definitions)
Bits 15 - 12: DNP analog input point 4 Bits 11 - 8: DNP analog input point 5
Bits 7 - 4: DNP analog input point 6 Bits 3 - 0: DNP analog input point 7
65127 DNP analog assigned class register 2 (see table below for bit definitions)
Bits 15 - 12: DNP analog input point 8 Bits 11 - 8: DNP analog input point 9
Bits 7 - 4: DNP analog input point 10 Bits 3 - 0: DNP analog input point 11
65128 DNP analog assigned class register 3 (see table below for bit definitions)
Bits 15 - 12: DNP analog input point 12 Bits 11 - 8: DNP analog input point 13
Bits 7 - 4: DNP analog input point 14 Bits 3 - 0: DNP analog input point 15
65129 DNP analog assigned class register 4 (see table below for bit definitions)
Bits 15 - 12: DNP analog input point 16 Bits 11 - 8: DNP analog input point 17
Bits 7 - 4: DNP analog input point 18 Bits 3 - 0: DNP analog input point 19
65130 DNP analog assigned class register 5 (see table below for bit definitions)
Bits 15 - 12: DNP analog input point 20 Bits 11 - 8: DNP analog input point 21
Bits 7 - 4: DNP analog input point 22 Bits 3 - 0: DNP analog input point 23
65131 DNP analog assigned class register 6 (see table below for bit definitions)
Bits 15 - 12: DNP analog input point 24 Bits 11 - 8: DNP analog input point 25
Bits 7 - 4: DNP analog input point 26 Bits 3 - 0: DNP analog input point 27
65132 DNP analog assigned class register 7 (see table below for bit definitions)
Bits 15 - 12: DNP analog input point 28 Bits 11 - 8: DNP analog input point 29
Bits 7 - 4: DNP analog input point 30 Bits 3 - 0: DNP analog input point 31
65133 DNP analog assigned class register 8 (see table below for bit definitions)
Bits 15 - 12: DNP analog input point 32 Bits 11 - 8: DNP analog input point 33
Bits 7 - 4: DNP analog input point 34 Bits 3 - 0: DNP analog input point 35
65134 DNP analog assigned class register 9 (see table below for bit definitions)
Bits 15 - 12: DNP analog input point 36 Bits 11 - 8: DNP analog input point 37
Bits 7 - 4: DNP analog input point 38 Bits 3 - 0: DNP analog input point 39
65135 DNP analog assigned class register 10 (see table below for bit definitions)
Bits 15 - 12: DNP analog input point 40 Bits 11 - 8: DNP analog input point 41
Bits 7 - 4: DNP analog input point 42 Bits 3 - 0: DNP analog input point 43
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REGISTER DEFINITION
65136 DNP analog assigned class register 11 (see table below for bit definitions)
Bits 15 - 12: DNP analog input point 44 Bits 11 - 8: DNP analog input point 45
Bits 7 - 4: DNP analog input point 46 Bits 3 - 0: DNP analog input point 47
65137 DNP analog assigned class register 12 (see table below for bit definitions)
Bits 15 - 12: DNP analog input point 48 Bits 11 - 8: DNP analog input point 49
Bits 7 - 4: DNP analog input point 50 Bits 3 - 0: DNP analog input point 51
65138 DNP analog assigned class register 13 (see table below for bit definitions)
Bits 15 - 12: DNP analog input point 52 Bits 11 - 8: DNP analog input point 53
Bits 7 - 4: DNP analog input point 54 Bits 3 - 0: DNP analog input point 55
65139 DNP analog assigned class register 14 (see table below for bit definitions)
Bits 15 - 12: DNP analog input point 56 Bits 11 - 8: DNP analog input point 57
Bits 7 - 4: DNP analog input point 58 Bits 3 - 0: DNP analog input point 59
65140 DNP analog assigned class register 15 (see table below for bit definitions)
Bits 15 - 12: DNP analog input point 60 Bits 11 - 8: DNP analog input point 61
Bits 7 - 4: DNP analog input point 62 Bits 3 - 0: DNP analog input point 63
65141 DNP analog assigned class register 16 (see table below for bit definitions)
Bits 15 - 12: DNP analog input point 64 Bits 11 - 8: DNP analog input point 65
Bits 7 - 4: DNP analog input point 66 Bits 3 - 0: DNP analog input point 67
65142 DNP analog assigned class register 17 (see table below for bit definitions)
Bits 15 - 12: DNP analog input point 68 Bits 11 - 8: DNP analog input point 69
Bits 7 - 4: DNP analog input point 70 Bits 3 - 0: DNP analog input point 71
65143 DNP analog assigned class register 18 (see table below for bit definitions)
Bits 15 - 12: DNP analog input point 72 Bits 11 - 8: DNP analog input point 73
Bits 7 - 4: DNP analog input point 74 Bits 3 - 0: DNP analog input point 75
65144 DNP analog assigned class register 19 (see table below for bit definitions)
Bits 15 - 12: DNP analog input point 76 Bits 11 - 8: DNP analog input point 77
Bits 7 - 4: DNP analog input point 78 Bits 3 - 0: DNP analog input point 79
65145 DNP analog assigned class register 20 (see table below for bit definitions)
Bits 15 - 12: DNP analog input point 80 Bits 11 - 8: DNP analog input point 81
Bits 7 - 4: DNP analog input point 82 Bits 3 - 0: DNP analog input point 83
65146 DNP analog assigned class register 21 (see table below for bit definitions)
Bits 15 - 12: DNP analog input point 84 Bits 11 - 8: DNP analog input point 85
Bits 7 - 4: DNP analog input point 86 Bits 3 - 0: DNP analog input point 87
65147 DNP analog assigned class register 22 (see table below for bit definitions)
Bits 15 - 12: DNP analog input point 88 Bits 11 - 8: DNP analog input point 89
Bits 7 - 4: DNP analog input point 90 Bits 3 - 0: DNP analog input point 91
65148 DNP analog assigned class register 23 (see table below for bit definitions)
Bits 15 - 12: DNP analog input point 92 Bits 11 - 8: DNP analog input point 93
Bits 7 - 4: DNP analog input point 94 Bits 3 - 0: DNP analog input point 95
65149 DNP analog assigned class register 24 (see table below for bit definitions)
Bits 15 - 12: DNP analog input point 96 Bits 11 - 8: DNP analog input point 97
Bits 7 - 4: DNP analog input point 98 Bits 3 - 0: DNP analog input point 99
65150 DNP analog assigned class register 25 (see table below for bit definitions)
Bits 15 - 12: DNP analog input point 100 Bits 11 - 8: DNP analog input point 101
Bits 7 - 4: DNP analog input point 102 Bits 3 - 0: DNP analog input point 103
65151 DNP analog assigned class register 26 (see table below for bit definitions)
Bits 15 - 12: DNP analog input point 104 Bits 11 - 8: DNP analog input point 105
Bits 7 - 4: DNP analog input point 106 Bits 3 - 0: DNP analog input point 107
65152 DNP analog assigned class register 27 (see table below for bit definitions)
Bits 15 - 12: DNP analog input point 108 Bits 11 - 8: DNP analog input point 109
Bits 7 - 4: DNP analog input point 110 Bits 3 - 0: DNP analog input point 111
65153 DNP analog assigned class register 28 (see table below for bit definitions)
Bits 15 - 12: DNP analog input point 112 Bits 11 - 8: DNP analog input point 113
Bits 7 - 4: DNP analog input point 114 Bits 3 - 0: DNP analog input point 115
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REGISTER DEFINITION
65154 DNP analog assigned class register 29 (see table below for bit definitions)
Bits 15 - 12: DNP analog input point 116 Bits 11 - 8: DNP analog input point 117
Bits 7 - 4: DNP analog input point 118 Bits 3 - 0: DNP analog input point 119
65155 DNP analog assigned class register 30 (see table below for bit definitions)
Bits 15 - 12: DNP analog input point 120 Bits 11 - 8: DNP analog input point 121
Bits 7 - 4: DNP analog input point 122 Bits 3 - 0: DNP analog input point 123
65156 DNP analog assigned class register 31 (see table below for bit definitions)
Bits 15 - 12: DNP analog input point 124 Bits 11 - 8: DNP analog input point 125
Bits 7 - 4: DNP analog input point 126 Bits 3 - 0: DNP analog input point 127
65157 DNP analog assigned class register 32 (see table below for bit definitions)
Bits 15 - 12: DNP analog input point 128 Bits 11 - 8: DNP analog input point 129
Bits 7 - 4: DNP analog input point 130 Bits 3 - 0: DNP analog input point 131
65158 DNP analog assigned class register 33 (see table below for bit definitions)
Bits 15 - 12: DNP analog input point 132 Bits 11 - 8: DNP analog input point 133
Bits 7 - 4: DNP analog input point 134 Bits 3 - 0: DNP analog input point 135
65159 DNP analog assigned class register 34 (see table below for bit definitions)
Bits 15 - 12: DNP analog input point 136 Bits 11 - 8: DNP analog input point 137
Bits 7 - 4: DNP analog input point 138 Bits 3 - 0: DNP analog input point 139
65160 DNP analog assigned class register 35 (see table below for bit definitions)
Bits 15 - 12: DNP analog input point 140 Bits 11 - 8: DNP analog input point 141
Bits 7 - 4: DNP analog input point 142 Bits 3 - 0: DNP analog input point 143
65161 DNP analog assigned class register 36 (see table below for bit definitions)
Bits 15 - 12: DNP analog input point 144 Bits 11 - 8: DNP analog input point 145
Bits 7 - 4: DNP analog input point 146 Bits 3 - 0: spare
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The DNP Assignable Point indexes feature allows the user to reassign the point indexes of binary input
points. By default, the point indexes are as shown in the "DNP3.0 Implementation for the ABB PCD"
document. To change the point index of a given binary input point the appropriate modbus register has
to be modified to the desired value. NOTE: The assigned point index may not exceed the maximum
number of binary input points.
For example, to change the point index of DNP binary input point 6 to 10, modify register 65256 to set
bits 15-8 to 0001010(binary).
Refer to the "DNP 3.0 Implementation for the ABB PCD" document for a description of the DNP points
listed below.
REGISTER DEFINITION
65248 Spare
65249 Execute
65250 Password character 1
Password character 2
65251 Password character 3
Password character 4
65252 Spare
65253 DNP binary assigned point index register 0
Bits 15 - 8: DNP binary input point 0
Bits 7 - 0: DNP binary input point 1
65254 DNP binary assigned point index register 1
Bits 15 - 8: DNP binary input point 2
Bits 7 - 0: DNP binary input point 3
65255 DNP binary assigned point index register 2
Bits 15 - 8: DNP binary input point 4
Bits 7 - 0: DNP binary input point 5
65256 DNP binary assigned point index register 3
Bits 15 - 8: DNP binary input point 6
Bits 7 - 0: DNP binary input point 7
65257 DNP binary assigned point index register 4
Bits 15 - 8: DNP binary input point 8
Bits 7 - 0: DNP binary input point 9
65258 DNP binary assigned point index register 5
Bits 15 - 8: DNP binary input point 10
Bits 7 - 0: DNP binary input point 11
65259 DNP binary assigned point index register 6
Bits 15 - 8: DNP binary input point 12
Bits 7 - 0: DNP binary input point 13
65260 DNP binary assigned point index register 7
Bits 15 - 8: DNP binary input point 14
Bits 7 - 0: DNP binary input point 15
65261 DNP binary assigned point index register 8
Bits 15 - 8: DNP binary input point 16
Bits 7 - 0: DNP binary input point 17
65262 DNP binary assigned point index register 9
Bits 15 - 8: DNP binary input point 18
Bits 7 - 0: DNP binary input point 19
65263 DNP binary assigned point index register 10
Bits 15 - 8: DNP binary input point 20
Bits 7 - 0: DNP binary input point 21
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REGISTER DEFINITION
65264 DNP binary assigned point index register 11
Bits 15 - 8: DNP binary input point 22
Bits 7 - 0: DNP binary input point 23
65265 DNP binary assigned point index register 12
Bits 15 - 8: DNP binary input point 24
Bits 7 - 0: DNP binary input point 25
65266 DNP binary assigned point index register 13
Bits 15 - 8: DNP binary input point 26
Bits 7 - 0: DNP binary input point 27
65267 DNP binary assigned point index register 14
Bits 15 - 8: DNP binary input point 28
Bits 7 - 0: DNP binary input point 29
65268 DNP binary assigned point index register 15
Bits 15 - 8: DNP binary input point 30
Bits 7 - 0: DNP binary input point 31
65269 DNP binary assigned point index register 16
Bits 15 - 8: DNP binary input point 32
Bits 7 - 0: DNP binary input point 33
65270 DNP binary assigned point index register 17
Bits 15 - 8: DNP binary input point 34
Bits 7 - 0: DNP binary input point 35
65271 DNP binary assigned point index register 18
Bits 15 - 8: DNP binary input point 36
Bits 7 - 0: DNP binary input point 37
65272 DNP binary assigned point index register 19
Bits 15 - 8: DNP binary input point 38
Bits 7 - 0: DNP binary input point 39
65273 DNP binary assigned point index register 20
Bits 15 - 8: DNP binary input point 40
Bits 7 - 0: DNP binary input point 41
65274 DNP binary assigned point index register 21
Bits 15 - 8: DNP binary input point 42
Bits 7 - 0: DNP binary input point 43
65275 DNP binary assigned point index register 22
Bits 15 - 8: DNP binary input point 44
Bits 7 - 0: DNP binary input point 45
65276 DNP binary assigned point index register 23
Bits 15 - 8: DNP binary input point 46
Bits 7 - 0: DNP binary input point 47
65277 DNP binary assigned point index register 24
Bits 15 - 8: DNP binary input point 48
Bits 7 - 0: DNP binary input point 49
65278 DNP binary assigned point index register 25
Bits 15 - 8: DNP binary input point 50
Bits 7 - 0: DNP binary input point 51
65279 DNP binary assigned point index register 26
Bits 15 - 8: DNP binary input point 52
Bits 7 - 0: DNP binary input point 53
65280 DNP binary assigned point index register 27
Bits 15 - 8: DNP binary input point 54
Bits 7 - 0: DNP binary input point 55
65281 DNP binary assigned point index register 28
Bits 15 - 8: DNP binary input point 56
Bits 7 - 0: DNP binary input point 57
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ABB Inc.
REGISTER DEFINITION
65282 DNP binary assigned point index register 29
Bits 15 - 8: DNP binary input point 58
Bits 7 - 0: DNP binary input point 59
65283 DNP binary assigned point index register 30
Bits 15 - 8: DNP binary input point 60
Bits 7 - 0: DNP binary input point 61
65284 DNP binary assigned point index register 31
Bits 15 - 8: DNP binary input point 62
Bits 7 - 0: DNP binary input point 63
65285 DNP binary assigned point index register 32
Bits 15 - 8: DNP binary input point 64
Bits 7 - 0: DNP binary input point 65
65286 DNP binary assigned point index register 33
Bits 15 - 8: DNP binary input point 66
Bits 7 - 0: DNP binary input point 67
65287 DNP binary assigned point index register 34
Bits 15 - 8: DNP binary input point 68
Bits 7 - 0: DNP binary input point 69
65288 DNP binary assigned point index register 35
Bits 15 - 8: DNP binary input point 70
Bits 7 - 0: DNP binary input point 71
65289 DNP binary assigned point index register 36
Bits 15 - 8: DNP binary input point 72
Bits 7 - 0: DNP binary input point 73
65290 DNP binary assigned point index register 37
Bits 15 - 8: DNP binary input point 74
Bits 7 - 0: DNP binary input point 75
65291 DNP binary assigned point index register 38
Bits 15 - 8: DNP binary input point 76
Bits 7 - 0: DNP binary input point 77
65292 DNP binary assigned point index register 39
Bits 15 - 8: DNP binary input point 78
Bits 7 - 0: DNP binary input point 79
65293 DNP binary assigned point index register 40
Bits 15 - 8: DNP binary input point 80
Bits 7 - 0: DNP binary input point 81
65294 DNP binary assigned point index register 41
Bits 15 - 8: DNP binary input point 82
Bits 7 - 0: DNP binary input point 83
65295 DNP binary assigned point index register 42
Bits 15 - 8: DNP binary input point 84
Bits 7 - 0: DNP binary input point 85
65296 DNP binary assigned point index register 43
Bits 15 - 8: DNP binary input point 86
Bits 7 - 0: DNP binary input point 87
65297 DNP binary assigned point index register 44
Bits 15 - 8: DNP binary input point 88
Bits 7 - 0: DNP binary input point 89
65298 DNP binary assigned point index register 45
Bits 15 - 8: DNP binary input point 90
Bits 7 - 0: DNP binary input point 91
65299 DNP binary assigned point index register 46
Bits 15 - 8: DNP binary input point 92
Bits 7 - 0: DNP binary input point 93
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REGISTER DEFINITION
65300 DNP binary assigned point index register 47
Bits 15 - 8: DNP binary input point 94
Bits 7 - 0: DNP binary input point 95
65301 DNP binary assigned point index register 48
Bits 15 - 8: DNP binary input point 96
Bits 7 - 0: DNP binary input point 97
65302 DNP binary assigned point index register 49
Bits 15 - 8: DNP binary input point 98
Bits 7 - 0: DNP binary input point 99
65303 DNP binary assigned point index register 50
Bits 15 - 8: DNP binary input point 100
Bits 7 - 0: DNP binary input point 101
65304 DNP binary assigned point index register 51
Bits 15 - 8: DNP binary input point 102
Bits 7 - 0: DNP binary input point 103
65305 DNP binary assigned point index register 52
Bits 15 - 8: DNP binary input point 104
Bits 7 - 0: DNP binary input point 105
65306 DNP binary assigned point index register 53
Bits 15 - 8: DNP binary input point 106
Bits 7 - 0: DNP binary input point 107
65307 DNP binary assigned point index register 54
Bits 15 - 8: DNP binary input point 108
Bits 7 - 0: DNP binary input point 109
65308 DNP binary assigned point index register 55
Bits 15 - 8: DNP binary input point 110
Bits 7 - 0: DNP binary input point 111
65309 DNP binary assigned point index register 56
Bits 15 - 8: DNP binary input point 112
Bits 7 - 0: DNP binary input point 113
65310 DNP binary assigned point index register 57
Bits 15 - 8: DNP binary input point 114
Bits 7 - 0: DNP binary input point 115
65311 DNP binary assigned point index register 58
Bits 15 - 8: DNP binary input point 116
Bits 7 - 0: DNP binary input point 117
65312 DNP binary assigned point index register 59
Bits 15 - 8: DNP binary input point 118
Bits 7 - 0: DNP binary input point 119
65313 DNP binary assigned point index register 60
Bits 15 - 8: DNP binary input point 120
Bits 7 - 0: DNP binary input point 121
65314 DNP binary assigned point index register 61
Bits 15 - 8: DNP binary input point 122
Bits 7 - 0: DNP binary input point 123
65315 DNP binary assigned point index register 62
Bits 15 - 8: DNP binary input point 124
Bits 7 - 0: DNP binary input point 125
65316 DNP binary assigned point index register 63
Bits 15 - 8: DNP binary input point 126
Bits 7 - 0: DNP binary input point 127
65317 DNP binary assigned point index register 64
Bits 15 - 8: DNP binary input point 128
Bits 7 - 0: DNP binary input point 129
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REGISTER DEFINITION
65318 DNP binary assigned point index register 65
Bits 15 - 8: DNP binary input point 130
Bits 7 - 0: DNP binary input point 131
65319 DNP binary assigned point index register 66
Bits 15 - 8: DNP binary input point 132
Bits 7 - 0: DNP binary input point 133
65320 DNP binary assigned point index register 67
Bits 15 - 8: DNP binary input point 134
Bits 7 - 0: DNP binary input point 135
65321 DNP binary assigned point index register 68
Bits 15 - 8: DNP binary input point 136
Bits 7 - 0: DNP binary input point 137
65322 DNP binary assigned point index register 69
Bits 15 - 8: DNP binary input point 138
Bits 7 - 0: DNP binary input point 139
65323 DNP binary assigned point index register 70
Bits 15 - 8: DNP binary input point 140
Bits 7 - 0: DNP binary input point 141
65324 DNP binary assigned point index register 71
Bits 15 - 8: DNP binary input point 142
Bits 7 - 0: DNP binary input point 143
65325 DNP binary assigned point index register 72
Bits 15 - 8: DNP binary input point 144
Bits 7 - 0: DNP binary input point 145
65326 DNP binary assigned point index register 73
Bits 15 - 8: DNP binary input point 146
Bits 7 - 0: DNP binary input point 147
65327 DNP binary assigned point index register 74
Bits 15 - 8: DNP binary input point 148
Bits 7 - 0: DNP binary input point 149
65328 DNP binary assigned point index register 75
Bits 15 - 8: DNP binary input point 150
Bits 7 - 0: DNP binary input point 151
65329 DNP binary assigned point index register 76
Bits 15 - 8: DNP binary input point 152
Bits 7 - 0: DNP binary input point 153
65330 DNP binary assigned point index register 77
Bits 15 - 8: DNP binary input point 154
Bits 7 - 0: DNP binary input point 155
65331 DNP binary assigned point index register 78
Bits 15 - 8: DNP binary input point 156
Bits 7 - 0: DNP binary input point 157
65332 DNP binary assigned point index register 79
Bits 15 - 8: DNP binary input point 158
Bits 7 - 0: DNP binary input point 159
65333 DNP binary assigned point index register 80
Bits 15 - 8: DNP binary input point 160
Bits 7 - 0: DNP binary input point 161
65334 DNP binary assigned point index register 81
Bits 15 - 8: DNP binary input point 162
Bits 7 - 0: DNP binary input point 163
65335 DNP binary assigned point index register 82
Bits 15 - 8: DNP binary input point 164
Bits 7 - 0: DNP binary input point 165
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PCD MODBUS® Protocol Implementation Details
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REGISTER DEFINITION
65336 DNP binary assigned point index register 83
Bits 15 - 8: DNP binary input point 166
Bits 7 - 0: DNP binary input point 167
65337 DNP binary assigned point index register 84
Bits 15 - 8: DNP binary input point 168
Bits 7 - 0: DNP binary input point 169
65338 DNP binary assigned point index register 85
Bits 15 - 8: DNP binary input point 170
Bits 7 - 0: DNP binary input point 171
65339 DNP binary assigned point index register 86
Bits 15 - 8: DNP binary input point 172
Bits 7 - 0: DNP binary input point 173
65340 DNP binary assigned point index register 87
Bits 15 - 8: DNP binary input point 174
Bits 7 - 0: DNP binary input point 175
65341 DNP binary assigned point index register 88
Bits 15 - 8: DNP binary input point 176
Bits 7 - 0: DNP binary input point 177
65342 DNP binary assigned point index register 89
Bits 15 - 8: DNP binary input point 178
Bits 7 - 0: DNP binary input point 179
65343 DNP binary assigned point index register 90
Bits 15 - 8: DNP binary input point 180
Bits 7 - 0: DNP binary input point 181
65344 DNP binary assigned point index register 91
Bits 15 - 8: DNP binary input point 182
Bits 7 - 0: DNP binary input point 183
65345 DNP binary assigned point index register 92
Bits 15 - 8: DNP binary input point 184
Bits 7 - 0: DNP binary input point 185
65346 DNP binary assigned point index register 93
Bits 15 - 8: DNP binary input point 186
Bits 7 - 0: DNP binary input point 187
65347 DNP binary assigned point index register 94
Bits 15 - 8: DNP binary input point 188
Bits 7 - 0: DNP binary input point 189
65348 DNP binary assigned point index register 95
Bits 15 - 8: DNP binary input point 190
Bits 7 - 0: DNP binary input point 191
65349 DNP binary assigned point index register 96
Bits 15 - 8: DNP binary input point 192
Bits 7 - 0: DNP binary input point 193
65350 DNP binary assigned point index register 97
Bits 15 - 8: DNP binary input point 194
Bits 7 - 0: DNP binary input point 195
65351 DNP binary assigned point index register 98
Bits 15 - 8: DNP binary input point 196
Bits 7 - 0: DNP binary input point 197
65352 DNP binary assigned point index register 99
Bits 15 - 8: DNP binary input point 198
Bits 7 - 0: DNP binary input point 199
65353 DNP binary assigned point index register 100
Bits 15 - 8: DNP binary input point 200
Bits 7 - 0: DNP binary input point 201
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REGISTER DEFINITION
65354 DNP binary assigned point index register 101
Bits 15 - 8: DNP binary input point 202
Bits 7 - 0: DNP binary input point 203
65355 DNP binary assigned point index register 102
Bits 15 - 8: DNP binary input point 204
Bits 7 - 0: DNP binary input point 205
65356 DNP binary assigned point index register 103
Bits 15 - 8: DNP binary input point 206
Bits 7 - 0: DNP binary input point 207
65357 DNP binary assigned point index register 104
Bits 15 - 8: DNP binary input point 208
Bits 7 - 0: DNP binary input point 209
65358 DNP binary assigned point index register 105
Bits 15 - 8: DNP binary input point 210
Bits 7 - 0: DNP binary input point 211
65359 DNP binary assigned point index register 106
Bits 15 - 8: DNP binary input point 212
Bits 7 - 0: Spare
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The DNP Assignable Point indexes feature allows the user to reassign the point indexes of analog input
points. By default, the point indexes are as shown in the "DNP3.0 Implementation for the ABB PCD"
document. To change the point index of a given analog input point the appropriate modbus register has
to be modified to the desired value. NOTE: The assigned point index may not exceed the maximum
number of analog input points.
For example, to change the point index of DNP analog input point 6 to 10, modify register 65384 to set
bits 15-8 to 00001010(binary).
Refer to the "DNP 3.0 Implementation for the ABB PCD" document for a description of the DNP points
listed below.
REGISTER DEFINITION
65376 Spare
65377 Execute
65378 Password character 1
Password character 2
65379 Password character 3
Password character 4
65380 Spare
65381 DNP analog assigned point index register 0
Bits 15 - 8: DNP analog input point 0
Bits 7 - 0: DNP analog input point 1
65382 DNP analog assigned point index register 1
Bits 15 - 8: DNP analog input point 2
Bits 7 - 0: DNP analog input point 3
65383 DNP analog assigned point index register 2
Bits 15 - 8: DNP analog input point 4
Bits 7 - 0: DNP analog input point 5
65384 DNP analog assigned point index register 3
Bits 15 - 8: DNP analog input point 6
Bits 7 - 0: DNP analog input point 7
65385 DNP analog assigned point index register 4
Bits 15 - 8: DNP analog input point 8
Bits 7 - 0: DNP analog input point 9
65386 DNP analog assigned point index register 5
Bits 15 - 8: DNP analog input point 10
Bits 7 - 0: DNP analog input point 11
65387 DNP analog assigned point index register 6
Bits 15 - 8: DNP analog input point 12
Bits 7 - 0: DNP analog input point 13
65388 DNP analog assigned point index register 7
Bits 15 - 8: DNP analog input point 14
Bits 7 - 0: DNP analog input point 15
65389 DNP analog assigned point index register 8
Bits 15 - 8: DNP analog input point 16
Bits 7 - 0: DNP analog input point 17
65390 DNP analog assigned point index register 9
Bits 15 - 8: DNP analog input point 18
Bits 7 - 0: DNP analog input point 19
65391 DNP analog assigned point index register 10
Bits 15 - 8: DNP analog input point 20
Bits 7 - 0: DNP analog input point 21
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REGISTER DEFINITION
65392 DNP analog assigned point index register 11
Bits 15 - 8: DNP analog input point 22
Bits 7 - 0: DNP analog input point 23
65393 DNP analog assigned point index register 12
Bits 15 - 8: DNP analog input point 24
Bits 7 - 0: DNP analog input point 25
65394 DNP analog assigned point index register 13
Bits 15 - 8: DNP analog input point 26
Bits 7 - 0: DNP analog input point 27
65395 DNP analog assigned point index register 14
Bits 15 - 8: DNP analog input point 28
Bits 7 - 0: DNP analog input point 29
65396 DNP analog assigned point index register 15
Bits 15 - 8: DNP analog input point 30
Bits 7 - 0: DNP analog input point 31
65397 DNP analog assigned point index register 16
Bits 15 - 8: DNP analog input point 32
Bits 7 - 0: DNP analog input point 33
65398 DNP analog assigned point index register 17
Bits 15 - 8: DNP analog input point 34
Bits 7 - 0: DNP analog input point 35
65399 DNP analog assigned point index register 18
Bits 15 - 8: DNP analog input point 36
Bits 7 - 0: DNP analog input point 37
65400 DNP analog assigned point index register 19
Bits 15 - 8: DNP analog input point 38
Bits 7 - 0: DNP analog input point 39
65401 DNP analog assigned point index register 20
Bits 15 - 8: DNP analog input point 40
Bits 7 - 0: DNP analog input point 41
65402 DNP analog assigned point index register 21
Bits 15 - 8: DNP analog input point 42
Bits 7 - 0: DNP analog input point 43
65403 DNP analog assigned point index register 22
Bits 15 - 8: DNP analog input point 44
Bits 7 - 0: DNP analog input point 45
65404 DNP analog assigned point index register 23
Bits 15 - 8: DNP analog input point 46
Bits 7 - 0: DNP analog input point 47
65405 DNP analog assigned point index register 24
Bits 15 - 8: DNP analog input point 48
Bits 7 - 0: DNP analog input point 49
65406 DNP analog assigned point index register 25
Bits 15 - 8: DNP analog input point 50
Bits 7 - 0: DNP analog input point 51
65407 DNP analog assigned point index register 26
Bits 15 - 8: DNP analog input point 52
Bits 7 - 0: DNP analog input point 53
65408 DNP analog assigned point index register 27
Bits 15 - 8: DNP analog input point 54
Bits 7 - 0: DNP analog input point 55
65409 DNP analog assigned point index register 28
Bits 15 - 8: DNP analog input point 56
Bits 7 - 0: DNP analog input point 57
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REGISTER DEFINITION
65410 DNP analog assigned point index register 29
Bits 15 - 8: DNP analog input point 58
Bits 7 - 0: DNP analog input point 59
65411 DNP analog assigned point index register 30
Bits 15 - 8: DNP analog input point 60
Bits 7 - 0: DNP analog input point 61
65412 DNP analog assigned point index register 31
Bits 15 - 8: DNP analog input point 62
Bits 7 - 0: DNP analog input point 63
65413 DNP analog assigned point index register 32
Bits 15 - 8: DNP analog input point 64
Bits 7 - 0: DNP analog input point 65
65414 DNP analog assigned point index register 33
Bits 15 - 8: DNP analog input point 66
Bits 7 - 0: DNP analog input point 67
65415 DNP analog assigned point index register 34
Bits 15 - 8: DNP analog input point 68
Bits 7 - 0: DNP analog input point 69
65416 DNP analog assigned point index register 35
Bits 15 - 8: DNP analog input point 70
Bits 7 - 0: DNP analog input point 71
65417 DNP analog assigned point index register 36
Bits 15 - 8: DNP analog input point 72
Bits 7 - 0: DNP analog input point 73
65418 DNP analog assigned point index register 37
Bits 15 - 8: DNP analog input point 74
Bits 7 - 0: DNP analog input point 75
65419 DNP analog assigned point index register 38
Bits 15 - 8: DNP analog input point 76
Bits 7 - 0: DNP analog input point 77
65420 DNP analog assigned point index register 39
Bits 15 - 8: DNP analog input point 78
Bits 7 - 0: DNP analog input point 79
65421 DNP analog assigned point index register 40
Bits 15 - 8: DNP analog input point 80
Bits 7 - 0: DNP analog input point 81
65422 DNP analog assigned point index register 41
Bits 15 - 8: DNP analog input point 82
Bits 7 - 0: DNP analog input point 83
65423 DNP analog assigned point index register 42
Bits 15 - 8: DNP analog input point 84
Bits 7 - 0: DNP analog input point 85
65424 DNP analog assigned point index register 43
Bits 15 - 8: DNP analog input point 86
Bits 7 - 0: DNP analog input point 87
65425 DNP analog assigned point index register 44
Bits 15 - 8: DNP analog input point 88
Bits 7 - 0: DNP analog input point 89
65426 DNP analog assigned point index register 45
Bits 15 - 8: DNP analog input point 90
Bits 7 - 0: DNP analog input point 91
65427 DNP analog assigned point index register 46
Bits 15 - 8: DNP analog input point 92
Bits 7 - 0: DNP analog input point 93
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PCD MODBUS® Protocol Implementation Details
ABB Inc.
REGISTER DEFINITION
65428 DNP analog assigned point index register 47
Bits 15 - 8: DNP analog input point 94
Bits 7 - 0: DNP analog input point 95
65429 DNP analog assigned point index register 48
Bits 15 - 8: DNP analog input point 96
Bits 7 - 0: DNP analog input point 97
65430 DNP analog assigned point index register 49
Bits 15 - 8: DNP analog input point 98
Bits 7 - 0: DNP analog input point 99
65431 DNP analog assigned point index register 50
Bits 15 - 8: DNP analog input point 100
Bits 7 - 0: DNP analog input point 101
65432 DNP analog assigned point index register 51
Bits 15 - 8: DNP analog input point 102
Bits 7 - 0: DNP analog input point 103
65433 DNP analog assigned point index register 52
Bits 15 - 8: DNP analog input point 104
Bits 7 - 0: DNP analog input point 105
65434 DNP analog assigned point index register 53
Bits 15 - 8: DNP analog input point 106
Bits 7 - 0: DNP analog input point 107
65435 DNP analog assigned point index register 54
Bits 15 - 8: DNP analog input point 108
Bits 7 - 0: DNP analog input point 109
65436 DNP analog assigned point index register 55
Bits 15 - 8: DNP analog input point 110
Bits 7 - 0: DNP analog input point 111
65437 DNP analog assigned point index register 56
Bits 15 - 8: DNP analog input point 112
Bits 7 - 0: DNP analog input point 113
65438 DNP analog assigned point index register 57
Bits 15 - 8: DNP analog input point 114
Bits 7 - 0: DNP analog input point 115
65439 DNP analog assigned point index register 58
Bits 15 - 8: DNP analog input point 116
Bits 7 - 0: DNP analog input point 117
65440 DNP analog assigned point index register 59
Bits 15 - 8: DNP analog input point 118
Bits 7 - 0: DNP analog input point 119
65441 DNP analog assigned point index register 60
Bits 15 - 8: DNP analog input point 120
Bits 7 - 0: DNP analog input point 121
65442 DNP analog assigned point index register 61
Bits 15 - 8: DNP analog input point 122
Bits 7 - 0: DNP analog input point 123
65443 DNP analog assigned point index register 62
Bits 15 - 8: DNP analog input point 124
Bits 7 - 0: DNP analog input point 125
65444 DNP analog assigned point index register 63
Bits 15 - 8: DNP analog input point 126
Bits 7 - 0: DNP analog input point 127
65445 DNP analog assigned point index register 64
Bits 15 - 8: DNP analog input point 128
Bits 7 - 0: DNP analog input point 129
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REGISTER DEFINITION
65446 DNP analog assigned point index register 65
Bits 15 - 8: DNP analog input point 130
Bits 7 - 0: DNP analog input point 131
65447 DNP analog assigned point index register 66
Bits 15 - 8: DNP analog input point 132
Bits 7 - 0: DNP analog input point 133
65448 DNP analog assigned point index register 67
Bits 15 - 8: DNP analog input point 134
Bits 7 - 0: DNP analog input point 135
65449 DNP analog assigned point index register 68
Bits 15 - 8: DNP analog input point 136
Bits 7 - 0: DNP analog input point 137
65450 DNP analog assigned point index register 69
Bits 15 - 8: DNP analog input point 138
Bits 7 - 0: DNP analog input point 139
65451 DNP analog assigned point index register 70
Bits 15 - 8: DNP analog input point 140
Bits 7 - 0: DNP analog input point 141
65452 DNP analog assigned point index register 71
Bits 15 - 8: DNP analog input point 142
Bits 7 - 0: DNP analog input point 143
65453 DNP analog assigned point index register 72
Bits 15 - 8: DNP analog input point 144
Bits 7 - 0: DNP analog input point 145
65454 DNP analog assigned point index register 73
Bits 15 - 8: DNP analog input point 146
Bits 7 - 0: spare
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7 CATALOG DEPENDENCIES
All references in this document have referred to digital input/outputs in a sequential order. However,
the PCD supports I/O through various cards or modules. Since the labeling on each card is generic
and always starts at IN1 and OUT1 some confusion can arise. The solution is to reference a given IO
point in a dual index scheme, i.e., IN2c would indicate input 2 in slot c (or slot 3). Cross referencing
the references given in this document to this scheme is dependent on the IO population of the unit
(catalog based) and is shown in the tables below:
7.1.1 SCD and PCD Catalogued for Three Phase Operation (xxxx-xxxx-xx-x0xx)
IO 000X 001X 002X 003X 004X 005X 101X 102X 103X 104X 105X
Designation (SCD) (SCD)
IN1 In1a In1a In1a In1a In1a In1a In1b In1b In1b In1b In1b
IN2 In2a In2a In2a In2a In2a In2a In2b In2b In2b In2b In2b
IN3 In3a In3a In3a In3a In3a In3a In3b In3b FB30 In1c In1c
IN4 In4a In4a In4a In4a In4a In4a In4b In4b FB29 In2c In2c
IN5 FB28 In1b In1b In1b In1b In1b In5b In5b FB28 In3c FB28
IN6 FB27 In2b In2b In2b In2b In2b In6b In6b FB27 In4c FB27
IN7 FB26 In3b In3b FB26 In1c In1c FB26 In1c FB26 In5c FB26
IN8 FB25 In4b In4b FB25 In2c In2c FB25 In2c FB25 In6c FB25
IN9 FB24 In5b In5b FB24 In3c FB24 FB24 In3c FB24 FB24 FB24
IN10 FB23 In6b In6b FB23 In4c FB23 FB23 In4c FB23 FB23 FB23
IN11 FB22 FB22 In1c FB22 In5c FB22 FB22 In5c FB22 FB22 FB22
IN12 FB21 FB21 In2c FB21 In6c FB21 FB21 In6c FB21 FB21 FB21
IN13 FB20 FB20 In3c FB20 FB20 FB20 FB20 FB20 FB20 FB20 FB20
IN14 FB19 FB19 In4c FB19 FB19 FB19 FB19 FB19 FB19 FB19 FB19
IN15 FB18 FB18 In5c FB18 FB18 FB18 FB18 FB18 FB18 FB18 FB18
IN16 FB17 FB17 In6c FB17 FB17 FB17 FB17 FB17 FB17 FB17 FB17
IN17 FB16 FB16 FB16 FB16 FB16 FB16 FB16 FB16 FB16 FB16 FB16
. . . . . . . . . . . .
IN32 FB1 FB1 FB1 FB1 FB1 FB1 FB1 FB1 FB1 FB1 FB1
OUT1 Out1a Out1a Out1a Out1a Out1a Out1a Out1b Out1b Out1b Out1b Out1b
OUT2 Out2a Out2a Out2a Out2a Out2a Out2a Out2b Out2b Out2b Out2b Out2b
OUT3 Out3a Out3a Out3a Out3a Out3a Out3a Out3b Out3b FB30 Out1c Out1c
OUT4 N/A Out1b Out1b Out1b Out1b Out1b Out4b Out4b FB29 Out2c Out2c
OUT5 FB28 Out2b Out2b Out2b Out2b Out2b N/A Out1c FB28 Out3c FB28
OUT6 FB27 Out3b Out3b N/A Out1c Out1c N/A Out2c FB27 Out4c FB27
OUT7 FB26 Out4b Out4b FB26 Out2c Out2c FB26 Out3c FB26 N/A FB26
OUT8 FB25 N/A Out1c FB25 Out3c N/A FB25 Out4c FB25 N/A FB25
OUT9 FB24 N/A Out2c FB24 Out4c FB24 FB24 N/A FB24 FB24 FB24
OUT10 FB23 N/A Out3c FB23 N/A FB23 FB23 N/A FB23 FB23 FB23
OUT11 FB22 FB22 Out4c FB22 N/A FB22 FB22 N/A FB22 FB22 FB22
OUT12 FB21 FB21 N/A FB21 N/A FB21 FB21 N/A FB21 FB21 FB21
OUT13 FB20 FB20 N/A FB20 FB20 FB20 FB20 FB20 FB20 FB20 FB20
OUT14 FB19 FB19 N/A FB19 FB19 FB19 FB19 FB19 FB19 FB19 FB19
OUT15 FB18 FB18 N/A FB18 FB18 FB18 FB18 FB18 FB18 FB18 FB18
OUT16 FB17 FB17 N/A FB17 FB17 FB17 FB17 FB17 FB17 FB17 FB17
OUT17 FB16 FB16 FB16 FB16 FB16 FB16 FB16 FB16 FB16 FB16 FB16
. . . . . . . . . . . .
OUT32 FB1 FB1 FB1 FB1 FB1 FB1 FB1 FB1 FB1 FB1 FB1
Note: The Feedback terms shown are system defaults. They can be changed through the Feedback
Allocation mask.
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Note: The Feedback terms shown are system defaults. They can be changed through the Feedback
Allocation mask.
184