1956_C12.

fm Page 575 Monday, August 18, 2003 3:17 PM

12
Synchronous Rectifier DC/DC Converters

The global merchant dollar market for DC/DC converters is projected to

increase from about $3.6 billion in 2001 to about $6.0 billion in 2006, a
compound annual growth rate of 10.6%. North American sales of DC/DC
converters in networking and telecom equipment are expected to grow from
$2.3 billion in 1999 to $4.6 billion in 2004, a yearly compounded growth rate
of 15.3%. The first quarter of 1995 was the first time that shipments of 3.3 V
microprocessor and memory integrated chips (ICs) exceeded the shipments
of 5 V parts. Once this transition occurred in memories and microprocessors,
the demand for low-voltage power conversion began to grow at an increas-
ing rate. The primary application of DC/DC converters is in computer power
supplies and communication equipment.
The computer power supply shift from 5 V to 3.3 V digital IC has taken
over 5 years to occur, from the first indication that voltages below 5 V would
be needed until the realization of volume sales. Now that the 5 V barrier has
been broken, the trend toward lower and lower voltages is accelerating.
Within 2 years, 2.5 V parts are expected to become common with the intro-
duction of the next-generation microprocessors. In fact, current plans for
next-generation microprocessors call for a dual voltage of 1.5/2.5 V with 1.5
V used for the memory bus and 2.5 V used for logic functions. Within another
few years, voltages are expected to move as low as 0.9 V, with mainstream,
high-volume parts operating at 1.5 V.
A low-voltage plus high-current DC power supply is urgently required in
the next-generation computer and communications equipment. The first idea
is to use a forward converter, refer to Figure 1.26, which can perform low-
voltage plus high-current output voltage. A modified circuit with dynamic
clamp circuit is shown in Figure 12.1. The two diodes D1 and D2 can be
normal rectifier diode, rectifier Schottky diode, or MOSFET. Figure 12.2
shows the efficiency gain of the following three types of forward converters
needed to construct a low-voltage high-current power supply:

• Forward converter using traditional diodes

• Forward converter using Schottky diode
• Synchronous rectifier using low forward-resistance MOSFET

© 2003 by CRC Press LLC

1956_C12.fm Page 576 Monday, August 18, 2003 3:17 PM

D1 Lf RL
T

R1 C1 L m v3 D2 Cf R v2

V1
1 : N
Q0
PWM Q0

FIGURE 12.1
Forward converter with dynamic clamp circuit.

1.00

0.80
Efficiency

Synchronous
0.60
Rectifier
Schottky Diode
0.40
Normal Diode
0.20

0.00
0.2 0.3 0.4 0.5 0.6 0.7 0.8
Duty Cycle

FIGURE 12.2
Efficiencies of different types of forward converter.

As the operating voltages ratchet downward, the design of rectifiers

requires more attention because the devices forward-voltage drop constitutes
an increasing fraction of the output voltage. The forward-voltage drop across
a switch-mode rectifier is in series with the output voltage, so losses in this
rectifier will almost entirely determine its efficiency. The synchronous recti-
fier circuit has been designed primarily to reduce this loss.

12.1 Introduction
A synchronous rectifier is an electronic switch that improves power-conver-
sion efficiency by placing a low-resistance conduction path across the diode
rectifier in a switch-mode regulator. At 3.3 V, the traditional diode-rectifier
loss is significant with very low efficiency (say less than 70%). For step-down
regulators with a 3.3 V output and 12 V battery input voltage, a 0.4 V forward
voltage of a Schottky diode represents a typical efficiency penalty of about
12%, aside from other loss mechanisms. The losses are not as bad at lower

© 2003 by CRC Press LLC

1956_C12.fm Page 577 Monday, August 18, 2003 3:17 PM

L
T
S2
v3 D2 C R v2
S1
V1
1:N
D1
PWM
S

FIGURE 12.3
Synchronous rectifier converter with low-resistance MOSFET.

input voltages because the rectifier has a lower duty cycle and, thus, a shorter
conduction time. However, the Schottky rectifier’s forward drop is usually
the dominant loss mechanism.
For an input voltage of 7.2 V and output of 3.3 V, a synchronous rectifier
improves on the Schottky diode rectifier ’s efficiency by around 4%.
Figure 12.1 also shows that, as output voltage decreases, the synchronous
rectifier provides even larger gains in efficiency.
A practical circuit arrangement of a synchronous rectifier (SR) DC/DC
converter with purely resistive load is shown in Figure 12.3. It has one
MOSFET switch S on the primary side of the transformer. Two MOSFETs S1
and S2 on the secondary side of the transformer are functioning as the
synchronous rectifier. T is the isolating transformer with a turn ratio of 1:N.
an L-C circuit is the low-pass filter and R is the load. V1 is the input voltage
and V2 is the output voltage. The main switch S is driven by a PWM pulse-
train signal. Repeating frequency f and turn-on duty cycle K of the PWM
signal can be adjusted.
When the PWM signal is in the positive state, the main switch S conducts.
The primary voltage of the transformer is V1, and subsequently the second-
ary voltage of the transformer is v3 = NV1. In the mean time the MOSFET S1
is forward biased, so it turns ON and inversely conducts.
When the PWM signal is in the negative state, the main switch S is switched
off. The voltage of the transformer, v3, at this moment in time is approxi-
mately –NvC1. At the mean time the MOSFET S2 is forward biased, so it turns
ON and inversely conducts. It functions as free-wheeling diode and lets the
load current remain continuous through the filter L–C and load R.
A lot of papers in literature with practical hardware circuit achievements
on synchronous rectifier have been presented about the recent IEEE Trans-
actions and IEE Proceedings. The paper “Evaluation of Synchronous-Rectifi-
cation Efficiency Improvement Limits in Forward Converters” supported by
Virginia Power Electronics Center is one of the few outstanding research
publications on synchronous rectifiers (Jovanovic et al., 1995). This chapter
provides a practical design of a 3.3V/20A FSR (forward synchronous recti-
fier) with an efficiency of 85.5%. Similarly, another paper in 1993 also showed
the principle of a RCD clamp forward converter with an efficiency of 87.3%

© 2003 by CRC Press LLC

1956_C12.fm Page 578 Monday, August 18, 2003 3:17 PM

at low output current (Cobos et al., 1993). Two Japanese researchers from
Kumamoto Institute of Technology designed an FSR with an additional
winding and switching element that is able to hold the gate charge for the
freewheeling MOSFET (Sakai and Harada, 1995). Their experimental results
for a 5 V/10 A SR gives a maximum efficiency of approximately 91% at a
load of 7 A and an efficiency of 89% at 10 A. Another comparable FSR project
was made by James Blanc from Siliconix Incorporated (Blanc, 1991). In his
paper, he has included a lot of practical and useful simulation and experi-
mental waveform data from his 3.3 V/10 A FSR. As the output voltage
decreased, the operating efficiency decreased. Until now, no recent paper
has been published on any practical hardware FSR that is able to provide
1.8 V/20 A output current at high efficiency.
Analysis and design of DC/DC converters has been the subject of many
papers in the past. From the moment averaging techniques were used to
model these converters, interest has been focused on finding the best
approach to analyze and predict the behavior of the averaged small signal
or large signal models. The main difficulty encountered is that the converter
models are multiple-input multiple-output nonlinear systems and thus,
using the well-known transfer function control design approach is not
straightforward. The most common approach has been that of considering
the linearized small signal model of these converters as a multi-loop system,
with an outer voltage loop and an inner current loop. Since the current loop
has a much faster response than that of the outer loop, the analysis is greatly
simplified and the transfer functions obtained allow the designer to predict
the closed loop behavior of the system. Another approach in analysis and
design has been that of state-space techniques where the linearized state-
space equations are used together with design technique such as pole place-
ment or optimal control.
Synchronous rectifier DC/DC converters are called the fifth generation
converters. The developments in microelectronics and computer science
require power supplies with low output voltage and strong current. Tradi-
tional diode bridge rectifiers are not available for this requirement. Soft-
switching technique can be applied in synchronous rectifier DC/DC con-
verters. We have created converters with very low voltage (5 V, 3.3 V, and
1.8 ~ 1.5 V) and strong current (30 A, 60 A, 200 A) and high power transfer
efficiency (86%, 90%, 93%). In this section new circuits different from the
ordinary synchronous rectifier DC/DC converters are introduced:

• Flat transformer synchronous rectifier Luo-converter

• Active clamped flat transformer synchronous rectifier Luo-converter
• Double current synchronous rectifier Luo-converter with active
clamp circuit
• Zero-current-switching synchronous rectifier Luo-converter
• Zero-voltage-switching synchronous rectifier Luo-converter

© 2003 by CRC Press LLC

1956_C12.fm Page 579 Monday, August 18, 2003 3:17 PM

L RL
T
S3
Lm v3 D3 CO R v2

S2
V1
1:N
PWM D2
Cj
S1

FIGURE 12.4
Flat transformer synchronous rectifier Luo-converter.

12.2 Flat Transformer Synchronous Rectifier Luo-Converter

The flat transformer is a new design for AC/AC energy conversion. Since
its structure is very compatible and well-shielded, its size is very small and
likely a flan cardboard. Applying frequency can be 100 KHz to 5 MHz, its
power density can be as high as 300 W/inch3. Therefore, it is a good com-
ponent to use to construct the synchronous rectifier DC/DC converter.
The flat transformer SR DC/DC Luo-converter is shown in Figure 12.4.
The switches S1, S2, and S3 are the low-resistance MOSFET devices with
resistance RS (6 to 8 mΩ). Since we use a flat transformer, its leakage induc-
tance Lm, Lm = 1 nH, and resistance are small. Other parameters are Cj = 50 ~
100 nF, RL = 2 mΩ, L = 5 µH, CO = 10 µF. The input voltage is V1 = 30 VDC
and output voltage is V2, the output current is IO. The transformer turn ratio
is N that is usually much smaller than unity in SR DC/DC converters, e.g.,
N = 1:12 or 1/12. The repeating period is T = 1/f and conduction duty is k.
There are four working modes:

• Transformer Is in magnetizing
• Forward on
• Transformer Is in demagnetizing
• Switched off

12.2.1 Transformer Is in Magnetizing Process

The natural resonant frequency is

1
ω= (12.1)
LmC j

© 2003 by CRC Press LLC

1956_C12.fm Page 580 Monday, August 18, 2003 3:17 PM

where the Lm is the leakage inductance of the primary winding, the Cj is the
drain-source junction capacitance of the main switch MOSFET S.
If Cj is very small in nF, its charging process is very quickly completed.
The primary current increases with slope V1/Lm, then the time interval of
this period can be estimated

Lm
t1 = NI O (12.2)
V1

This is the process used to establish the primary current from 0 to rated
value NIO.

12.2.2 Switching-On
Switching-on period is controlled by the PWM signal, therefore,

t2 ≈ kT (12.3)

12.2.3 Transformer Is in Demagnetizing Process

The transformer demagnetizing process is estimated in

π V1
t3 = LmC j [ + ] (12.4)
2 Lm
V1 +
2
( NI O ) 2
Cj

When the main switch is switching-off there is a voltage stress, which can
be very high. The voltage stress is dependent on the energy stored in the
inductor and the capacitor:

Lm
Vpeak = NI O (12.5)
Cj

The voltage stress peak value can be tens to hundreds of volts since Cj is
small.

12.2.4 Switching-Off
The switch-off period is controlled by the PWM signal, therefore,

t4 ≈ (1 − k )T (12.6)
© 2003 by CRC Press LLC
1956_C12.fm Page 581 Monday, August 18, 2003 3:17 PM

L RL
T
S4
Lm CO R v2
C v3 D4
S2 S3
V1
1:N
D2 D3
S1
PWM

FIGURE 12.5
Active clamped flat transformer synchronous rectifier Luo-converter.

12.2.5 Summary
Average output voltage V2 and input current I1 are

Lm 2
V2 = kNV1 − ( RL + RS + N )I O (12.7)
T

and

I 1 = kNI O (12.8)

The power transfer efficiency:

L
V2 I O RL + RS + m N 2
η= = 1− T IO (12.9)
V1 I 1 kNV1

When we set the frequency f = 150 to 200 kHz, we obtained the V2 = 1.8 V,
N = 1/12, IO = 0 to 30 A, Volume = 2.5 (in.3). The average power transfer
efficiency is 92.3% and the maximum PD is 21.6 W/in.3.

12.3 Active Clamped Synchronous Rectifier Luo-Converter

Active clamped flat transformer SR Luo-converter is shown in Figure 12.5.
The clamped circuit effectively suppresses the voltage stress during the main
switch turn-off.
Comparing the circuit in Figure 12.5 with the circuit in Figure 12.4, one
more switch S2 is set in the primary side. It is switched-on and -off exclusively
to the main switch S1. When S1 is turning-off, S2 is switching-on. A large
clamp capacitor C is connected in the primary winding to absorb the energy
© 2003 by CRC Press LLC
1956_C12.fm Page 582 Monday, August 18, 2003 3:17 PM

stored in the leakage inductor Lm. Since the clamp capacitor C is much larger
than the drain-source capacitor Cj by usually hundreds of times, the stress
voltage peak value remains at only a few volts.
There are four working modes:

• Transformer Is in magnetizing
• Forward on
• Transformer Is in demagnetizing
• Switched off

12.3.1 Transformer Is in Magnetizing

The natural resonant frequency is

1
ω= (12.10)
LmC j

where the Lm is the leakage inductance of the primary winding, the Cj is the
drain-source junction capacitance of the main switch MOSFET S.
If Cj is very small in nF, its charging process is very quickly completed.
The primary current increases with slope V1/Lm, then the time interval of
this period can be estimated

Lm
t1 = NI O (12.11)
V1

This is the process to establish the primary current from 0 to rated value NIO.

12.3.2 Switching-On
Switching-on period is controlled by the PWM signal, therefore,

t2 ≈ kT (12.12)

12.3.3 Transformer Is in Demagnetizing

The transformer demagnetizing process is estimated by

π V1
t3 = LmC [ + ] (12.13)
2 L
V12 + m ( NI O )2
C
© 2003 by CRC Press LLC
1956_C12.fm Page 583 Monday, August 18, 2003 3:17 PM

where C is the active clamp capacitor in µF. The voltage stress depends on
the energy stored in the inductor and the capacitor:

Lm
Vpeak = NI O (12.14)
C

The voltage stress peak value is very small since capacitor C is large, mea-
sured in µF.

12.3.4 Switching-Off
Switching-off period is controlled by the PWM signal, therefore,

t4 ≈ (1 − k )T (12.15)

12.3.5 Summary
Average output voltage is V2 and input current is I1:

Lm 2
V2 = kNV1 − ( RL + RS + N )I O (12.16)
T

and

I 1 = kNI O (12.17)

The power transfer efficiency:

L
V2 I O RL + RS + m N 2
η= = 1− T IO (12.18)
V1 I 1 kNV1

When we set the frequency f = 150 to 200 kHz, we obtained the V2 = 1.8 V,
N = 1/12, IO = 0 to 30 A, volume = 2.5 (in.3). The average power transfer
efficiency is 92.3% and the maximum power density (PD) is 21.6 W/in.3.

12.4 Double Current Synchronous Rectifier Luo-Converter

The converter in Figure 12.5 likes a half wave rectifier. The double current
synchronous rectifier Luo-converter with active clamp circuit is shown in
© 2003 by CRC Press LLC
1956_C12.fm Page 584 Monday, August 18, 2003 3:17 PM

FT L2

Lm S4 D4 CO
C
D2
+ 1:N
S3 D3 _ R +
V1 V2
–

S2 L1
PWM S1 D1

FIGURE 12.6
Double-current synchronous rectifier Luo-converter.

Figure 12.6. The switches S1 to S4 are the low-resistance MOSFET devices

with very low resistance RS (6 to 8 mΩ). Since S3 and S4 plus L1 and L2 form
a double current circuit and S2 plus C is the active clamp circuit, this con-
verter likes a full wave rectifier and obtains strong output current. Other
parameters are C = 1 µF, Lm = 1 nH, RL = 2 mΩ, L = 5 µH, CO = 10 µF. The
input voltage is V1 = 30 VDC and output voltage is V2, the output current
is IO. The transformer turn ratio is N = 1:12. The repeating period is T = 1/
f and conduction duty is k. There are four working modes:

• Transformer Is in magnetizing
• Forward on
• Transformer Is in demagnetizing
• Switched off

12.4.1 Transformer Is in Magnetizing

The natural resonant frequency is

1
ω= (12.19)
LmC j

where the Lm is the leakage inductance of the primary winding, the Cj is the
drain-source junction capacitance of the main switch MOSFET S.
If Cj is very small in nF, its charging process is very quickly completed.
The primary current increases with slope V1/Lm, and the time interval of this
period can be estimated

Lm
t1 = NI O (12.20)
V1

© 2003 by CRC Press LLC

1956_C12.fm Page 585 Monday, August 18, 2003 3:17 PM

This is the process used to establish the primary current from 0 to rated
value NIO.

12.4.2 Switching-On
Switching-on period is controlled by the PWM signal, therefore,

t2 ≈ kT (12.21)

12.4.3 Transformer Is in Demagnetizing

The transformer demagnetizing process is estimated in

π V1
t3 = LmC [ + ] (12.22)
2 L
V12 + m ( NI O )2
C

When the main switch is switching-off there is a very low voltage stress
since the active clamp circuit is applied.

12.4.4 Switching-Off
Switching-off period is controlled by the PWM signal, therefore,

t4 ≈ (1 − k )T (12.23)

12.4.5 Summary
Average output voltage V2 and input current I1 are

Lm 2
V2 = kNV1 − ( RL + RS + N )I O (12.24)
T
and

I 1 = kNI O (12.25)

The power transfer efficiency is

L
V2 I O RL + RS + m N 2
η= = 1− T IO (12.26)
V1 I 1 kNV1
© 2003 by CRC Press LLC
1956_C12.fm Page 586 Monday, August 18, 2003 3:17 PM

FT L2

+
CO I2
S4 D1 R
_V2

1:N S3
D3
Lm
L1

C
+ Cr
V1 L4
–
S6 D4
D2
1:N
S5 D5
L3
S2

Lr

PWM
S1 D1

FIGURE 12.7
ZCS synchronous rectifier Luo-converter.

When we set the frequency f = 200 to 250 kHz, we obtained the V2 = 1.8 V,
N = 12, IO = 0 to 35 A, volume = 2.5 (in.3). The average power transfer
efficiency is 94% and the maximum PD is 25 W/in.3.

12.5 Zero-Current-Switching Synchronous Rectifier

Luo-Converter
The zero-current-switching (ZCS) synchronous rectifier Luo-converter is
shown in Figure 12.7. Since the power loss across the main switch S1 is high
in the double current SR Luo-converter, we designed the ZCS, DC SR Luo-
Converter shown in Figure 12.7. This converter is based on the DC SR Luo-
converter plus ZCS technique. It employs a double core flat transformer.
There are four working modes:

• Transformer Is in magnetizing
• Resonant period
• Transformer Is in demagnetizing
• Switched off
© 2003 by CRC Press LLC
1956_C12.fm Page 587 Monday, August 18, 2003 3:17 PM

12.5.1 Transformer Is in Magnetizing

The ZCS resonant frequency is

1
ωr = (12.27)
Lr Cr

The normalized impedance is

Lr
Zr = (12.28)
Cr

The shift-angular distance is

I 1Zr
α = sin −1 ( ) (12.29)
V1

where the Lr is the resonant inductor and the Cr is the resonant capacitor.
The primary current increases with slope V1/Lr , then the time interval of
this period can be estimated

I 1Lr
t1 = (12.30)
V1

12.5.2 Resonant Period

The resonant period is,

1
t2 = (π + α) (12.31)
ωr

12.5.3 Transformer Is in Demagnetizing

The transformer demagnetizing process is estimated in

V1 (1 + cos α )Cr
t3 = (12.32)
I1

When the main switch is switching-off there is a very low voltage stress
since active clamp circuit is applied.

© 2003 by CRC Press LLC

1956_C12.fm Page 588 Monday, August 18, 2003 3:17 PM

12.5.4 Switching-Off
Switching-off period is controlled by the PWM signal, therefore,

V1 (t1 + t2 ) V cos α
t4 = (IL + 1 ) − (t1 + t2 + t3 ) (12.33)
V2 I 1 Zr π / 2 + α

12.5.5 Summary
Average output voltage V2 and input current I1 are

Lr + Lm 2
V2 = kNV1 − ( RL + RS + N )I O (12.34)
T
and

I 1 = kNI O (12.35)

The power transfer efficiency is

L + Lm 2
V2 I O RL + RS + r N
η= = 1− T IO (12.36)
V1 I 1 kNV1

Since Lr is larger than Lm, therefore Lm can be ignored in the above formulae.
When we set the V1 = 60 V and frequency f = 200 to 250 kHz, we obtained
the V2 = 1.8 V, N = 1/12, IO = 0 to 60 A, volume = 4 (in.3). The average power
transfer efficiency is 94.5% and the maximum PD is 27 W/in.3.

12.6 Zero-Voltage-Switching Synchronous Rectifier

Luo-Converter
The zero-voltage-switching synchronous rectifier Luo-converter is shown in
Figure 12.8, which is derived from the DC SR Luo-converter plus ZVS tech-
nique. It employs a double core flat transformer. There are four working
modes:

• Transformer Is in magnetizing
• Resonant period
• Transformer Is in demagnetizing
• Switched off
© 2003 by CRC Press LLC
1956_C12.fm Page 589 Monday, August 18, 2003 3:17 PM

FT L2

CO +
S4 D4 I2 R
_V2

1:N
S3 D3
Lm
L1
C1
Lr
+
V1 L4
–
S6 D6
D2

1:N
S5 D5
S2 L3

D1
PWM S1 Cr

FIGURE 12.8
ZVS synchronous rectifier Luo-converter.

12.6.1 Transformer Is in Magnetizing

The ZVS resonant frequency is

1
ωr = (12.37)
Lr Cr

The normalized impedance is

Lr
Zr = (12.38)
Cr

The shift-angular distance is

V1
α = sin −1 ( ) (12.39)
Zr I 1

where the Lr is the resonant inductor and the Cr is the resonant capacitor.
The switch voltage increases with slope I1/Cr , then the time interval of
this period can be estimated

© 2003 by CRC Press LLC

1956_C12.fm Page 590 Monday, August 18, 2003 3:17 PM

V1Cr
t1 = (12.40)
I1

12.6.2 Resonant Period

The resonant period is,

1
t2 = (π + α) (12.41)
ωr

12.6.3 Transformer Is in Demagnetizing

The transformer demagnetizing process is estimated in

I 1 (1 + cos α )Lr
t3 = (12.42)
V1

While the main switch is switching-off there is a very low voltage stress
since active clamp circuit is applied.

12.6.4 Switching-Off
Switching-off period is controlled by the PWM signal, therefore,

t1 + t2 + t3
t4 = (12.43)
V1
−1
V2

12.6.5 Summary
Average output voltage V2 and input current I1 are

Lr //Lm 2
V2 = kNV1 − ( RL + RS + N )I O (12.44)
T

and

I 1 = kNI O (12.45)

The power transfer efficiency is

© 2003 by CRC Press LLC
1956_C12.fm Page 591 Monday, August 18, 2003 3:17 PM

L //Lm 2
V2 I O RL + RS + r N
η= = 1− T IO (12.46)
V1 I 1 kNV1

Since Lr is larger than Lm, therefore Lr can be ignored in the above formulae.
When we set the V1 = 60 V and frequency f = 200 to 250 kHz, we obtained
the V2 = 1.8 V, N = 12, IO = 0 to 60 A, volume = 4 (in.3). The average power
transfer efficiency is 94.5% and the maximum PD is 27 W/in.3.

Bibliography
Blanc, J., Practical Application of MOSFET Synchronous Rectifiers, in Proceedings of
the Telecom-Eng. Conference INTELEC’1991, Japan, 1991, p. 495.
Chakrabarty, K., Poddar, G., and Banerjee, S., Bifurcation behavior of the buck con-
verter, IEEE Trans. Power Electronics, 11, 439, 1996.
Cobos, J.A., O. Grcia, J., and Sebastian, J.U., RCD clamp PWM forward converter
with self driven synchronous rectification, in Proceedings of IEEE International
Telecommunication Conference INTELEC’93, 1993, p. 1336.
Cobos, J.A., Sebastian, J., Uceda, J., Cruz, E. de la, and Gras, J.M., Study of the
applicability of self-driven synchronous rectification to resonant topologies, in
Proceedings of IEEE Power Electronics Specialists Conference, 1992, p. 933.
Garofalo, F., Marino, P., Scala, S., and Vasca, F., Control of DC-DC converters with
linear optimal feedback and nonlinear feedforward, IEEE Trans. Power Electron-
ics, 9, 607, 1994.
Jovanovic, M.M., Zhang, M.T., and Lee, F.C., Evaluation of synchronous-rectification
efficiency improvement limits in forward converters, IEEE Transactions on In-
dustrial Electronics, 42, 387, 1995.
Leu, C.S., Hua, G., and Lee, F.C., Analysis and design of RCD clamp forward con-
verter, in Proceedings of the VPEC’92, 1992, p. 198.
Luo, F.L. and Chua, L.M., Fuzzy logic control for synchronous rectifier DC/DC
converter, in Proceedings of the IASTED International Conference-ASC’00, Canada,
2000, p. 24.
Mattavelli, P., Rossetto, L., and Spiazzi, G., General-purpose sliding-mode controller
for DC/DC converter applications, IEEE Trans. Power Electronics, 8, 609, 1993.
Ogata, K., Designing Linear Control Systems with MATLAB, Prentice-Hall, Upper Sad-
dle River, NJ, 1994.
Phillips, C.P. and Harbor, R., Feedback Control System, Prentice-Hall, 1991.
Rim, C.T., Joung, G.B., and Cho, G.H., Practical switch based state-space modeling
of DC-DC converters with all parasitics, IEEE Trans. Power Electronics, 6, 611,
1991.
Sakai, E. and Harada, K., Synchronous Rectifier for Low Voltage Switching Converter,
in Proceedings of the Telecom-Eng. Conference INTELEC’1995, Japan, 1995, p. 471.
Yamashita, N., Murakami, N., and Yachi, Toshiaki., Conduction power loss in MOS-
FET synchronous rectifier with parallel-connected Schottky barrier diode, IEEE
Transaction on Power Electronics, 13, 667, 1998.

© 2003 by CRC Press LLC