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Inductor current sharing of current doubler rectifier in isolated DC-DC

converters

Conference Paper · April 2006

DOI: 10.1109/APEC.2006.1620626 · Source: IEEE Xplore

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Inductor Current Sharing of Current Doubler Rectifier
in Isolated DC-DC Converters
Hong Mao*, Liangbin Yao**, Songquan Deng**, Osama Abdel-Rahman**, Jun Liu** and Issa Batarseh**

*Astec Power Advanced Technology **Department of Electrical and Computer Engineering

Andover, MA 01810, USA University of Central Florida
hongmao@astec.com Orlando, Florida 32816, USA

Abstract–Current sharing is an important issue in both In this paper, the current sharing between two inductors in
isolated and non-isolated dc-dc converters. In the paper, average the CDR is generally discussed associated with primary full
current sharing is modelled and analyzed for isolated dc-dc bridge, push pull, active clamp and symmetric and
converters with current doubler rectifier. Important design asymmetric half bridge. Design guidelines are provided based
guidelines and conclusions are provided based on the
mathematical modelling and analysis. A modified current
on the numerical analysis. Furthermore, a modified CDR
doubler rectification is presented to achieve balanced current structure is presented to improve the current sharing. Design-
sharing between two inductors of current doubler rectifier in the oriented analysis is verified by mathematical model and
half bridge dc-dc converter. Experimental results are presented experimental results.
to verify the analysis and proposed topologies.
II. CURRENT SHARING IN CURRENT DOUBLER RECTIFIER

I. INTRODUCTION A. Current sharing of CDR in full bridge and push pull

converter
With the increased output currents in both isolated and non- In an interleaved two-phase buck converter, the current
isolated Point-of-Load (POL) converters, the number of sharing between two channels had been investigated. An
phases in a converter and the number of paralleled converters unbalanced current occurs due to asymmetric parameters such
have been increasing. For high output current and low output as filter inductor DCRs, FET on-resistance and effective duty
voltage, the current sharing among paralleled channels are cycles as well as the drive delay. The solution has been found
highly demanded, because uneven current distribution causes in the industry, which is adjusting the corresponding duty
inductor saturation, thermal stresses and degraded converter cycles according to the sensed current signals. However, in
performance [1-6]. Current sharing control with paralleled the isolated dc-dc converter, the current balance is hard to
converters is generally implemented with external load achieve by just simply adjusting the duty cycle of two
sharing circuitry [1]. In voltage regulators (VRs) for channels [8] because of the existence of the isolation
microprocessors, multi-phase interleaved synchronous- transformer.
rectifier (SR) buck converters are controlled by dedicated ICs There are four typical topologies associated with CDR as
with built-in current-sharing circuitry [1-3]. Various current shown in Fig. 1. For the full bridge and push pull dc-dc
sharing methods and circuitry in VRs or for paralleled VRs converters with a CDR, transformer may get saturated due to
have been documented and utilized in the industry [1-6]. the unbalanced transformer primary voltage. In the voltage-
In isolated dc-dc converters, isolation transformer links mode controlled full bridge, the transformer saturation can be
primary switching circuitry such as forward, flyback, push resolved by adding a capacitor in series with the transformer
pull, half bridge or full bridge topologies with secondary primary winding to block potential dc voltage; while in the
rectifiers such as current doubler, center-tapped full wave or push pull dc-dc converter peak-current-mode control is the
forward half wave. The concept of interleaving enables only solution to the transformer saturation. It should be noted
converter topologies to operate at increased power levels and that a capacitor is not allowed to add in the peak current
reduced input and output voltage and current ripples, better controlled full bridge, because the capacitor makes the control
thermal performance and improved transient response [7]. loop collapse.
Current Doubler Rectifier (CDR) is a good candidate for low In the peak current mode controlled push pull and full
output voltage high output current applications. In [8-9], the bridge, the transformer voltage-second is well balanced and
current sharing issue between two inductors in the CDR of transformer saturation can be avoided to a certain degree. In
half-bridge dc-dc converter is discussed based on the addition, secondary inductor current sharing can be achieved
established current-sharing DC model. even under asymmetric filter inductance. However, the

0-7803-9547-6/06/$20.00 ©2006 IEEE. 770

transformer DC current bias exists under asymmetric inductor achieved through peak-current-mode control. Because, Peak-
DCR or filter inductance conditions. Moreover, the peak current-mode control cannot be applied to the symmetric half
current control loop cannot balance the inductor currents bridge dc-dc converter since it leads to the capacitor voltage
under asymmetric inductor DCR values. collapse [11]. For asymmetric half bridge and active-clamp
dc-dc converter with a CDR, although the peak-current-mode
L1 control is applicable, the currents in the CDR cannot be
S1
S1 balanced because only unidirectional current is sensed and fed
T SR1 back. Based on the reasons above, the investigation of the
Vin
Lm n 1 Io current sharing for half bridge and active-clamp with CDR is
L2
C valuable.
In reality, two channels of the CDR are asymmetric, and
S2
SR2 even the effective duty cycles may not be same due to
different drive propagation as well as Fets turn-on and turn-
(a) Full bridge dc-dc converter off delays. In that case, it is unlikely the two inductors carry
equal average currents because of the asymmetry. Average
S1 L1
modelling method in [8-10] can be applied to the DC analysis
T
of the topologies above. Assume the D1 and D2 are the
n SR1 primary effective duty cycles (for S1 and S2, respectively); RTs
Vin is transformer secondary winding’s equivalent DC resistance,
1 Io and RL1 and RL2 are the DC resistance of the inductor L1 and
n C L2, respectively. Io is the load current. For the half bridge
L2
converter (including symmetric and asymmetric control) as
S2 shown in Fig. 1 (c), average currents in the three magnetic
SR2
components can be derived:
(b) Push-pull dc-dc converter D2 RTs
RL 2 +
D1 + D2 (1)
I L1 = Io
L1 RTs + RL1 + RL 2
S1
C1 T SR1 D1RTs
RL1 +
Vin
Lm n 1 D1 + D2 (2)
Io I L2 = Io
C RTs + RL1 + RL 2
L2

C2 S2 D2 D1
SR2 RL1 − RL2
D1 + D2 D1 + D2 Io (3)
IM =
RTs + RL1 + RL2 n
(c) Half bridge dc-dc converter
From Equation (1-3), we may conclude:

L1 SR1 (1) Current sharing is only determined by DC resistance

T
Cr i1 values and steady-state duty cycles, while inductor
inductance, transformer magnetizing inductance, and
Vin N 1 filter capacitance has no effect on the current sharing.
L2 i2 C o (2) Only inductor DCRs, transformer secondary winding
DCR and steady-state duty cycles determine current
S2 sharing of two channels. It is clear that transformer
S1 SR2 primary winding DCR, primary-side FETs’ on-resistance
and secondary-side SRs’ on-resistance values have no
(d) Active-clamp forward-flyback dc-dc converter effect on the current sharing.
(3) Current sharing can be achieved if two inductor DCR
Fig.1. Typical topologies with a current doubler rectifier
values are equal under symmetric duty cycles. If the two
channels are driven symmetrically, the inductor DCRs
B. Current sharing of CDR in half bridge dc-dc converter
tolerance or layout in planner inductor design determines
For half-bridge and active-clamp converter with a CDR, the current sharing.
transformer saturation can be avoided due to the existence of (4) To achieve zero DC bias of the transformer magnetizing
primary capacitors. However, current sharing cannot be current, the following equation has to be satisfied:

771
 D2 RL1 − D1RL2 = 0 (4)
RL1 + DRTs I o (11)
(5) Under asymmetric inductor DCR values, equal current IM =
RL1 + RL 2 + RTs n
may be achieved by adjusting the steady-stage duty cycle
values to satisfy:
From the equations above, it can be observed that current
sharing cannot be achieved unless the transformer winding
D2 − D1 RL1 − RL 2
=
(5)
DCR value equals to zero, and DC bias in the transformer
D1 + D2 RTs
always exists.
(6) Both Equation (4) and (5) cannot be satisfied with certain D. Comparison of the conventional topologies with current
duty cycles unless RL1 = RL2 , which means zero DC doubler rectifiers
magnetizing current and equal current sharing cannot be For conventional topologies discussed above, bi-directional
achieved by adjusting duty cycles. In others words, peak-current-mode control can only be applied to full bridge
achieving current sharing by means of adjusting duty and push pull dc-dc converters, and current sharing
cycles may lead to transformer saturation unless air gap is characteristics are similar for the two topologies.
added in the design. Further investigation found that the For symmetric and asymmetric half bridge and active-
adjustment effect depends on transformer DCR values clamp forward dc-dc converters with a current doubler,
and adjust effect is limited. voltage mode control can be directly applied. With the
additional capacitor added in series with transformer primary
Substitute D1=D and D2=1-D into the Equation (1-3), the winding, voltage mode control can be also applied to full
asymmetric HB DC current bias are: bridge converter. In those converters, their current sharing
characteristics are similar.
RL2 + (1 − D ) RTs (6) For both cases, primary and secondary Fet on-resistance
I L1 = Io
RTs + RL1 + RL2 has ignorable affect in current sharing. But the inductors
DCRs significantly affect the current sharing and transform
RL1 + DRTs (7) DC current bias.
I L2 = Io
RTs + RL1 + RL2 The most noticeable difference between the two types of
control scheme is that, in peak-current-mode controlled
(1 − D) RL1 − DRL2 Io (8) converter, filter inductance and transformer magnetizing
IM =
RTs + RL1 + RL2 n inductance values have effect on the current sharing; while in
voltage mode controlled converters, inductance value only
From the equations above, it is clear that current sharing affect current ripples but DC bias.
cannot be achieved in asymmetric half bridge unless both
RL1 = RL2 and D = 0.5 are satisfied. III. CURRENT SHARING IN THE MODIFIED CURRENT DOUBLER
RECTIFIER
C. Current sharing of CDR in active-clamp forward-flyback As mentioned above, due to asymmetric DC resistive
dc-dc converter parameters in the two channels of current doubler, unbalanced
In [12], the steady-state analysis and design of the active- DC inductor currents degrade the converter performance. A
clamp forward-flyback dc-dc converter with CDR was careful design and layout have to be done to reduce the
presented. The literature assumes the two inductors evenly asymmetry of circuitry.
share the output current and replace the two inductors by A modified CDR with two typical dc-dc converters is
current sources. However, that’s not the case, the shown in Fig. 2, wherein, an additional capacitor with low
mathematical model and experimental shows that the two voltage rating is simply added in series with transformer
inductors in the CDR carry unequal currents, and the DC bias secondary winding. Basically, the added capacitor will help
of magnetizing current exists and varies with duty cycle. The balance the inductor currents. The converters operate in the
analysis results are shown in Equation (9-11), detail exactly same way as in the dc-dc converters with a
derivation can be found in [13]. conventional CDR.
Applying average modelling method in [8-10] and the DC
RL 2 + (1 − D ) RTs current bias in the three magnetics elements of the half bridge
I L1 = Io (9)
RL1 + RL 2 + RTs dc-dc converter are:

D2 (12)
RL1 + DRTs I L1 = Io
I L2 = Io (10) D1 + D2
RL1 + RL 2 + RTs

772
 I L2 =
D1
Io (13) sharing is only determined by steady-state duty cycles, and
D1 + D2 inductor DCRs don’t have effect on the DC current sharing.
In other words, equal current can be achieved by keeping the
IM = 0 (14) steady-stage duty cycle values identical. It is always the case
that nearly equal duty cycles can be assured with dedicated
half-bridge controller and FET driver. Moreover, no DC bias
magnetizing current exists in the transformer, resulting in
Cs L1
S1 simple design and high-efficiency of the transformer owing to
C1 T SR1 less circulating energy.
Vin
Lm n 1
It is noted that, magnetizing DC current is zero even in
Io
C asymmetric half bridge. Since no control circuit is needed to
L2
balance the inductor current, the modified CDR is a kind of
C2 S2
SR2 passive current sharing method. The voltage across the
capacitor Cs is very small and low voltage capacitor can be
(a) With half bridge dc-dc converter used with minimum conduction loss.
For the active-clamp forward-flyback dc-dc converter with
the modified CDR, the DC bias solution is also simplified as:
Cs

SR1
I L1 = (1 − D ) I o (15)
T L1
Cr i1
I L 2 = DI o (16)
Vin N 1
L2 i2 C Io (17)
o
IM = D
S2
n
S1 SR2 It can be observed that the DC current bias in the converter
is only determined by the duty cycle and load current, which
(b) with active-clamp forward-flyback dc-dc converter significantly simplifies the magnetics design.
The DC bias of the topologies discussed above can be
Fig 2. Modified current doubler rectifier
summarize in Table 1, where assume symmetric half bridge
where Io is the converter output current; D1 and D2 are has equal duty cycle: D1=D2=D.
steady-state duty cycle values for S1 and S2, respectively.
Compared to the conventional symmetric half-bridge dc-dc
converter, it is obvious that in the modified topology, current

TABLE I: Current Sharing Comparison

(SHB: symmetric half bridge; AHB: Asymmetric half bridge; ACFF: Active-clamp forward-flyback)

Conventional CDR Modified CDR

SHB AHB ACFF SHB AHB ACFF

IL1 RTs RL 2 + (1 − D ) RTs RL 2 + (1 − D) RTs 1 (1 − D ) I o (1 − D ) I o

RL2 + Io Io Io
2 Io RL1 + RL 2 + RTs RL1 + RL 2 + RTs 2
RTs + RL1 + RL2

IL2 RL1 + 0.5RTs RL1 + DRTs RL1 + DRTs 1 DI o DI o

Io Io Io Io
RTs + RL1 + RL 2 RTs + RL1 + RL2 RL1 + RL 2 + RTs
2
IM 0.5( RL1 − RL2 ) Io (1 − D) RL1 − DRL2 Io RL1 + DRTs I o 0 0 Io
RTs + RL1 + RL2 n RTs + RL1 + RL2 n RL1 + RL 2 + RTs n D
n

IV. EXPERIMENTAL VERIFICATION frequency of 200 kHz. Due to the design asymmetry, the
inductor DCRs are originally asymmetric. With the
A prototype of HB dc-dc CDR converter is built with
conventional CDR, it can be observed that two inductors
current sharing control loop. The converter operates at 36V-
share unequal currents under symmetric duty cycles as
75V input voltage and 3.3V/20A output with switching

773
shown in Fig. 3 (a). To verify the proposed CDR topology, verify the proposed topology. Under symmetric duty cycle
intentionally, an external resistor of 7.5m Ohm is added in with external resistor of 7.5m ohm in series with L1, the
series with inductor L1 to make DCRs more unbalanced. experimental waveforms are shown in Fig.3(c). From the
Under this condition, the converter is driven symmetrically figure, it is seen that two inductor currents are evenly shared
with equal duty cycles. The corresponding experimental even with asymmetric inductor DCR values. It should be
waveforms are shown in Fig. 3(b), where obvious current noted that the voltage stress across capacitor Cs is extremely
imbalance is observed due to unequal inductor CDR values, low, which reduces capacitor ESR value and cost allowing
which agrees with the derived equations from the steady- practical applications of the converter in low voltage high
state model. current power conversion.

V. CONCLUSION
Inductor current sharing of the current doubler rectifier
associated with various isolated dc-dc converters is
discussed in this paper. Essential conclusions and design
guidelines are given based on the analysis. A modified CDR
is presented to achieve current sharing in the half bridge dc-
dc converter without additional current sharing control
(a) Asymmetric inductor DCR values without current sharing circuitry. In the modified CDR, the current bias is
control, D1 = D2 =30%, Io=15A decoupled from resistance parameters in a converter, which
simplify the converter design and analysis. Experimental
results verify the analysis and presented modified CDR
topology.

REFERENCE:

[1] Bob Mammano, “Load Sharing with Paralleled Power

Supplies”, TI Seminar.
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